From 723ec69a6b7eeb3e89d35dcf8fd223702ace6125 Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Mon, 30 Sep 2013 12:52:38 +0200 Subject: imx_watchdog: do not soft-reset while watchdog init Currently the driver clears WCR_SRS bit when enabling the watchdog and this causes a software reset. Do not clear WCR_SRS. Signed-off-by: Anatolij Gustschin --- drivers/watchdog/imx_watchdog.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/watchdog/imx_watchdog.c b/drivers/watchdog/imx_watchdog.c index 50e602a..d5993b4 100644 --- a/drivers/watchdog/imx_watchdog.c +++ b/drivers/watchdog/imx_watchdog.c @@ -19,6 +19,7 @@ struct watchdog_regs { #define WCR_WDBG 0x02 #define WCR_WDE 0x04 /* WDOG enable */ #define WCR_WDT 0x08 +#define WCR_SRS 0x10 #define WCR_WDW 0x80 #define SET_WCR_WT(x) (x << 8) @@ -45,7 +46,7 @@ void hw_watchdog_init(void) #define CONFIG_WATCHDOG_TIMEOUT_MSECS 128000 #endif timeout = (CONFIG_WATCHDOG_TIMEOUT_MSECS / 500) - 1; - writew(WCR_WDZST | WCR_WDBG | WCR_WDE | WCR_WDT | + writew(WCR_WDZST | WCR_WDBG | WCR_WDE | WCR_WDT | WCR_SRS | WCR_WDW | SET_WCR_WT(timeout), &wdog->wcr); hw_watchdog_reset(); } -- cgit v1.1 From 5d4d38d1cc89f523118219b1a38713d94fe72b3b Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 28 Aug 2013 09:00:27 -0400 Subject: drivers/rtc/davinci.c: Reference DAVINCI_RTC_BASE more directly We shouldn't rely on a define to hide this cast for us. Signed-off-by: Tom Rini --- drivers/rtc/davinci.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/rtc/davinci.c b/drivers/rtc/davinci.c index e60c0da..018779e 100644 --- a/drivers/rtc/davinci.c +++ b/drivers/rtc/davinci.c @@ -13,7 +13,7 @@ #if defined(CONFIG_CMD_DATE) int rtc_get(struct rtc_time *tmp) { - struct davinci_rtc *rtc = davinci_rtc_base; + struct davinci_rtc *rtc = (struct davinci_rtc *)DAVINCI_RTC_BASE; unsigned long sec, min, hour, mday, wday, mon_cent, year; unsigned long status; @@ -57,7 +57,7 @@ int rtc_get(struct rtc_time *tmp) int rtc_set(struct rtc_time *tmp) { - struct davinci_rtc *rtc = davinci_rtc_base; + struct davinci_rtc *rtc = (struct davinci_rtc *)DAVINCI_RTC_BASE; debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, @@ -75,7 +75,7 @@ int rtc_set(struct rtc_time *tmp) void rtc_reset(void) { - struct davinci_rtc *rtc = davinci_rtc_base; + struct davinci_rtc *rtc = (struct davinci_rtc *)DAVINCI_RTC_BASE; /* run RTC counter */ writel(0x01, &rtc->ctrl); -- cgit v1.1 From 155d424a9a0228e2f38ce21a92b20c31896d61d2 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 28 Aug 2013 09:00:28 -0400 Subject: am33xx, davinci: Create and use Create a common header file for the RTC IP block that is shared between davinci and am33xx. Signed-off-by: Tom Rini --- drivers/bootcount/bootcount_davinci.c | 3 +-- drivers/rtc/davinci.c | 2 +- 2 files changed, 2 insertions(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/bootcount/bootcount_davinci.c b/drivers/bootcount/bootcount_davinci.c index efa4d42..eddd940 100644 --- a/drivers/bootcount/bootcount_davinci.c +++ b/drivers/bootcount/bootcount_davinci.c @@ -6,8 +6,7 @@ */ #include -#include -#include +#include void bootcount_store(ulong a) { diff --git a/drivers/rtc/davinci.c b/drivers/rtc/davinci.c index 018779e..f862e2f 100644 --- a/drivers/rtc/davinci.c +++ b/drivers/rtc/davinci.c @@ -8,7 +8,7 @@ #include #include #include -#include +#include #if defined(CONFIG_CMD_DATE) int rtc_get(struct rtc_time *tmp) -- cgit v1.1 From 22ee39750431c0695497ffab412bb29564c68a80 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 28 Aug 2013 09:00:29 -0400 Subject: bootcount_davinci: Switch to scratch register #2 The RTC IP block here provides 3 scratch registers. Currently when using DeepSleep on am335x the scratch0/1 registers are used so moving ourself to scratch2 makes cooperation easier. Signed-off-by: Tom Rini --- drivers/bootcount/bootcount_davinci.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/bootcount/bootcount_davinci.c b/drivers/bootcount/bootcount_davinci.c index eddd940..f0acfad 100644 --- a/drivers/bootcount/bootcount_davinci.c +++ b/drivers/bootcount/bootcount_davinci.c @@ -20,17 +20,19 @@ void bootcount_store(ulong a) */ writel(RTC_KICK0R_WE, ®->kick0r); writel(RTC_KICK1R_WE, ®->kick1r); - raw_bootcount_store(®->scratch0, a); - raw_bootcount_store(®->scratch1, BOOTCOUNT_MAGIC); + raw_bootcount_store(®->scratch2, + (BOOTCOUNT_MAGIC & 0xffff0000) | (a & 0x0000ffff)); } ulong bootcount_load(void) { + unsigned long val; struct davinci_rtc *reg = (struct davinci_rtc *)CONFIG_SYS_BOOTCOUNT_ADDR; - if (raw_bootcount_load(®->scratch1) != BOOTCOUNT_MAGIC) + val = raw_bootcount_load(®->scratch2); + if ((val & 0xffff0000) != (BOOTCOUNT_MAGIC & 0xffff0000)) return 0; else - return raw_bootcount_load(®->scratch0); + return val & 0x0000ffff; } -- cgit v1.1 From a1c143f4c8fae3f8cf9dfd39968dbc8a08f659ec Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 28 Aug 2013 09:00:30 -0400 Subject: TI:am33xx: Add bootcount support to ti_am335x_common.h Enable the bootcount driver for am335x in general. We leave adding a bootlimit and altbootcmd to the environment to the board ports. Signed-off-by: Tom Rini --- drivers/bootcount/Makefile | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/bootcount/Makefile b/drivers/bootcount/Makefile index 2b517b6..352a0a1 100644 --- a/drivers/bootcount/Makefile +++ b/drivers/bootcount/Makefile @@ -10,6 +10,7 @@ COBJS-y += bootcount.o COBJS-$(CONFIG_AT91SAM9XE) += bootcount_at91.o COBJS-$(CONFIG_BLACKFIN) += bootcount_blackfin.o COBJS-$(CONFIG_SOC_DA8XX) += bootcount_davinci.o +COBJS-$(CONFIG_AM33XX) += bootcount_davinci.o COBJS-$(CONFIG_BOOTCOUNT_RAM) += bootcount_ram.o COBJS := $(COBJS-y) -- cgit v1.1 From 2fff63c2a5506a4d28b5410b68b470d7c869cb98 Mon Sep 17 00:00:00 2001 From: Heiko Schocher Date: Fri, 6 Sep 2013 05:21:23 +0200 Subject: nand, davinci: add special UBL ecc position enable the RBL/UBL ECC layout through CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC define see for more info: http://processors.wiki.ti.com/index.php/DM365_Nand_ECC_layout Signed-off-by: Heiko Schocher Cc: Tom Rini Cc: Scott Wood --- drivers/mtd/nand/davinci_nand.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'drivers') diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c index d8bb5d3..5b17d7b 100644 --- a/drivers/mtd/nand/davinci_nand.c +++ b/drivers/mtd/nand/davinci_nand.c @@ -266,6 +266,17 @@ static int nand_davinci_correct_data(struct mtd_info *mtd, u_char *dat, static struct nand_ecclayout nand_davinci_4bit_layout_oobfirst = { #if defined(CONFIG_SYS_NAND_PAGE_2K) .eccbytes = 40, +#ifdef CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC + .eccpos = { + 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, + 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, + 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, + 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, + }, + .oobfree = { + {2, 4}, {16, 6}, {32, 6}, {48, 6}, + }, +#else .eccpos = { 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, @@ -276,6 +287,7 @@ static struct nand_ecclayout nand_davinci_4bit_layout_oobfirst = { .oobfree = { {.offset = 2, .length = 22, }, }, +#endif /* #ifdef CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC */ #elif defined(CONFIG_SYS_NAND_PAGE_4K) .eccbytes = 80, .eccpos = { -- cgit v1.1 From 32e4f6bf2e35e99e1742c005e1ede4e0cf5f066c Mon Sep 17 00:00:00 2001 From: Bo Shen Date: Wed, 18 Sep 2013 15:07:44 +0800 Subject: net: macb: get DMA bus width from design config register MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Get DMA bus width from design config register Signed-off-by: Bo Shen Signed-off-by: Andreas Bießmann --- drivers/net/macb.c | 20 +++++++++++++++++++- drivers/net/macb.h | 11 +++++++++++ 2 files changed, 30 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/net/macb.c b/drivers/net/macb.c index bf3983a..781a272 100644 --- a/drivers/net/macb.c +++ b/drivers/net/macb.c @@ -621,6 +621,24 @@ static u32 gem_mdc_clk_div(int id, struct macb_device *macb) return config; } +/* + * Get the DMA bus width field of the network configuration register that we + * should program. We find the width from decoding the design configuration + * register to find the maximum supported data bus width. + */ +static u32 macb_dbw(struct macb_device *macb) +{ + switch (GEM_BFEXT(DBWDEF, gem_readl(macb, DCFG1))) { + case 4: + return GEM_BF(DBW, GEM_DBW128); + case 2: + return GEM_BF(DBW, GEM_DBW64); + case 1: + default: + return GEM_BF(DBW, GEM_DBW32); + } +} + int macb_eth_initialize(int id, void *regs, unsigned int phy_addr) { struct macb_device *macb; @@ -665,7 +683,7 @@ int macb_eth_initialize(int id, void *regs, unsigned int phy_addr) */ if (macb_is_gem(macb)) { ncfgr = gem_mdc_clk_div(id, macb); - ncfgr |= GEM_BF(DBW, 1); + ncfgr |= macb_dbw(macb); } else { ncfgr = macb_mdc_clk_div(id, macb); } diff --git a/drivers/net/macb.h b/drivers/net/macb.h index de5214f..06f7c66 100644 --- a/drivers/net/macb.h +++ b/drivers/net/macb.h @@ -58,6 +58,9 @@ #define MACB_WOL 0x00c4 #define MACB_MID 0x00fc +/* GEM specific register offsets */ +#define GEM_DCFG1 0x0280 + /* Bitfields in NCR */ #define MACB_LB_OFFSET 0 #define MACB_LB_SIZE 1 @@ -242,6 +245,14 @@ #define MACB_IDNUM_SIZE 16 /* Bitfields in DCFG1 */ +#define GEM_DBWDEF_OFFSET 25 +#define GEM_DBWDEF_SIZE 3 + +/* constants for data bus width */ +#define GEM_DBW32 0 +#define GEM_DBW64 1 +#define GEM_DBW128 2 + /* Constants for CLK */ #define MACB_CLK_DIV8 0 #define MACB_CLK_DIV16 1 -- cgit v1.1 From d9bef0ad2daa2f6f0b635be12518da755ddcbdc1 Mon Sep 17 00:00:00 2001 From: Bo Shen Date: Mon, 21 Oct 2013 16:13:59 +0800 Subject: arm: atmel: at91sam9n12ek: add usb host support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add usb host support for at91sam9n12ek board. Signed-off-by: Bo Shen Signed-off-by: Andreas Bießmann --- drivers/usb/host/ohci-at91.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c index 9e90d59..05d6ff2 100644 --- a/drivers/usb/host/ohci-at91.c +++ b/drivers/usb/host/ohci-at91.c @@ -20,11 +20,14 @@ int usb_cpu_init(void) #if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \ defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) || \ - defined(CONFIG_AT91SAM9261) + defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9N12) /* Enable PLLB */ writel(get_pllb_init(), &pmc->pllbr); while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB) ; +#ifdef CONFIG_AT91SAM9N12 + writel(AT91_PMC_USBS_USB_PLLB | AT91_PMC_USB_DIV_2, &pmc->usb); +#endif #elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) || \ defined(CONFIG_AT91SAM9X5) || defined(CONFIG_SAMA5D3) /* Enable UPLL */ @@ -71,7 +74,11 @@ int usb_cpu_stop(void) #endif #if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \ - defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) + defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) || \ + defined(CONFIG_AT91SAM9N12) +#ifdef CONFIG_AT91SAM9N12 + writel(0, &pmc->usb); +#endif /* Disable PLLB */ writel(0, &pmc->pllbr); while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != 0) -- cgit v1.1 From dcd2f1a0d2875a1386535e2e0db9bfbd57a8fadb Mon Sep 17 00:00:00 2001 From: Bo Shen Date: Mon, 21 Oct 2013 16:14:00 +0800 Subject: arm: atmel: get rid of too many ifdeffery MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Get rid of too many ifdeffery in usb ohci driver Add following two configuration for USB clock selecting - CONFIG_USB_ATMEL_CLK_SEL_PLLB: using PLLB as usb ohci input clock - CONFIG_USB_ATMEL_CLK_SEL_UPLL: using UPLL as usb ohci input clock Signed-off-by: Bo Shen Signed-off-by: Andreas Bießmann --- drivers/usb/host/ohci-at91.c | 14 ++++---------- 1 file changed, 4 insertions(+), 10 deletions(-) (limited to 'drivers') diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c index 05d6ff2..c24505e 100644 --- a/drivers/usb/host/ohci-at91.c +++ b/drivers/usb/host/ohci-at91.c @@ -18,9 +18,7 @@ int usb_cpu_init(void) { at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC; -#if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \ - defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) || \ - defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9N12) +#ifdef CONFIG_USB_ATMEL_CLK_SEL_PLLB /* Enable PLLB */ writel(get_pllb_init(), &pmc->pllbr); while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB) @@ -28,8 +26,7 @@ int usb_cpu_init(void) #ifdef CONFIG_AT91SAM9N12 writel(AT91_PMC_USBS_USB_PLLB | AT91_PMC_USB_DIV_2, &pmc->usb); #endif -#elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) || \ - defined(CONFIG_AT91SAM9X5) || defined(CONFIG_SAMA5D3) +#elif defined(CONFIG_USB_ATMEL_CLK_SEL_UPLL) /* Enable UPLL */ writel(readl(&pmc->uckr) | AT91_PMC_UPLLEN | AT91_PMC_BIASEN, &pmc->uckr); @@ -73,9 +70,7 @@ int usb_cpu_stop(void) writel(ATMEL_PMC_UHP, &pmc->scdr); #endif -#if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \ - defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) || \ - defined(CONFIG_AT91SAM9N12) +#ifdef CONFIG_USB_ATMEL_CLK_SEL_PLLB #ifdef CONFIG_AT91SAM9N12 writel(0, &pmc->usb); #endif @@ -83,8 +78,7 @@ int usb_cpu_stop(void) writel(0, &pmc->pllbr); while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != 0) ; -#elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) || \ - defined(CONFIG_AT91SAM9X5) || defined(CONFIG_SAMA5D3) +#elif defined(CONFIG_USB_ATMEL_CLK_SEL_UPLL) /* Disable UPLL */ writel(readl(&pmc->uckr) & (~AT91_PMC_UPLLEN), &pmc->uckr); while ((readl(&pmc->sr) & AT91_PMC_LOCKU) == AT91_PMC_LOCKU) -- cgit v1.1