From 62db0b3d62366f1573d245a96d3ebbfa3bac118d Mon Sep 17 00:00:00 2001 From: Stefano Babic Date: Sat, 23 Feb 2013 11:07:29 +0100 Subject: USB: drop unneeded header in ehci-mx6 Including header for pads is not needed and breaks board after renaming pin definitions. Series-to: u-boot Series-cc: marex@denx.de,fabio.estevam@freescale.com,eric.nelson@boundarydevices.com Signed-off-by: Stefano Babic --- drivers/usb/host/ehci-mx6.c | 1 - 1 file changed, 1 deletion(-) (limited to 'drivers') diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c index 1b20e41..c1ae3d9 100644 --- a/drivers/usb/host/ehci-mx6.c +++ b/drivers/usb/host/ehci-mx6.c @@ -21,7 +21,6 @@ #include #include #include -#include #include #include "ehci.h" -- cgit v1.1 From 3430e0bd2aa5b94fdd5f7627172a5cb540776c9d Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 23 Feb 2013 02:42:58 +0000 Subject: mxs: mmc: spi: dma: Better wrap the MXS differences This patch streamlines the differences between the MX23 and MX28 by implementing a few helper functions to handle different DMA channel mapping, different clock domain for SSP block and fixes a few minor bugs. First of all, the DMA channel mapping is now fixed in dma.h by defining the actual channel map for both MX23 and MX28. Thus, MX23 now does no longer use MX28 channel map which was wrong. Also, there is a fix for MX28 DMA channel map, where the last four channels were incorrect. Next, because correct DMA channel map is in place, the mxs_dma_init_channel() call now bases the channel ID starting from SSP port #0. This removes the need for DMA channel offset being added and cleans up the code. For the same reason, the SSP0 offset can now be used in mxs_dma_desc_append(), thus no need to adjust dma channel number in the driver either. Lastly, the SSP clock ID is now retrieved by calling mxs_ssp_clock_by_bus() which handles the fact that MX23 has shared SSP clock for both ports, while MX28 has per-port SSP clock. Finally, the mxs_ssp_bus_id_valid() pulls out two implementations of the same functionality from MMC and SPI driver into common code. Signed-off-by: Marek Vasut Cc: Fabio Estevam Cc: Otavio Salvador Cc: Stefano Babic --- drivers/mmc/mxsmmc.c | 20 ++++---------------- drivers/spi/mxs_spi.c | 4 ++-- 2 files changed, 6 insertions(+), 18 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/mxsmmc.c b/drivers/mmc/mxsmmc.c index a72f66c..b1537e2 100644 --- a/drivers/mmc/mxsmmc.c +++ b/drivers/mmc/mxsmmc.c @@ -53,12 +53,6 @@ struct mxsmmc_priv { struct mxs_dma_desc *desc; }; -#if defined(CONFIG_MX23) -static const unsigned int mxsmmc_id_offset = 1; -#elif defined(CONFIG_MX28) -static const unsigned int mxsmmc_id_offset = 0; -#endif - #define MXSMMC_MAX_TIMEOUT 10000 #define MXSMMC_SMALL_TRANSFER 512 @@ -137,7 +131,7 @@ static int mxsmmc_send_cmd_dma(struct mxsmmc_priv *priv, struct mmc_data *data) priv->desc->cmd.data |= MXS_DMA_DESC_IRQ | MXS_DMA_DESC_DEC_SEM | (data_count << MXS_DMA_DESC_BYTES_OFFSET); - dmach = MXS_DMA_CHANNEL_AHB_APBH_SSP0 + priv->id + mxsmmc_id_offset; + dmach = MXS_DMA_CHANNEL_AHB_APBH_SSP0 + priv->id; mxs_dma_desc_append(dmach, priv->desc); if (mxs_dma_go(dmach)) { bounce_buffer_stop(&bbstate); @@ -390,15 +384,9 @@ int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int), int (*cd)(int)) struct mmc *mmc = NULL; struct mxsmmc_priv *priv = NULL; int ret; -#if defined(CONFIG_MX23) - const unsigned int mxsmmc_max_id = 2; - const unsigned int mxsmmc_clk_id = 0; -#elif defined(CONFIG_MX28) - const unsigned int mxsmmc_max_id = 4; - const unsigned int mxsmmc_clk_id = id; -#endif + const unsigned int mxsmmc_clk_id = mxs_ssp_clock_by_bus(id); - if (id >= mxsmmc_max_id) + if (!mxs_ssp_bus_id_valid(id)) return -ENODEV; mmc = malloc(sizeof(struct mmc)); @@ -418,7 +406,7 @@ int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int), int (*cd)(int)) return -ENOMEM; } - ret = mxs_dma_init_channel(id + mxsmmc_id_offset); + ret = mxs_dma_init_channel(MXS_DMA_CHANNEL_AHB_APBH_SSP0 + id); if (ret) return ret; diff --git a/drivers/spi/mxs_spi.c b/drivers/spi/mxs_spi.c index bb865b7..6acc95a 100644 --- a/drivers/spi/mxs_spi.c +++ b/drivers/spi/mxs_spi.c @@ -70,7 +70,7 @@ void spi_init(void) int spi_cs_is_valid(unsigned int bus, unsigned int cs) { /* MXS SPI: 4 ports and 3 chip selects maximum */ - if (bus > 3 || cs > 2) + if (!mxs_ssp_bus_id_valid(bus) || cs > 2) return 0; else return 1; @@ -92,7 +92,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, if (!mxs_slave) return NULL; - if (mxs_dma_init_channel(bus)) + if (mxs_dma_init_channel(MXS_DMA_CHANNEL_AHB_APBH_SSP0 + bus)) goto err_init; mxs_slave->slave.bus = bus; -- cgit v1.1 From c96e78ccfe81394d87cbff855f40f5d7cd377811 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 23 Feb 2013 02:42:59 +0000 Subject: mxs: spi: Fix the MXS SPI for mx23 The MX23 has slightly different register layout. Adjust the SPI driver to match the layout, both the PIO and DMA part. Signed-off-by: Marek Vasut Cc: Fabio Estevam Cc: Otavio Salvador Cc: Stefano Babic --- drivers/spi/mxs_spi.c | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/spi/mxs_spi.c b/drivers/spi/mxs_spi.c index 6acc95a..b5b32dc 100644 --- a/drivers/spi/mxs_spi.c +++ b/drivers/spi/mxs_spi.c @@ -168,7 +168,12 @@ static int mxs_spi_xfer_pio(struct mxs_spi_slave *slave, while (length--) { /* We transfer 1 byte */ +#if defined(CONFIG_MX23) + writel(SSP_CTRL0_XFER_COUNT_MASK, &ssp_regs->hw_ssp_ctrl0_clr); + writel(1, &ssp_regs->hw_ssp_ctrl0_set); +#elif defined(CONFIG_MX28) writel(1, &ssp_regs->hw_ssp_xfer_size); +#endif if ((flags & SPI_XFER_END) && !length) mxs_spi_end_xfer(ssp_regs); @@ -226,6 +231,12 @@ static int mxs_spi_xfer_dma(struct mxs_spi_slave *slave, int tl; int ret = 0; +#if defined(CONFIG_MX23) + const int mxs_spi_pio_words = 1; +#elif defined(CONFIG_MX28) + const int mxs_spi_pio_words = 4; +#endif + ALLOC_CACHE_ALIGN_BUFFER(struct mxs_dma_desc, desc, desc_count); memset(desc, 0, sizeof(struct mxs_dma_desc) * desc_count); @@ -281,7 +292,7 @@ static int mxs_spi_xfer_dma(struct mxs_spi_slave *slave, dp->cmd.data |= ((tl & 0xffff) << MXS_DMA_DESC_BYTES_OFFSET) | - (4 << MXS_DMA_DESC_PIO_WORDS_OFFSET) | + (mxs_spi_pio_words << MXS_DMA_DESC_PIO_WORDS_OFFSET) | MXS_DMA_DESC_HALT_ON_TERMINATE | MXS_DMA_DESC_TERMINATE_FLUSH; @@ -298,15 +309,19 @@ static int mxs_spi_xfer_dma(struct mxs_spi_slave *slave, } /* - * Write CTRL0, CMD0, CMD1, XFER_SIZE registers. It is + * Write CTRL0, CMD0, CMD1 and XFER_SIZE registers in + * case of MX28, write only CTRL0 in case of MX23 due + * to the difference in register layout. It is utterly * essential that the XFER_SIZE register is written on * a per-descriptor basis with the same size as is the * descriptor! */ dp->cmd.pio_words[0] = ctrl0; +#ifdef CONFIG_MX28 dp->cmd.pio_words[1] = 0; dp->cmd.pio_words[2] = 0; dp->cmd.pio_words[3] = tl; +#endif mxs_dma_desc_append(dmach, dp); -- cgit v1.1 From d3f26a27003d55ce17ca54e84799fa18b965c3dc Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 23 Feb 2013 02:43:00 +0000 Subject: mxs: spi: Remove CONFIG_MXS_SPI_DMA_ENABLE The CONFIG_MXS_SPI_DMA_ENABLE is no longer relevant as the SPI DMA has proven to work correctly. Remove this configuration option. Signed-off-by: Marek Vasut Cc: Fabio Estevam Cc: Otavio Salvador Cc: Stefano Babic --- drivers/spi/mxs_spi.c | 16 ---------------- 1 file changed, 16 deletions(-) (limited to 'drivers') diff --git a/drivers/spi/mxs_spi.c b/drivers/spi/mxs_spi.c index b5b32dc..ffa3c1d 100644 --- a/drivers/spi/mxs_spi.c +++ b/drivers/spi/mxs_spi.c @@ -40,17 +40,6 @@ #define MXSSSP_SMALL_TRANSFER 512 -/* - * CONFIG_MXS_SPI_DMA_ENABLE: Experimental mixed PIO/DMA support for MXS SPI - * host. Use with utmost caution! - * - * Enabling this is not yet recommended since this - * still doesn't support transfers to/from unaligned - * addresses. Therefore this driver will not work - * for example with saving environment. This is - * caused by DMA alignment constraints on MXS. - */ - struct mxs_spi_slave { struct spi_slave slave; uint32_t max_khz; @@ -347,12 +336,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, char dummy; int write = 0; char *data = NULL; - -#ifdef CONFIG_MXS_SPI_DMA_ENABLE int dma = 1; -#else - int dma = 0; -#endif if (bitlen == 0) { if (flags & SPI_XFER_END) { -- cgit v1.1 From 47f13315061b4f931a9263924627b870ec083578 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 23 Feb 2013 02:43:01 +0000 Subject: mxs: Squash the header file usage in ehci-mxs The ehci-mxs driver included the register definitions directly. Use imx-regs.h instead since it contains proper handling of the differences between mx23 and mx28. Signed-off-by: Marek Vasut Cc: Fabio Estevam Cc: Otavio Salvador Cc: Stefano Babic Acked-by: Otavio Salvador --- drivers/usb/host/ehci-mxs.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) (limited to 'drivers') diff --git a/drivers/usb/host/ehci-mxs.c b/drivers/usb/host/ehci-mxs.c index 5062af5..0ca7545 100644 --- a/drivers/usb/host/ehci-mxs.c +++ b/drivers/usb/host/ehci-mxs.c @@ -21,11 +21,7 @@ #include #include -#include -#include -#include -#include -#include +#include #include "ehci.h" -- cgit v1.1 From afa872109942b37fce291b592d6f2f02f55a4021 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 23 Feb 2013 02:43:02 +0000 Subject: mxs: Make ehci-mxs multiport capable Rework ehci-mxs so it supports both ports on MX28. It was necessary to wrap the per-port configuration into struct ehci_mxs_port and pull out the clock configuration function. Signed-off-by: Marek Vasut Cc: Fabio Estevam Cc: Otavio Salvador Cc: Stefano Babic --- drivers/usb/host/ehci-mxs.c | 149 ++++++++++++++++++++++++-------------------- 1 file changed, 81 insertions(+), 68 deletions(-) (limited to 'drivers') diff --git a/drivers/usb/host/ehci-mxs.c b/drivers/usb/host/ehci-mxs.c index 0ca7545..f320d3e 100644 --- a/drivers/usb/host/ehci-mxs.c +++ b/drivers/usb/host/ehci-mxs.c @@ -22,86 +22,106 @@ #include #include #include +#include #include "ehci.h" -#if (CONFIG_EHCI_MXS_PORT != 0) && (CONFIG_EHCI_MXS_PORT != 1) -#error "MXS EHCI: Invalid port selected!" -#endif - -#ifndef CONFIG_EHCI_MXS_PORT -#error "MXS EHCI: Please define correct port using CONFIG_EHCI_MXS_PORT!" -#endif +/* This DIGCTL register ungates clock to USB */ +#define HW_DIGCTL_CTRL 0x8001c000 +#define HW_DIGCTL_CTRL_USB0_CLKGATE (1 << 2) +#define HW_DIGCTL_CTRL_USB1_CLKGATE (1 << 16) -static struct ehci_mxs { - struct mxs_usb_regs *usb_regs; +struct ehci_mxs_port { + uint32_t usb_regs; struct mxs_usbphy_regs *phy_regs; -} ehci_mxs; -int mxs_ehci_get_port(struct ehci_mxs *mxs_usb, int port) + struct mxs_register_32 *pll; + uint32_t pll_en_bits; + uint32_t pll_dis_bits; + uint32_t gate_bits; +}; + +static const struct ehci_mxs_port mxs_port[] = { +#ifdef CONFIG_EHCI_MXS_PORT0 + { + MXS_USBCTRL0_BASE, + (struct mxs_usbphy_regs *)MXS_USBPHY0_BASE, + (struct mxs_register_32 *)(MXS_CLKCTRL_BASE + + offsetof(struct mxs_clkctrl_regs, + hw_clkctrl_pll0ctrl0_reg)), + CLKCTRL_PLL0CTRL0_EN_USB_CLKS | CLKCTRL_PLL0CTRL0_POWER, + CLKCTRL_PLL0CTRL0_EN_USB_CLKS, + HW_DIGCTL_CTRL_USB0_CLKGATE, + }, +#endif +#ifdef CONFIG_EHCI_MXS_PORT1 + { + MXS_USBCTRL1_BASE, + (struct mxs_usbphy_regs *)MXS_USBPHY1_BASE, + (struct mxs_register_32 *)(MXS_CLKCTRL_BASE + + offsetof(struct mxs_clkctrl_regs, + hw_clkctrl_pll1ctrl0_reg)), + CLKCTRL_PLL1CTRL0_EN_USB_CLKS | CLKCTRL_PLL1CTRL0_POWER, + CLKCTRL_PLL1CTRL0_EN_USB_CLKS, + HW_DIGCTL_CTRL_USB1_CLKGATE, + }, +#endif +}; + +static int ehci_mxs_toggle_clock(const struct ehci_mxs_port *port, int enable) { - uint32_t usb_base, phy_base; - switch (port) { - case 0: - usb_base = MXS_USBCTRL0_BASE; - phy_base = MXS_USBPHY0_BASE; - break; - case 1: - usb_base = MXS_USBCTRL1_BASE; - phy_base = MXS_USBPHY1_BASE; - break; - default: - printf("CONFIG_EHCI_MXS_PORT (port = %d)\n", port); - return -1; + struct mxs_register_32 *digctl_ctrl = + (struct mxs_register_32 *)HW_DIGCTL_CTRL; + int pll_offset, dig_offset; + + if (enable) { + pll_offset = offsetof(struct mxs_register_32, reg_set); + dig_offset = offsetof(struct mxs_register_32, reg_clr); + writel(port->gate_bits, (u32)&digctl_ctrl->reg + dig_offset); + writel(port->pll_en_bits, (u32)port->pll + pll_offset); + } else { + pll_offset = offsetof(struct mxs_register_32, reg_clr); + dig_offset = offsetof(struct mxs_register_32, reg_set); + writel(port->pll_dis_bits, (u32)port->pll + pll_offset); + writel(port->gate_bits, (u32)&digctl_ctrl->reg + dig_offset); } - mxs_usb->usb_regs = (struct mxs_usb_regs *)usb_base; - mxs_usb->phy_regs = (struct mxs_usbphy_regs *)phy_base; return 0; } -/* This DIGCTL register ungates clock to USB */ -#define HW_DIGCTL_CTRL 0x8001c000 -#define HW_DIGCTL_CTRL_USB0_CLKGATE (1 << 2) -#define HW_DIGCTL_CTRL_USB1_CLKGATE (1 << 16) - int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor) { int ret; uint32_t usb_base, cap_base; - struct mxs_register_32 *digctl_ctrl = - (struct mxs_register_32 *)HW_DIGCTL_CTRL; - struct mxs_clkctrl_regs *clkctrl_regs = - (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE; + const struct ehci_mxs_port *port; - ret = mxs_ehci_get_port(&ehci_mxs, CONFIG_EHCI_MXS_PORT); - if (ret) - return ret; + if ((index < 0) || (index >= ARRAY_SIZE(mxs_port))) { + printf("Invalid port index (index = %d)!\n", index); + return -EINVAL; + } + + port = &mxs_port[index]; /* Reset the PHY block */ - writel(USBPHY_CTRL_SFTRST, &ehci_mxs.phy_regs->hw_usbphy_ctrl_set); + writel(USBPHY_CTRL_SFTRST, &port->phy_regs->hw_usbphy_ctrl_set); udelay(10); writel(USBPHY_CTRL_SFTRST | USBPHY_CTRL_CLKGATE, - &ehci_mxs.phy_regs->hw_usbphy_ctrl_clr); + &port->phy_regs->hw_usbphy_ctrl_clr); /* Enable USB clock */ - writel(CLKCTRL_PLL0CTRL0_EN_USB_CLKS | CLKCTRL_PLL0CTRL0_POWER, - &clkctrl_regs->hw_clkctrl_pll0ctrl0_set); - writel(CLKCTRL_PLL1CTRL0_EN_USB_CLKS | CLKCTRL_PLL1CTRL0_POWER, - &clkctrl_regs->hw_clkctrl_pll1ctrl0_set); - - writel(HW_DIGCTL_CTRL_USB0_CLKGATE | HW_DIGCTL_CTRL_USB1_CLKGATE, - &digctl_ctrl->reg_clr); + ret = ehci_mxs_toggle_clock(port, 1); + if (ret) + return ret; /* Start USB PHY */ - writel(0, &ehci_mxs.phy_regs->hw_usbphy_pwd); + writel(0, &port->phy_regs->hw_usbphy_pwd); /* Enable UTMI+ Level 2 and Level 3 compatibility */ writel(USBPHY_CTRL_ENUTMILEVEL3 | USBPHY_CTRL_ENUTMILEVEL2 | 1, - &ehci_mxs.phy_regs->hw_usbphy_ctrl_set); + &port->phy_regs->hw_usbphy_ctrl_set); - usb_base = ((uint32_t)ehci_mxs.usb_regs) + 0x100; + usb_base = port->usb_regs + 0x100; *hccr = (struct ehci_hccr *)usb_base; cap_base = ehci_readl(&(*hccr)->cr_capbase); @@ -114,19 +134,19 @@ int ehci_hcd_stop(int index) { int ret; uint32_t usb_base, cap_base, tmp; - struct mxs_register_32 *digctl_ctrl = - (struct mxs_register_32 *)HW_DIGCTL_CTRL; - struct mxs_clkctrl_regs *clkctrl_regs = - (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE; struct ehci_hccr *hccr; struct ehci_hcor *hcor; + const struct ehci_mxs_port *port; - ret = mxs_ehci_get_port(&ehci_mxs, CONFIG_EHCI_MXS_PORT); - if (ret) - return ret; + if ((index < 0) || (index >= ARRAY_SIZE(mxs_port))) { + printf("Invalid port index (index = %d)!\n", index); + return -EINVAL; + } + + port = &mxs_port[index]; /* Stop the USB port */ - usb_base = ((uint32_t)ehci_mxs.usb_regs) + 0x100; + usb_base = port->usb_regs + 0x100; hccr = (struct ehci_hccr *)usb_base; cap_base = ehci_readl(&hccr->cr_capbase); hcor = (struct ehci_hcor *)(usb_base + HC_LENGTH(cap_base)); @@ -140,17 +160,10 @@ int ehci_hcd_stop(int index) USBPHY_PWD_RXPWD1PT1 | USBPHY_PWD_RXPWDENV | USBPHY_PWD_TXPWDV2I | USBPHY_PWD_TXPWDIBIAS | USBPHY_PWD_TXPWDFS; - writel(tmp, &ehci_mxs.phy_regs->hw_usbphy_pwd); + writel(tmp, &port->phy_regs->hw_usbphy_pwd); /* Disable USB clock */ - writel(CLKCTRL_PLL0CTRL0_EN_USB_CLKS, - &clkctrl_regs->hw_clkctrl_pll0ctrl0_clr); - writel(CLKCTRL_PLL1CTRL0_EN_USB_CLKS, - &clkctrl_regs->hw_clkctrl_pll1ctrl0_clr); + ret = ehci_mxs_toggle_clock(port, 0); - /* Gate off the USB clock */ - writel(HW_DIGCTL_CTRL_USB0_CLKGATE | HW_DIGCTL_CTRL_USB1_CLKGATE, - &digctl_ctrl->reg_set); - - return 0; + return ret; } -- cgit v1.1