From 7d045170ac1bf512ed148e97432b7a8d772943e9 Mon Sep 17 00:00:00 2001 From: Martin Pietryka Date: Wed, 27 Apr 2016 21:39:15 +0200 Subject: drivers/video/am335x-fb: Add support for 16bpp format To support 16bpp we just need to change the raster_ctrl register accordingly. Also 32bpp mode should work as well, but was not tested. According to the TRM the uppermost byte will be ignored when LCD_TFT_24BPP_UNPACK is set. The switch logic is based on the Linux kernel tilcdc driver: drivers/gpu/drm/tilcdc/tilcdc_crtc.c: lines 407 through 419 (kernel was checked out at commit: bcc981e9ed8) Signed-off-by: Martin Pietryka Reviewed-by: Hannes Schmelzer Tested-by: Hannes Schmelzer --- drivers/video/am335x-fb.c | 22 +++++++++++++++++++--- 1 file changed, 19 insertions(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/video/am335x-fb.c b/drivers/video/am335x-fb.c index 0ec843f..d984435 100644 --- a/drivers/video/am335x-fb.c +++ b/drivers/video/am335x-fb.c @@ -5,7 +5,7 @@ * minimal framebuffer driver for TI's AM335x SoC to be compatible with * Wolfgang Denk's LCD-Framework (CONFIG_LCD, common/lcd.c) * - * - supporting only 24bit RGB/TFT raster Mode (not using palette) + * - supporting 16/24/32bit RGB/TFT raster Mode (not using palette) * - sets up LCD controller as in 'am335x_lcdpanel' struct given * - starts output DMA from gd->fb_base buffer * @@ -106,6 +106,8 @@ int lcd_get_size(int *line_length) int am335xfb_init(struct am335x_lcdpanel *panel) { + u32 raster_ctrl = 0; + if (0 == gd->fb_base) { printf("ERROR: no valid fb_base stored in GLOBAL_DATA_PTR!\n"); return -1; @@ -115,6 +117,21 @@ int am335xfb_init(struct am335x_lcdpanel *panel) return -1; } + /* We can already set the bits for the raster_ctrl in this check */ + switch (panel->bpp) { + case 16: + break; + case 32: + raster_ctrl |= LCD_TFT_24BPP_UNPACK; + /* fallthrough */ + case 24: + raster_ctrl |= LCD_TFT_24BPP_MODE; + break; + default: + error("am335x-fb: invalid bpp value: %d\n", panel->bpp); + return -1; + } + debug("setting up LCD-Controller for %dx%dx%d (hfp=%d,hbp=%d,hsw=%d / ", panel->hactive, panel->vactive, panel->bpp, panel->hfp, panel->hbp, panel->hsw); @@ -157,8 +174,7 @@ int am335xfb_init(struct am335x_lcdpanel *panel) LCD_HBPMSB(panel->hbp) | LCD_HFPMSB(panel->hfp) | 0x0000FF00; /* clk cycles for ac-bias */ - lcdhw->raster_ctrl = LCD_TFT_24BPP_MODE | - LCD_TFT_24BPP_UNPACK | + lcdhw->raster_ctrl = raster_ctrl | LCD_PALMODE_RAWDATA | LCD_TFT_MODE | LCD_RASTER_ENABLE; -- cgit v1.1 From 3d47b2d741683023de05f08f9adb4bd25c189c46 Mon Sep 17 00:00:00 2001 From: Martin Pietryka Date: Wed, 27 Apr 2016 21:39:16 +0200 Subject: drivers/video/am335x-fb: Properly point framebuffer behind palette The DMA was outputting the palette on the screen because the base for the DMA was not after the palette. In addition to that, the ceiling was also too high, this led that the output on the screen was shifted. NOTE: According to the TRM, even in 16/24bit mode a palette is required in the first 32 bytes of the framebuffer. See also: https://e2e.ti.com/support/arm/sitara_arm/f/791/p/234967/834483#834483 "In this mode, the LCDC will assume all information is data and thus you need to ensure that the DMA points to the first pixel of data and not the first entry in the frame buffer which is the beginning of the 512 byte palette." Signed-off-by: Martin Pietryka Reviewed-by: Hannes Schmelzer Tested-by: Hannes Schmelzer --- drivers/video/am335x-fb.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/video/am335x-fb.c b/drivers/video/am335x-fb.c index d984435..bb5cc97 100644 --- a/drivers/video/am335x-fb.c +++ b/drivers/video/am335x-fb.c @@ -143,6 +143,8 @@ int am335xfb_init(struct am335x_lcdpanel *panel) /* palette default entry */ memset((void *)gd->fb_base, 0, 0x20); *(unsigned int *)gd->fb_base = 0x4000; + /* point fb behind palette */ + gd->fb_base += 0x20; /* turn ON display through powercontrol function if accessible */ if (0 != panel->panel_power_ctrl) @@ -154,9 +156,9 @@ int am335xfb_init(struct am335x_lcdpanel *panel) lcdhw->raster_ctrl = 0; lcdhw->ctrl = LCD_CLK_DIVISOR(panel->pxl_clk_div) | LCD_RASTER_MODE; lcdhw->lcddma_fb0_base = gd->fb_base; - lcdhw->lcddma_fb0_ceiling = gd->fb_base + FBSIZE(panel) + 0x20; + lcdhw->lcddma_fb0_ceiling = gd->fb_base + FBSIZE(panel); lcdhw->lcddma_fb1_base = gd->fb_base; - lcdhw->lcddma_fb1_ceiling = gd->fb_base + FBSIZE(panel) + 0x20; + lcdhw->lcddma_fb1_ceiling = gd->fb_base + FBSIZE(panel); lcdhw->lcddma_ctrl = LCD_DMA_BURST_SIZE(LCD_DMA_BURST_16); lcdhw->raster_timing0 = LCD_HORLSB(panel->hactive) | @@ -179,8 +181,6 @@ int am335xfb_init(struct am335x_lcdpanel *panel) LCD_TFT_MODE | LCD_RASTER_ENABLE; - gd->fb_base += 0x20; /* point fb behind palette */ - debug("am335x-fb: waiting picture to be stable.\n."); mdelay(panel->pon_delay); -- cgit v1.1 From eae4b2b67bc8c68e2440616a447ca6c6898ad188 Mon Sep 17 00:00:00 2001 From: Vagrant Cascadian Date: Sat, 30 Apr 2016 19:18:00 -0700 Subject: Fix spelling of "occurred". Signed-off-by: Vagrant Cascadian Reviewed-by: Simon Glass --- drivers/ddr/marvell/a38x/ddr3_init.h | 2 +- drivers/ddr/marvell/axp/ddr3_hw_training.h | 2 +- drivers/i2c/kona_i2c.c | 2 +- drivers/mtd/nand/omap_gpmc.c | 4 ++-- drivers/net/4xx_enet.c | 4 ++-- drivers/net/enc28j60.c | 2 +- drivers/net/ne2000_base.c | 4 ++-- drivers/usb/gadget/mpc8xx_udc.c | 2 +- drivers/usb/musb/musb_hcd.c | 6 +++--- 9 files changed, 14 insertions(+), 14 deletions(-) (limited to 'drivers') diff --git a/drivers/ddr/marvell/a38x/ddr3_init.h b/drivers/ddr/marvell/a38x/ddr3_init.h index cb3fb24..8cb0886 100644 --- a/drivers/ddr/marvell/a38x/ddr3_init.h +++ b/drivers/ddr/marvell/a38x/ddr3_init.h @@ -120,7 +120,7 @@ #define MV_NO_RESOURCE (0x13) /* Resource not available (memory ...) */ #define MV_FULL (0x14) /* Item is full (Queue or table etc...) */ #define MV_EMPTY (0x15) /* Item is empty (Queue or table etc...) */ -#define MV_INIT_ERROR (0x16) /* Error occured while INIT process */ +#define MV_INIT_ERROR (0x16) /* Error occurred while INIT process */ #define MV_HW_ERROR (0x17) /* Hardware error */ #define MV_TX_ERROR (0x18) /* Transmit operation not succeeded */ #define MV_RX_ERROR (0x19) /* Recieve operation not succeeded */ diff --git a/drivers/ddr/marvell/axp/ddr3_hw_training.h b/drivers/ddr/marvell/axp/ddr3_hw_training.h index cffa7c4..343a6b6 100644 --- a/drivers/ddr/marvell/axp/ddr3_hw_training.h +++ b/drivers/ddr/marvell/axp/ddr3_hw_training.h @@ -41,7 +41,7 @@ #define MV_NO_RESOURCE (0x13) /* Resource not available (memory ...) */ #define MV_FULL (0x14) /* Item is full (Queue or table etc...) */ #define MV_EMPTY (0x15) /* Item is empty (Queue or table etc...) */ -#define MV_INIT_ERROR (0x16) /* Error occured while INIT process */ +#define MV_INIT_ERROR (0x16) /* Error occurred while INIT process */ #define MV_HW_ERROR (0x17) /* Hardware error */ #define MV_TX_ERROR (0x18) /* Transmit operation not succeeded */ #define MV_RX_ERROR (0x19) /* Recieve operation not succeeded */ diff --git a/drivers/i2c/kona_i2c.c b/drivers/i2c/kona_i2c.c index 9af496b..11f29d9 100644 --- a/drivers/i2c/kona_i2c.c +++ b/drivers/i2c/kona_i2c.c @@ -381,7 +381,7 @@ static int bcm_kona_i2c_write_fifo_single(struct bcm_kona_i2c_dev *dev, return -EREMOTEIO; } - /* Check if a timeout occured */ + /* Check if a timeout occurred */ if (!time_left) { printf("completion timed out\n"); return -EREMOTEIO; diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c index 4814fa2..6a45d28 100644 --- a/drivers/mtd/nand/omap_gpmc.c +++ b/drivers/mtd/nand/omap_gpmc.c @@ -106,7 +106,7 @@ static uint32_t gen_true_ecc(uint8_t *ecc_buf) /* * omap_correct_data - Compares the ecc read from nand spare area with ECC - * registers values and corrects one bit error if it has occured + * registers values and corrects one bit error if it has occurred * Further details can be had from OMAP TRM and the following selected links: * http://en.wikipedia.org/wiki/Hamming_code * http://www.cs.utexas.edu/users/plaxton/c/337/05f/slides/ErrorCorrection-4.pdf @@ -479,7 +479,7 @@ static void omap_reverse_list(u8 *list, unsigned int length) /* * omap_correct_data_bch - Compares the ecc read from nand spare area - * with ECC registers values and corrects one bit error if it has occured + * with ECC registers values and corrects one bit error if it has occurred * * @mtd: MTD device structure * @dat: page data diff --git a/drivers/net/4xx_enet.c b/drivers/net/4xx_enet.c index 3c30f42..bc52ed3 100644 --- a/drivers/net/4xx_enet.c +++ b/drivers/net/4xx_enet.c @@ -1726,7 +1726,7 @@ static void mal_err (struct eth_device *dev, unsigned long isr, mtdcr (MAL0_RXDEIR, 0x80000000); #ifdef INFO_4XX_ENET - printf("\nMAL error occured.... ISR = %lx UIC = = %lx MAL_DEF = %lx MAL_ERR= %lx\n", + printf("\nMAL error occurred.... ISR = %lx UIC = = %lx MAL_DEF = %lx MAL_ERR= %lx\n", isr, uic, maldef, mal_errr); #endif @@ -1740,7 +1740,7 @@ static void emac_err (struct eth_device *dev, unsigned long isr) { EMAC_4XX_HW_PST hw_p = dev->priv; - printf ("EMAC%d error occured.... ISR = %lx\n", hw_p->devnum, isr); + printf ("EMAC%d error occurred.... ISR = %lx\n", hw_p->devnum, isr); out_be32((void *)EMAC0_ISR + hw_p->hw_addr, isr); } diff --git a/drivers/net/enc28j60.c b/drivers/net/enc28j60.c index 59ea11c..611eabb 100644 --- a/drivers/net/enc28j60.c +++ b/drivers/net/enc28j60.c @@ -381,7 +381,7 @@ static int enc_phy_link_wait(enc_dev_t *enc) udelay(1000); } - /* timeout occured */ + /* timeout occurred */ printf("%s: link down\n", enc->dev->name); return 1; } diff --git a/drivers/net/ne2000_base.c b/drivers/net/ne2000_base.c index 71d133c..67bf140 100644 --- a/drivers/net/ne2000_base.c +++ b/drivers/net/ne2000_base.c @@ -582,7 +582,7 @@ dp83902a_Overflow(void) /* * Read in as many packets as we can and acknowledge any and receive * interrupts. Since the buffer has overflowed, a receive event of - * some kind will have occured. + * some kind will have occurred. */ dp83902a_RxEvent(); DP_OUT(base, DP_ISR, DP_ISR_RxP|DP_ISR_RxE); @@ -592,7 +592,7 @@ dp83902a_Overflow(void) DP_OUT(base, DP_TCR, DP_TCR_NORMAL); /* - * If a transmit command was issued, but no transmit event has occured, + * If a transmit command was issued, but no transmit event has occurred, * restart it here. */ DP_IN(base, DP_ISR, isr); diff --git a/drivers/usb/gadget/mpc8xx_udc.c b/drivers/usb/gadget/mpc8xx_udc.c index b3e178a..ad5ea7a 100644 --- a/drivers/usb/gadget/mpc8xx_udc.c +++ b/drivers/usb/gadget/mpc8xx_udc.c @@ -170,7 +170,7 @@ int udc_init (void) /* udc_irq * - * Poll for whatever events may have occured + * Poll for whatever events may have occurred */ void udc_irq (void) { diff --git a/drivers/usb/musb/musb_hcd.c b/drivers/usb/musb/musb_hcd.c index 9a3b61a..4947936 100644 --- a/drivers/usb/musb/musb_hcd.c +++ b/drivers/usb/musb/musb_hcd.c @@ -73,9 +73,9 @@ static void write_toggle(struct usb_device *dev, u8 ep, u8 dir_out) } /* - * This function checks if RxStall has occured on the endpoint. If a RxStall - * has occured, the RxStall is cleared and 1 is returned. If RxStall has - * not occured, 0 is returned. + * This function checks if RxStall has occurred on the endpoint. If a RxStall + * has occurred, the RxStall is cleared and 1 is returned. If RxStall has + * not occurred, 0 is returned. */ static u8 check_stall(u8 ep, u8 dir_out) { -- cgit v1.1 From 559019894b8db38a2cf3f74bed78be505d4f9a27 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 27 Apr 2016 14:53:33 +0200 Subject: usb: dwc2: Pass private data into dwc_otg_core_init() Pass the whole bulk of private data instead of just the regs, since the private data will soon contain important configuration flags. Signed-off-by: Marek Vasut Cc: Stefan Roese Cc: Dinh Nguyen --- drivers/usb/host/dwc2.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c index b2f4bc6..637b6c0 100644 --- a/drivers/usb/host/dwc2.c +++ b/drivers/usb/host/dwc2.c @@ -252,8 +252,9 @@ static void dwc_otg_core_host_init(struct dwc2_core_regs *regs) * * @param regs Programming view of the DWC_otg controller */ -static void dwc_otg_core_init(struct dwc2_core_regs *regs) +static void dwc_otg_core_init(struct dwc2_priv *priv) { + struct dwc2_core_regs *regs = priv->regs; uint32_t ahbcfg = 0; uint32_t usbcfg = 0; uint8_t brst_sz = CONFIG_DWC2_DMA_BURST_SIZE; @@ -1056,7 +1057,7 @@ static int dwc2_init_common(struct dwc2_priv *priv) return -ENODEV; } - dwc_otg_core_init(regs); + dwc_otg_core_init(priv); dwc_otg_core_host_init(regs); clrsetbits_le32(®s->hprt0, DWC2_HPRT0_PRTENA | -- cgit v1.1 From 618da5630b5629d1c506be17f642502b483dab1a Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 27 Apr 2016 14:55:57 +0200 Subject: usb: dwc2: Pull Ext VBUS macro from dwc_otg_core_init() Introduce a boolean flag in the dwc2 controller private data and set it according to the macro (for now) instead of having this macro directly in the dwc_otg_core_init(). This will let us configure the flag from DT or such later on, if needed. Signed-off-by: Marek Vasut Cc: Stefan Roese Cc: Dinh Nguyen --- drivers/usb/host/dwc2.c | 21 ++++++++++++++------- 1 file changed, 14 insertions(+), 7 deletions(-) (limited to 'drivers') diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c index 637b6c0..5673220 100644 --- a/drivers/usb/host/dwc2.c +++ b/drivers/usb/host/dwc2.c @@ -39,6 +39,7 @@ struct dwc2_priv { u8 out_data_toggle[MAX_DEVICE][MAX_ENDPOINT]; struct dwc2_core_regs *regs; int root_hub_devnum; + bool ext_vbus; }; #ifndef CONFIG_DM_USB @@ -263,13 +264,13 @@ static void dwc_otg_core_init(struct dwc2_priv *priv) usbcfg = readl(®s->gusbcfg); /* Program the ULPI External VBUS bit if needed */ -#ifdef CONFIG_DWC2_PHY_ULPI_EXT_VBUS - usbcfg |= (DWC2_GUSBCFG_ULPI_EXT_VBUS_DRV | - DWC2_GUSBCFG_ULPI_INT_VBUS_INDICATOR | - DWC2_GUSBCFG_INDICATOR_PASSTHROUGH); -#else - usbcfg &= ~DWC2_GUSBCFG_ULPI_EXT_VBUS_DRV; -#endif + if (priv->ext_vbus) { + usbcfg |= (DWC2_GUSBCFG_ULPI_EXT_VBUS_DRV | + DWC2_GUSBCFG_ULPI_INT_VBUS_INDICATOR | + DWC2_GUSBCFG_INDICATOR_PASSTHROUGH); + } else { + usbcfg &= ~DWC2_GUSBCFG_ULPI_EXT_VBUS_DRV; + } /* Set external TS Dline pulsing */ #ifdef CONFIG_DWC2_TS_DLINE @@ -1057,6 +1058,12 @@ static int dwc2_init_common(struct dwc2_priv *priv) return -ENODEV; } +#ifdef CONFIG_DWC2_PHY_ULPI_EXT_VBUS + priv->ext_vbus = 1; +#else + priv->ext_vbus = 0; +#endif + dwc_otg_core_init(priv); dwc_otg_core_host_init(regs); -- cgit v1.1 From b4fbd089e4b7ead53d4a27148f6df9c18572b1ce Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 27 Apr 2016 14:58:49 +0200 Subject: usb: dwc2: Make OC protection configurable Introduce a new flag in the controller private data, which allows selectively disabling the OC protection. Use the standard 'disable-over-current' OF prop to set this flag. This OC protection must be disabled on EBV SoCrates rev 1. Signed-off-by: Marek Vasut Cc: Stefan Roese Cc: Dinh Nguyen --- drivers/usb/host/dwc2.c | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c index 5673220..0c4adaf 100644 --- a/drivers/usb/host/dwc2.c +++ b/drivers/usb/host/dwc2.c @@ -18,6 +18,8 @@ #include "dwc2.h" +DECLARE_GLOBAL_DATA_PTR; + /* Use only HC channel 0. */ #define DWC2_HC_CHANNEL 0 @@ -40,6 +42,7 @@ struct dwc2_priv { struct dwc2_core_regs *regs; int root_hub_devnum; bool ext_vbus; + bool oc_disable; }; #ifndef CONFIG_DM_USB @@ -265,9 +268,11 @@ static void dwc_otg_core_init(struct dwc2_priv *priv) /* Program the ULPI External VBUS bit if needed */ if (priv->ext_vbus) { - usbcfg |= (DWC2_GUSBCFG_ULPI_EXT_VBUS_DRV | - DWC2_GUSBCFG_ULPI_INT_VBUS_INDICATOR | - DWC2_GUSBCFG_INDICATOR_PASSTHROUGH); + usbcfg |= DWC2_GUSBCFG_ULPI_EXT_VBUS_DRV; + if (!priv->oc_disable) { + usbcfg |= DWC2_GUSBCFG_ULPI_INT_VBUS_INDICATOR | + DWC2_GUSBCFG_INDICATOR_PASSTHROUGH; + } } else { usbcfg &= ~DWC2_GUSBCFG_ULPI_EXT_VBUS_DRV; } @@ -1177,6 +1182,7 @@ static int dwc2_submit_int_msg(struct udevice *dev, struct usb_device *udev, static int dwc2_usb_ofdata_to_platdata(struct udevice *dev) { struct dwc2_priv *priv = dev_get_priv(dev); + const void *prop; fdt_addr_t addr; addr = dev_get_addr(dev); @@ -1184,6 +1190,11 @@ static int dwc2_usb_ofdata_to_platdata(struct udevice *dev) return -EINVAL; priv->regs = (struct dwc2_core_regs *)addr; + prop = fdt_getprop(gd->fdt_blob, dev->of_offset, "disable-over-current", + NULL); + if (prop) + priv->oc_disable = true; + return 0; } -- cgit v1.1 From e96e064f51139c4af39f14499564ef76e40bbc29 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Tue, 26 Apr 2016 03:02:35 +0200 Subject: usb: dwc2: Init desc_before_addr Initialize desc_before_addr, otherwise the USB core won't send the first 64B Get Device Descriptor request in common/usb.c function usb_setup_descriptor() . There are some USB devices which expect this sequence and otherwise can misbehave. Signed-off-by: Marek Vasut Cc: Dinh Nguyen Cc: Tom Rini --- drivers/usb/host/dwc2.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'drivers') diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c index 0c4adaf..30b51b3 100644 --- a/drivers/usb/host/dwc2.c +++ b/drivers/usb/host/dwc2.c @@ -1201,6 +1201,9 @@ static int dwc2_usb_ofdata_to_platdata(struct udevice *dev) static int dwc2_usb_probe(struct udevice *dev) { struct dwc2_priv *priv = dev_get_priv(dev); + struct usb_bus_priv *bus_priv = dev_get_uclass_priv(dev); + + bus_priv->desc_before_addr = true; return dwc2_init_common(priv); } -- cgit v1.1 From 31a48cf4e158160e0482415457ef0f69f079368d Mon Sep 17 00:00:00 2001 From: Prabhakar Kushwaha Date: Mon, 28 Mar 2016 14:11:05 +0530 Subject: drivers: net: ldpaa: Memset pools_params as "0" before use Memset pools_params as "0" to avoid garbage value in dpni_set_pools. Signed-off-by: Prabhakar Kushwaha Reported-by: Jose Rivera Acked-by: Joe Hershberger --- drivers/net/ldpaa_eth/ldpaa_eth.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/net/ldpaa_eth/ldpaa_eth.c b/drivers/net/ldpaa_eth/ldpaa_eth.c index bc7f8bb..75b2b6b 100644 --- a/drivers/net/ldpaa_eth/ldpaa_eth.c +++ b/drivers/net/ldpaa_eth/ldpaa_eth.c @@ -920,6 +920,7 @@ static int ldpaa_dpni_bind(struct ldpaa_eth_priv *priv) struct dpni_tx_conf_cfg tx_conf_cfg; int err = 0; + memset(&pools_params, 0, sizeof(pools_params)); pools_params.num_dpbp = 1; pools_params.pools[0].dpbp_id = (uint16_t)dflt_dpbp->dpbp_attr.id; pools_params.pools[0].buffer_size = LDPAA_ETH_RX_BUFFER_SIZE; -- cgit v1.1 From f5c6db84e71c60bfc7ae746bfb2cd1090d0b8765 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Wed, 20 Apr 2016 15:46:50 -0600 Subject: pci: tegra: fix DM conversion issues on Tegra20 Tegra20's PCIe controller has a couple of quirks. There are workarounds in the driver for these, but they don't work after the DM conversion: 1) The PCI_CLASS value is wrong in HW. This is worked around in pci_tegra_read_config() by patching up the value read from that register. Pre-DM, the PCIe core always read this via a 16-bit access to the 16-bit offset 0xa. With DM, 32-bit accesses are used, so we need to check for offset 0x8 instead. Mask the offset value back to 32-bit alignment to make this work in all cases. 2) Accessing devices other than dev 1 causes a data abort. Pre-DM, this was worked around in pci_skip_dev(), which the PCIe core code called during enumeration while iterating over a bus. The DM PCIe core doesn't use this function. Instead, enhance tegra_pcie_conf_address() to validate the bdf being accessed, and refuse to access invalid devices. Since pci_skip_dev() isn't used, delete it. I've also validated that both these WARs are only needed for Tegra20, by testing on Tegra30/Cardhu and Tegra124/Jetson TKx. So, compile them in conditionally. Fixes: e81ca88451cf ("dm: tegra: pci: Convert tegra boards to driver model for PCI") Signed-off-by: Stephen Warren Reviewed-by: Thierry Reding Reviewed-by: Simon Glass Signed-off-by: Tom Warren --- drivers/pci/pci_tegra.c | 21 ++++++++++----------- 1 file changed, 10 insertions(+), 11 deletions(-) (limited to 'drivers') diff --git a/drivers/pci/pci_tegra.c b/drivers/pci/pci_tegra.c index 5dadf6f..c5b04da 100644 --- a/drivers/pci/pci_tegra.c +++ b/drivers/pci/pci_tegra.c @@ -275,12 +275,17 @@ static int tegra_pcie_conf_address(struct tegra_pcie *pcie, pci_dev_t bdf, return 0; } } + return -EFAULT; } else { +#ifdef CONFIG_TEGRA20 + unsigned int dev = PCI_DEV(bdf); + if (dev != 0) + return -EFAULT; +#endif + *address = pcie->cs.start + tegra_pcie_conf_offset(bdf, where); return 0; } - - return -EFAULT; } static int pci_tegra_read_config(struct udevice *bus, pci_dev_t bdf, @@ -299,13 +304,15 @@ static int pci_tegra_read_config(struct udevice *bus, pci_dev_t bdf, value = readl(address); +#ifdef CONFIG_TEGRA20 /* fixup root port class */ if (PCI_BUS(bdf) == 0) { - if (offset == PCI_CLASS_REVISION) { + if ((offset & ~3) == PCI_CLASS_REVISION) { value &= ~0x00ff0000; value |= PCI_CLASS_BRIDGE_PCI << 16; } } +#endif done: *valuep = pci_conv_32_to_size(value, offset, size); @@ -1041,11 +1048,3 @@ U_BOOT_DRIVER(pci_tegra) = { .probe = pci_tegra_probe, .priv_auto_alloc_size = sizeof(struct tegra_pcie), }; - -int pci_skip_dev(struct pci_controller *hose, pci_dev_t dev) -{ - if (PCI_BUS(dev) != 0 && PCI_DEV(dev) > 0) - return 1; - - return 0; -} -- cgit v1.1 From 1cc0a9f49657734c54939f03fc1e3ca0ec9d7eef Mon Sep 17 00:00:00 2001 From: "Robert P. J. Day" Date: Wed, 4 May 2016 04:47:31 -0400 Subject: Fix various typos, scattered over the code. Spelling corrections for (among other things): * environment * override * variable * ftd (should be "fdt", for flattened device tree) * embedded * FTDI * emulation * controller --- drivers/bios_emulator/x86emu/decode.c | 2 +- drivers/dfu/Kconfig | 6 +++--- drivers/net/macb.c | 2 +- drivers/net/sh_eth.c | 2 +- drivers/net/sh_eth.h | 2 +- drivers/thermal/Kconfig | 2 +- 6 files changed, 8 insertions(+), 8 deletions(-) (limited to 'drivers') diff --git a/drivers/bios_emulator/x86emu/decode.c b/drivers/bios_emulator/x86emu/decode.c index da44c3d..a9a01b5 100644 --- a/drivers/bios_emulator/x86emu/decode.c +++ b/drivers/bios_emulator/x86emu/decode.c @@ -241,7 +241,7 @@ no segment override. Address modes such as -3[BP] or 10[BP+SI] all refer to addresses relative to SS (ie: on the stack). So, at the minimum, all decodings of addressing modes would have to set/clear a bit describing whether the access is relative to DS or SS. That is the function of the -cpu-state-varible M.x86.mode. There are several potential states: +cpu-state-variable M.x86.mode. There are several potential states: repe prefix seen (handled elsewhere) repne prefix seen (ditto) diff --git a/drivers/dfu/Kconfig b/drivers/dfu/Kconfig index 4fe2219..6b92064 100644 --- a/drivers/dfu/Kconfig +++ b/drivers/dfu/Kconfig @@ -3,8 +3,8 @@ menu "DFU support" config DFU_TFTP bool "DFU via TFTP" help - This option allows performing update of DFU managed medium with data - send via TFTP boot. - Detailed description of this feature can be found at ./doc/README.dfutftp + This option allows performing update of DFU-managed medium with data + sent via TFTP boot. + Detailed description of this feature can be found at ./doc/README.dfutftp endmenu diff --git a/drivers/net/macb.c b/drivers/net/macb.c index be0659a..4bf8fa4 100644 --- a/drivers/net/macb.c +++ b/drivers/net/macb.c @@ -120,7 +120,7 @@ static int macb_is_gem(struct macb_device *macb) static int gem_is_gigabit_capable(struct macb_device *macb) { /* - * The GEM controllers embeded in SAMA5D2 and SAMA5D4 are + * The GEM controllers embedded in SAMA5D2 and SAMA5D4 are * configured to support only 10/100. */ return macb_is_gem(macb) && !cpu_is_sama5d2() && !cpu_is_sama5d4(); diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index 443a4da..2fa2016 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c @@ -1,5 +1,5 @@ /* - * sh_eth.c - Driver for Renesas ethernet controler. + * sh_eth.c - Driver for Renesas ethernet controller. * * Copyright (C) 2008, 2011 Renesas Solutions Corp. * Copyright (c) 2008, 2011, 2014 2014 Nobuhiro Iwamatsu diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h index 5cb520c..3645f0e 100644 --- a/drivers/net/sh_eth.h +++ b/drivers/net/sh_eth.h @@ -1,5 +1,5 @@ /* - * sh_eth.h - Driver for Renesas SuperH ethernet controler. + * sh_eth.h - Driver for Renesas SuperH ethernet controller. * * Copyright (C) 2008 - 2012 Renesas Solutions Corp. * Copyright (c) 2008 - 2012 Nobuhiro Iwamatsu diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig index 3c6b36d..8e22ea7 100644 --- a/drivers/thermal/Kconfig +++ b/drivers/thermal/Kconfig @@ -1,7 +1,7 @@ config DM_THERMAL bool "Driver support for thermal devices" help - Enable support for temporary-sensing devices. Some SoCs have on-chip + Enable support for temperature-sensing devices. Some SoCs have on-chip temperature sensors to permit warnings, speed throttling or even automatic power-off when the temperature gets too high or low. Other devices may be discrete but connected on a suitable bus. -- cgit v1.1 From 79d867c2e683f7080a8724a54a4a12ac0ce1f837 Mon Sep 17 00:00:00 2001 From: Stefan Agner Date: Thu, 5 May 2016 16:59:12 -0700 Subject: usb: ehci-mx6: allow board_ehci_hcd_init to fail There could be runtime determined board specific reason why a EHCI initialization fails (e.g. ENODEV if a Port is not available). In this case, properly return the error code. While at it, that function (board_ehci_hcd_init) has actually two documentation blocks... Use the correct function name for the documentation block of board_usb_phy_mode. Signed-off-by: Stefan Agner --- drivers/usb/host/ehci-mx6.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c index a981b50..bb48d0d 100644 --- a/drivers/usb/host/ehci-mx6.c +++ b/drivers/usb/host/ehci-mx6.c @@ -254,7 +254,7 @@ static void usb_oc_config(int index) } /** - * board_ehci_hcd_init - override usb phy mode + * board_usb_phy_mode - override usb phy mode * @port: usb host/otg port * * Target board specific, override usb_phy_mode. @@ -310,6 +310,7 @@ int ehci_hcd_init(int index, enum usb_init_type init, #endif struct usb_ehci *ehci = (struct usb_ehci *)(USB_BASE_ADDR + (controller_spacing * index)); + int ret; if (index > 3) return -EINVAL; @@ -317,7 +318,9 @@ int ehci_hcd_init(int index, enum usb_init_type init, mdelay(1); /* Do board specific initialization */ - board_ehci_hcd_init(index); + ret = board_ehci_hcd_init(index); + if (ret) + return ret; usb_power_config(index); usb_oc_config(index); -- cgit v1.1 From 26da6353e17111d7f0882866950cf26a679b8d5f Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 27 Apr 2016 23:18:55 +0200 Subject: mtd: cqspi: Simplify indirect write code The indirect write code is buggy pile of nastiness which fails horribly when the system runs fast enough to saturate the controller. The failure results in some pages (256B) not being written to the flash. This can be observed on systems which run with Dcache enabled and L2 cache enabled, like the Altera SoCFPGA. This patch replaces the whole unmaintainable indirect write implementation with the one from upcoming Linux CQSPI driver, which went through multiple rounds of thorough review and testing. While this makes the patch look terrifying and violates all best-practices of software development, all the patch does is it plucks out duplicate ad-hoc code distributed across the driver and replaces it with more compact code doing exactly the same thing. Signed-off-by: Marek Vasut Cc: Anatolij Gustschin Cc: Chin Liang See Cc: Dinh Nguyen Cc: Jagan Teki Cc: Pavel Machek Cc: Stefan Roese Cc: Vignesh R --- drivers/spi/cadence_qspi_apb.c | 126 ++++++++++------------------------------- 1 file changed, 30 insertions(+), 96 deletions(-) (limited to 'drivers') diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c index 7786dd6..5e84144 100644 --- a/drivers/spi/cadence_qspi_apb.c +++ b/drivers/spi/cadence_qspi_apb.c @@ -28,6 +28,7 @@ #include #include #include +#include #include "cadence_qspi.h" #define CQSPI_REG_POLL_US (1) /* 1us */ @@ -214,32 +215,6 @@ static void cadence_qspi_apb_read_fifo_data(void *dest, return; } -static void cadence_qspi_apb_write_fifo_data(const void *dest_ahb_addr, - const void *src, unsigned int bytes) -{ - unsigned int temp = 0; - int i; - int remaining = bytes; - unsigned int *dest_ptr = (unsigned int *)dest_ahb_addr; - unsigned int *src_ptr = (unsigned int *)src; - - while (remaining >= CQSPI_FIFO_WIDTH) { - for (i = CQSPI_FIFO_WIDTH/sizeof(src_ptr) - 1; i >= 0; i--) - writel(*(src_ptr+i), dest_ptr+i); - src_ptr += CQSPI_FIFO_WIDTH/sizeof(src_ptr); - remaining -= CQSPI_FIFO_WIDTH; - } - if (remaining) { - /* dangling bytes */ - i = remaining/sizeof(dest_ptr); - memcpy(&temp, src_ptr+i, remaining % sizeof(dest_ptr)); - writel(temp, dest_ptr+i); - for (--i; i >= 0; i--) - writel(*(src_ptr+i), dest_ptr+i); - } - return; -} - /* Read from SRAM FIFO with polling SRAM fill level. */ static int qspi_read_sram_fifo_poll(const void *reg_base, void *dest_addr, const void *src_addr, unsigned int num_bytes) @@ -276,44 +251,6 @@ static int qspi_read_sram_fifo_poll(const void *reg_base, void *dest_addr, return 0; } -/* Write to SRAM FIFO with polling SRAM fill level. */ -static int qpsi_write_sram_fifo_push(struct cadence_spi_platdata *plat, - const void *src_addr, unsigned int num_bytes) -{ - const void *reg_base = plat->regbase; - void *dest_addr = plat->ahbbase; - unsigned int retry = CQSPI_REG_RETRY; - unsigned int sram_level; - unsigned int wr_bytes; - unsigned char *src = (unsigned char *)src_addr; - int remaining = num_bytes; - unsigned int page_size = plat->page_size; - unsigned int sram_threshold_words = CQSPI_REG_SRAM_THRESHOLD_WORDS; - - while (remaining > 0) { - retry = CQSPI_REG_RETRY; - while (retry--) { - sram_level = CQSPI_GET_WR_SRAM_LEVEL(reg_base); - if (sram_level <= sram_threshold_words) - break; - } - if (!retry) { - printf("QSPI: SRAM fill level (0x%08x) not hit lower expected level (0x%08x)", - sram_level, sram_threshold_words); - return -1; - } - /* Write a page or remaining bytes. */ - wr_bytes = (remaining > page_size) ? - page_size : remaining; - - cadence_qspi_apb_write_fifo_data(dest_addr, src, wr_bytes); - src += wr_bytes; - remaining -= wr_bytes; - } - - return 0; -} - void cadence_qspi_apb_controller_enable(void *reg_base) { unsigned int reg; @@ -810,48 +747,45 @@ int cadence_qspi_apb_indirect_write_setup(struct cadence_spi_platdata *plat, } int cadence_qspi_apb_indirect_write_execute(struct cadence_spi_platdata *plat, - unsigned int txlen, const u8 *txbuf) + unsigned int n_tx, const u8 *txbuf) { - unsigned int reg = 0; - unsigned int retry; + unsigned int page_size = plat->page_size; + unsigned int remaining = n_tx; + unsigned int write_bytes; + int ret; /* Configure the indirect read transfer bytes */ - writel(txlen, plat->regbase + CQSPI_REG_INDIRECTWRBYTES); + writel(n_tx, plat->regbase + CQSPI_REG_INDIRECTWRBYTES); /* Start the indirect write transfer */ writel(CQSPI_REG_INDIRECTWR_START_MASK, plat->regbase + CQSPI_REG_INDIRECTWR); - if (qpsi_write_sram_fifo_push(plat, (const void *)txbuf, txlen)) - goto failwr; - - /* Wait until last write is completed (FIFO empty) */ - retry = CQSPI_REG_RETRY; - while (retry--) { - reg = CQSPI_GET_WR_SRAM_LEVEL(plat->regbase); - if (reg == 0) - break; - - udelay(1); - } - - if (reg != 0) { - printf("QSPI: timeout for indirect write\n"); - goto failwr; - } + while (remaining > 0) { + write_bytes = remaining > page_size ? page_size : remaining; + /* Handle non-4-byte aligned access to avoid data abort. */ + if (((uintptr_t)txbuf % 4) || (write_bytes % 4)) + writesb(plat->ahbbase, txbuf, write_bytes); + else + writesl(plat->ahbbase, txbuf, write_bytes >> 2); + + ret = wait_for_bit("QSPI", plat->regbase + CQSPI_REG_SDRAMLEVEL, + CQSPI_REG_SDRAMLEVEL_WR_MASK << + CQSPI_REG_SDRAMLEVEL_WR_LSB, 0, 10, 0); + if (ret) { + printf("Indirect write timed out (%i)\n", ret); + goto failwr; + } - /* Check flash indirect controller status */ - retry = CQSPI_REG_RETRY; - while (retry--) { - reg = readl(plat->regbase + CQSPI_REG_INDIRECTWR); - if (reg & CQSPI_REG_INDIRECTWR_DONE_MASK) - break; - udelay(1); + txbuf += write_bytes; + remaining -= write_bytes; } - if (!(reg & CQSPI_REG_INDIRECTWR_DONE_MASK)) { - printf("QSPI: indirect completion status error with reg 0x%08x\n", - reg); + /* Check indirect done status */ + ret = wait_for_bit("QSPI", plat->regbase + CQSPI_REG_INDIRECTWR, + CQSPI_REG_INDIRECTWR_DONE_MASK, 1, 10, 0); + if (ret) { + printf("Indirect write completion error (%i)\n", ret); goto failwr; } @@ -864,7 +798,7 @@ failwr: /* Cancel the indirect write */ writel(CQSPI_REG_INDIRECTWR_CANCEL_MASK, plat->regbase + CQSPI_REG_INDIRECTWR); - return -1; + return ret; } void cadence_qspi_apb_enter_xip(void *reg_base, char xip_dummy) -- cgit v1.1 From 5a824c493a31d06f04a6736fab8f67bf78145003 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 27 Apr 2016 23:38:05 +0200 Subject: mtd: cqspi: Simplify indirect read code The indirect read code is a pile of nastiness. This patch replaces the whole unmaintainable indirect read implementation with the one from upcoming Linux CQSPI driver, which went through multiple rounds of thorough review and testing. All the patch does is it plucks out duplicate ad-hoc code distributed across the driver and replaces it with more compact code doing exactly the same thing. There is no speed change of the read operation. Signed-off-by: Marek Vasut Cc: Anatolij Gustschin Cc: Chin Liang See Cc: Dinh Nguyen Cc: Jagan Teki Cc: Pavel Machek Cc: Stefan Roese Cc: Vignesh R --- drivers/spi/cadence_qspi_apb.c | 128 ++++++++++++++++++----------------------- 1 file changed, 57 insertions(+), 71 deletions(-) (limited to 'drivers') diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c index 5e84144..a71531d 100644 --- a/drivers/spi/cadence_qspi_apb.c +++ b/drivers/spi/cadence_qspi_apb.c @@ -193,64 +193,6 @@ static unsigned int cadence_qspi_apb_cmd2addr(const unsigned char *addr_buf, return addr; } -static void cadence_qspi_apb_read_fifo_data(void *dest, - const void *src_ahb_addr, unsigned int bytes) -{ - unsigned int temp; - int remaining = bytes; - unsigned int *dest_ptr = (unsigned int *)dest; - unsigned int *src_ptr = (unsigned int *)src_ahb_addr; - - while (remaining >= sizeof(dest_ptr)) { - *dest_ptr = readl(src_ptr); - remaining -= sizeof(src_ptr); - dest_ptr++; - } - if (remaining) { - /* dangling bytes */ - temp = readl(src_ptr); - memcpy(dest_ptr, &temp, remaining); - } - - return; -} - -/* Read from SRAM FIFO with polling SRAM fill level. */ -static int qspi_read_sram_fifo_poll(const void *reg_base, void *dest_addr, - const void *src_addr, unsigned int num_bytes) -{ - unsigned int remaining = num_bytes; - unsigned int retry; - unsigned int sram_level = 0; - unsigned char *dest = (unsigned char *)dest_addr; - - while (remaining > 0) { - retry = CQSPI_REG_RETRY; - while (retry--) { - sram_level = CQSPI_GET_RD_SRAM_LEVEL(reg_base); - if (sram_level) - break; - udelay(1); - } - - if (!retry) { - printf("QSPI: No receive data after polling for %d times\n", - CQSPI_REG_RETRY); - return -1; - } - - sram_level *= CQSPI_FIFO_WIDTH; - sram_level = sram_level > remaining ? remaining : sram_level; - - /* Read data from FIFO. */ - cadence_qspi_apb_read_fifo_data(dest, src_addr, sram_level); - dest += sram_level; - remaining -= sram_level; - udelay(1); - } - return 0; -} - void cadence_qspi_apb_controller_enable(void *reg_base) { unsigned int reg; @@ -679,40 +621,84 @@ int cadence_qspi_apb_indirect_read_setup(struct cadence_spi_platdata *plat, return 0; } +static u32 cadence_qspi_get_rd_sram_level(struct cadence_spi_platdata *plat) +{ + u32 reg = readl(plat->regbase + CQSPI_REG_SDRAMLEVEL); + reg >>= CQSPI_REG_SDRAMLEVEL_RD_LSB; + return reg & CQSPI_REG_SDRAMLEVEL_RD_MASK; +} + +static int cadence_qspi_wait_for_data(struct cadence_spi_platdata *plat) +{ + unsigned int timeout = 10000; + u32 reg; + + while (timeout--) { + reg = cadence_qspi_get_rd_sram_level(plat); + if (reg) + return reg; + udelay(1); + } + + return -ETIMEDOUT; +} + int cadence_qspi_apb_indirect_read_execute(struct cadence_spi_platdata *plat, - unsigned int rxlen, u8 *rxbuf) + unsigned int n_rx, u8 *rxbuf) { - unsigned int reg; + unsigned int remaining = n_rx; + unsigned int bytes_to_read = 0; + int ret; - writel(rxlen, plat->regbase + CQSPI_REG_INDIRECTRDBYTES); + writel(n_rx, plat->regbase + CQSPI_REG_INDIRECTRDBYTES); /* Start the indirect read transfer */ writel(CQSPI_REG_INDIRECTRD_START_MASK, plat->regbase + CQSPI_REG_INDIRECTRD); - if (qspi_read_sram_fifo_poll(plat->regbase, (void *)rxbuf, - (const void *)plat->ahbbase, rxlen)) - goto failrd; + while (remaining > 0) { + ret = cadence_qspi_wait_for_data(plat); + if (ret < 0) { + printf("Indirect write timed out (%i)\n", ret); + goto failrd; + } + + bytes_to_read = ret; + + while (bytes_to_read != 0) { + bytes_to_read *= CQSPI_FIFO_WIDTH; + bytes_to_read = bytes_to_read > remaining ? + remaining : bytes_to_read; + /* Handle non-4-byte aligned access to avoid data abort. */ + if (((uintptr_t)rxbuf % 4) || (bytes_to_read % 4)) + readsb(plat->ahbbase, rxbuf, bytes_to_read); + else + readsl(plat->ahbbase, rxbuf, bytes_to_read >> 2); + rxbuf += bytes_to_read; + remaining -= bytes_to_read; + bytes_to_read = cadence_qspi_get_rd_sram_level(plat); + } + } - /* Check flash indirect controller */ - reg = readl(plat->regbase + CQSPI_REG_INDIRECTRD); - if (!(reg & CQSPI_REG_INDIRECTRD_DONE_MASK)) { - reg = readl(plat->regbase + CQSPI_REG_INDIRECTRD); - printf("QSPI: indirect completion status error with reg 0x%08x\n", - reg); + /* Check indirect done status */ + ret = wait_for_bit("QSPI", plat->regbase + CQSPI_REG_INDIRECTRD, + CQSPI_REG_INDIRECTRD_DONE_MASK, 1, 10, 0); + if (ret) { + printf("Indirect read completion error (%i)\n", ret); goto failrd; } /* Clear indirect completion status */ writel(CQSPI_REG_INDIRECTRD_DONE_MASK, plat->regbase + CQSPI_REG_INDIRECTRD); + return 0; failrd: /* Cancel the indirect read */ writel(CQSPI_REG_INDIRECTRD_CANCEL_MASK, plat->regbase + CQSPI_REG_INDIRECTRD); - return -1; + return ret; } /* Opcode + Address (3/4 bytes) */ -- cgit v1.1 From 2bf352f0c1b7f58d4610bc0777e8febbd2dfd5ff Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Fri, 6 May 2016 13:53:37 +0200 Subject: usb: dwc2: Add delay to fix the USB detection problem on SoCFPGA With patch c998da0d (usb: Change power-on / scanning timeout handling), the USB scanning is started earlier and with a smaller timeout. This resulted on SoCFPGA (using the DWC2 driver) in some USB sticks not getting detected any more. This patch now adds a 1 second delay (in the host mode only) to the DWC2 driver before the scanning is started. With this delay, now all problematic USB keys are detected successfully again. And there is no need any more to change the delay / timeout in the common USB code (usb_hub.c). Signed-off-by: Stefan Roese Cc: Chin Liang See Cc: Dinh Nguyen Cc: Hans de Goede Cc: Stephen Warren Cc: Marek Vasut --- drivers/usb/host/dwc2.c | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'drivers') diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c index 30b51b3..d08879d 100644 --- a/drivers/usb/host/dwc2.c +++ b/drivers/usb/host/dwc2.c @@ -1088,6 +1088,15 @@ static int dwc2_init_common(struct dwc2_priv *priv) } } + /* + * Add a 1 second delay here. This gives the host controller + * a bit time before the comminucation with the USB devices + * is started (the bus is scanned) and fixes the USB detection + * problems with some problematic USB keys. + */ + if (readl(®s->gintsts) & DWC2_GINTSTS_CURMODE_HOST) + mdelay(1000); + return 0; } -- cgit v1.1 From 5d8fae79163e94671956c99654abf48cf49757ba Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Tue, 3 May 2016 10:24:52 +0800 Subject: dfu: avoid memory leak MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit When dfu_fill_entity fail, need to free dfu to avoid memory leak. Reported by Coverity: " Resource leak (RESOURCE_LEAK) leaked_storage: Variable dfu going out of scope leaks the storage it points to. " Signed-off-by: Peng Fan Cc: "Łukasz Majewski" Cc: Marek Vasut --- drivers/dfu/dfu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c index 8f5915e..20dfcbb 100644 --- a/drivers/dfu/dfu.c +++ b/drivers/dfu/dfu.c @@ -468,8 +468,10 @@ int dfu_config_entities(char *env, char *interface, char *devstr) s = strsep(&env, ";"); ret = dfu_fill_entity(&dfu[i], s, alt_num_cnt, interface, devstr); - if (ret) + if (ret) { + free(dfu); return -1; + } list_add_tail(&dfu[i].list, &dfu_list); alt_num_cnt++; -- cgit v1.1 From 12ff19dbfd93abdb62b7b326fee3f5bfa659a75e Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Tue, 3 May 2016 10:25:22 +0800 Subject: usb: gadget: dfu: discard dead code MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Reported by Coverity: Logically dead code (DEADCODE) dead_error_line: Execution cannot reach this statement: (f_dfu->strings + --i).s = .... If calloc failed, i is still 0 and no need to call free, so discard the dead code. Signed-off-by: Peng Fan Cc: "Łukasz Majewski" Cc: Marek Vasut --- drivers/usb/gadget/f_dfu.c | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) (limited to 'drivers') diff --git a/drivers/usb/gadget/f_dfu.c b/drivers/usb/gadget/f_dfu.c index 7d88008..8e7c981 100644 --- a/drivers/usb/gadget/f_dfu.c +++ b/drivers/usb/gadget/f_dfu.c @@ -636,7 +636,7 @@ dfu_prepare_strings(struct f_dfu *f_dfu, int n) f_dfu->strings = calloc(sizeof(struct usb_string), n + 1); if (!f_dfu->strings) - goto enomem; + return -ENOMEM; for (i = 0; i < n; ++i) { de = dfu_get_entity(i); @@ -647,14 +647,6 @@ dfu_prepare_strings(struct f_dfu *f_dfu, int n) f_dfu->strings[i].s = NULL; return 0; - -enomem: - while (i) - f_dfu->strings[--i].s = NULL; - - free(f_dfu->strings); - - return -ENOMEM; } static int dfu_prepare_function(struct f_dfu *f_dfu, int n) -- cgit v1.1