From c4483093f38f20c4122bd27456bffdda518e4d71 Mon Sep 17 00:00:00 2001 From: Stefan Agner Date: Wed, 13 Jul 2016 00:25:38 -0700 Subject: usb: ehci-mx6: introduce config for high active power pin Add a new config CONFIG_MXC_USB_OTG_HACTIVE which configures the OTG Power Pin to be high active. Low active is the reset value of the affected configuration register, hence the config option is named by the non-reset configuration. Signed-off-by: Stefan Agner --- drivers/usb/host/Kconfig | 9 +++++++++ drivers/usb/host/ehci-mx6.c | 4 ++++ 2 files changed, 13 insertions(+) (limited to 'drivers/usb') diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index 7992cb4..09db938 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -81,6 +81,15 @@ config USB_EHCI_MX7 ---help--- Enables support for the on-chip EHCI controller on i.MX7 SoCs. +if USB_EHCI_MX7 + +config MXC_USB_OTG_HACTIVE + bool "USB Power pin high active" + ---help--- + Set the USB Power pin polarity to be high active (PWR_POL) + +endif + config USB_EHCI_MSM bool "Support for Qualcomm on-chip EHCI USB controller" depends on DM_USB diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c index 277f461..8352c2b 100644 --- a/drivers/usb/host/ehci-mx6.c +++ b/drivers/usb/host/ehci-mx6.c @@ -216,7 +216,11 @@ static void usb_power_config(int index) clrbits_le32(phy_cfg2, USBNC_PHYCFG2_ACAENB); /* Set power polarity to high active */ +#ifdef CONFIG_MXC_USB_OTG_HACTIVE setbits_le32(ctrl, UCTRL_PWR_POL); +#else + clrbits_le32(ctrl, UCTRL_PWR_POL); +#endif } int usb_phy_mode(int port) -- cgit v1.1