From 79d4eb627cffbc3ab7cefdd623fa39fefaaedbe7 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Mon, 1 Feb 2016 01:40:45 -0800 Subject: dm: pch: Add get_io_base op On some newer chipset (eg: BayTrail), there is an IO base address register on the PCH device which configures the base address of a memory-mapped I/O controller. Signed-off-by: Bin Meng Reviewed-by: Simon Glass Tested-by: Simon Glass --- drivers/pch/pch-uclass.c | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'drivers/pch') diff --git a/drivers/pch/pch-uclass.c b/drivers/pch/pch-uclass.c index 48a3965..7216660 100644 --- a/drivers/pch/pch-uclass.c +++ b/drivers/pch/pch-uclass.c @@ -44,6 +44,17 @@ int pch_get_gpio_base(struct udevice *dev, u32 *gbasep) return ops->get_gpio_base(dev, gbasep); } +int pch_get_io_base(struct udevice *dev, u32 *iobasep) +{ + struct pch_ops *ops = pch_get_ops(dev); + + *iobasep = 0; + if (!ops->get_io_base) + return -ENOSYS; + + return ops->get_io_base(dev, iobasep); +} + static int pch_uclass_post_bind(struct udevice *bus) { /* -- cgit v1.1