From 0c9c99a20b8b900fc8e284f89a08ff6f46de6a3b Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 24 Feb 2014 11:16:28 +0100 Subject: net: emaclite: Fix OF initialization - Add xilinx_emaclite_of_init to netdev.h - Remove global data pointer from the driver - Add better handling for error state. Signed-off-by: Michal Simek --- drivers/net/xilinx_emaclite.c | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) (limited to 'drivers/net') diff --git a/drivers/net/xilinx_emaclite.c b/drivers/net/xilinx_emaclite.c index 0a5209d..2a5cc44 100644 --- a/drivers/net/xilinx_emaclite.c +++ b/drivers/net/xilinx_emaclite.c @@ -14,8 +14,6 @@ #include #include -DECLARE_GLOBAL_DATA_PTR; - #undef DEBUG #define ENET_ADDR_LENGTH 6 @@ -364,24 +362,27 @@ int xilinx_emaclite_initialize(bd_t *bis, unsigned long base_addr, } #ifdef CONFIG_OF_CONTROL -int xilinx_emaclite_init(bd_t *bis) +int xilinx_emaclite_of_init(const void *blob) { int offset = 0; u32 ret = 0; u32 reg; do { - offset = fdt_node_offset_by_compatible(gd->fdt_blob, offset, + offset = fdt_node_offset_by_compatible(blob, offset, "xlnx,xps-ethernetlite-1.00.a"); if (offset != -1) { - reg = fdtdec_get_addr(gd->fdt_blob, offset, "reg"); + reg = fdtdec_get_addr(blob, offset, "reg"); if (reg != FDT_ADDR_T_NONE) { - u32 rxpp = fdtdec_get_int(gd->fdt_blob, offset, + u32 rxpp = fdtdec_get_int(blob, offset, "xlnx,rx-ping-pong", 0); - u32 txpp = fdtdec_get_int(gd->fdt_blob, offset, + u32 txpp = fdtdec_get_int(blob, offset, "xlnx,tx-ping-pong", 0); - ret |= xilinx_emaclite_initialize(bis, reg, + ret |= xilinx_emaclite_initialize(NULL, reg, txpp, rxpp); + } else { + debug("EMACLITE: Can't get base address\n"); + return -1; } } } while (offset != -1); -- cgit v1.1 From f88a6869a10a5a7aea4c4fda52db854a693796b0 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 24 Feb 2014 11:16:30 +0100 Subject: net: gem: Add OF initialization support Gem can be directly initialized from DTB. Signed-off-by: Michal Simek --- drivers/net/zynq_gem.c | 42 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) (limited to 'drivers/net') diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 6d4001b..101489c 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -12,6 +12,8 @@ #include #include #include +#include +#include #include #include #include @@ -534,3 +536,43 @@ int zynq_gem_initialize(bd_t *bis, int base_addr, int phy_addr, u32 emio) return 1; } + +#ifdef CONFIG_OF_CONTROL +int zynq_gem_of_init(const void *blob) +{ + int offset = 0; + u32 ret = 0; + u32 reg, phy_reg; + + debug("ZYNQ GEM: Initialization\n"); + + do { + offset = fdt_node_offset_by_compatible(blob, offset, + "xlnx,ps7-ethernet-1.00.a"); + if (offset != -1) { + reg = fdtdec_get_addr(blob, offset, "reg"); + if (reg != FDT_ADDR_T_NONE) { + offset = fdtdec_lookup_phandle(blob, offset, + "phy-handle"); + if (offset != -1) + phy_reg = fdtdec_get_addr(blob, offset, + "reg"); + else + phy_reg = 0; + + debug("ZYNQ GEM: addr %x, phyaddr %x\n", + reg, phy_reg); + + ret |= zynq_gem_initialize(NULL, reg, + phy_reg, 0); + + } else { + debug("ZYNQ GEM: Can't get base address\n"); + return -1; + } + } + } while (offset != -1); + + return ret; +} +#endif -- cgit v1.1 From dc116bd6c4b5cb1caf6621f282ac5156d1509bef Mon Sep 17 00:00:00 2001 From: "Haijun.Zhang" Date: Tue, 4 Mar 2014 15:56:12 +0800 Subject: net/phy: Correct AR8021 phy_mask There was wrong phy_mask for AR8021 device, so the AR8021 can't be probed correctly. Changed it from 0x4fffff to 0x4ffff0. Signed-off-by: Haijun Zhang --- drivers/net/phy/atheros.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/net') diff --git a/drivers/net/phy/atheros.c b/drivers/net/phy/atheros.c index 5332e1a..b80980d 100644 --- a/drivers/net/phy/atheros.c +++ b/drivers/net/phy/atheros.c @@ -41,7 +41,7 @@ static int ar8035_config(struct phy_device *phydev) static struct phy_driver AR8021_driver = { .name = "AR8021", .uid = 0x4dd040, - .mask = 0x4fffff, + .mask = 0x4ffff0, .features = PHY_GBIT_FEATURES, .config = ar8021_config, .startup = genphy_startup, -- cgit v1.1 From ef59bb7cc830b563530cd8bbfff22139f5e98b0a Mon Sep 17 00:00:00 2001 From: Ilya Ledvich Date: Wed, 12 Mar 2014 11:26:30 +0200 Subject: drivers: net: cpsw: init phy with gigabit features CPSW ia a gigabit device. Use the PHY_GBIT_FEATURES macro to determine phy supported features. Tested on cm_t335. Signed-off-by: Ilya Ledvich --- drivers/net/cpsw.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) (limited to 'drivers/net') diff --git a/drivers/net/cpsw.c b/drivers/net/cpsw.c index dd6c26a..bd5fba2 100644 --- a/drivers/net/cpsw.c +++ b/drivers/net/cpsw.c @@ -941,11 +941,7 @@ static int cpsw_phy_init(struct eth_device *dev, struct cpsw_slave *slave) { struct cpsw_priv *priv = (struct cpsw_priv *)dev->priv; struct phy_device *phydev; - u32 supported = (SUPPORTED_10baseT_Half | - SUPPORTED_10baseT_Full | - SUPPORTED_100baseT_Half | - SUPPORTED_100baseT_Full | - SUPPORTED_1000baseT_Full); + u32 supported = PHY_GBIT_FEATURES; phydev = phy_connect(priv->bus, slave->data->phy_addr, -- cgit v1.1