From 443ce4ac9d1138ae5ae6863b2d40a96fd6edf523 Mon Sep 17 00:00:00 2001 From: Prafulla Wadaskar Date: Thu, 16 Jul 2009 20:58:02 +0530 Subject: net: phy: bugfixes: mv88E61xx multichip addressing support With these fixes, this driver works properly for multi chip addressging mode Bugfixes: 1. Build error fixed for function mv88e61xx_busychk_multic-fixed 2. PHY dev address error detection- fixed 3. wrong busy bit was refered in function mv88e61xx_busychk -fixed 4. invalid data read ptr was refered for RD_PHY in case of multichip addressing mode -fixed The Multichip Address mode is tested with RD6281A board having MV88E6165 switch on it Signed-off-by: Prafulla Wadaskar Signed-off-by: Ben Warren --- drivers/net/phy/mv88e61xx.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/net/phy/mv88e61xx.h') diff --git a/drivers/net/phy/mv88e61xx.h b/drivers/net/phy/mv88e61xx.h index 4279464..57762b6 100644 --- a/drivers/net/phy/mv88e61xx.h +++ b/drivers/net/phy/mv88e61xx.h @@ -49,7 +49,7 @@ #define MV88E61XX_ADDR_OFST 5 #ifdef CONFIG_MV88E61XX_MULTICHIP_ADRMODE -static int mv88e61xx_busychk_multic(u32 devaddr); +static int mv88e61xx_busychk_multic(char *name, u32 devaddr); static void mv88e61xx_wr_phy(char *name, u32 phy_adr, u32 reg_ofs, u16 data); static void mv88e61xx_rd_phy(char *name, u32 phy_adr, u32 reg_ofs, u16 * data); #define WR_PHY mv88e61xx_wr_phy -- cgit v1.1