From 2215987e100d2a841ae6d48a7cc9bb83fcf22737 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Thu, 2 Oct 2008 01:55:38 -0400 Subject: cfi_flash: do not reset flash when probe fails The CFI flash driver starts at flash_init() which calls down into flash_get_size(). This starts by calling flash_detect_cfi(). If said function fails, flash_get_size() finishes by attempting to reset the flash. Unfortunately, it does this with an info->portwidth set to 0x10 which filters down into flash_make_cmd() and that happily smashes the stack by sticking info->portwidth bytes into a cfiword_t variable that lives on the stack. On a 64bit system you probably won't notice, but killing the last 8 bytes on a 32bit system usually leads to a corrupt return address. Which is what happens on a Blackfin system. Signed-off-by: Mike Frysinger Signed-off-by: Stefan Roese --- drivers/mtd/cfi_flash.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'drivers/mtd') diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index 0d1ee8a..72d063a 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -1932,9 +1932,10 @@ ulong flash_get_size (ulong base, int banknum) /* XXX - Need to test on x8/x16 in parallel. */ info->portwidth >>= 1; } + + flash_write_cmd (info, 0, 0, info->cmd_reset); } - flash_write_cmd (info, 0, 0, info->cmd_reset); return (info->size); } -- cgit v1.1 From 0d01f66d235118515b5086b88f82498bc0695d6a Mon Sep 17 00:00:00 2001 From: Ed Swarthout Date: Thu, 9 Oct 2008 01:26:36 -0500 Subject: CFI: cfi_flash write fix for AMD legacy The flash_unlock_seq requires a sector for AMD_LEGACY. Fix a retcode check typeo. Signed-off-by: Ed Swarthout Signed-off-by: Stefan Roese --- drivers/mtd/cfi_flash.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'drivers/mtd') diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index 72d063a..7bfdc43 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -681,7 +681,7 @@ static int flash_full_status_check (flash_info_t * info, flash_sect_t sector, case CFI_CMDSET_INTEL_PROG_REGIONS: case CFI_CMDSET_INTEL_EXTENDED: case CFI_CMDSET_INTEL_STANDARD: - if ((retcode == ERR_OK) + if ((retcode != ERR_OK) && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) { retcode = ERR_INVAL; printf ("Flash %s error at address %lx\n", prompt, @@ -777,6 +777,7 @@ static int flash_write_cfiword (flash_info_t * info, ulong dest, { void *dstaddr; int flag; + flash_sect_t sect; dstaddr = map_physmem(dest, info->portwidth, MAP_NOCACHE); @@ -818,8 +819,9 @@ static int flash_write_cfiword (flash_info_t * info, ulong dest, #ifdef CONFIG_FLASH_CFI_LEGACY case CFI_CMDSET_AMD_LEGACY: #endif - flash_unlock_seq (info, 0); - flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE); + sect = find_sector(info, dest); + flash_unlock_seq (info, sect); + flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE); break; } -- cgit v1.1 From fecb5ade3b37f62981f2b05b621005850173aaa9 Mon Sep 17 00:00:00 2001 From: Jason Jin Date: Fri, 19 Sep 2008 17:32:49 +0800 Subject: Fix the NAND size overflow issue. When the total size of all NAND devices exceeds 4 GiB, the size will overflow. This patch tries to fix this. Note that we still have a problem when a single NAND device is bigger than 4 GiB: then the overflow would actually happen earlier, i. e. when storing the size in nand_info[].size, as nand_info[].size is an "u_int32_t". Signed-off-by: Jason Jin Signed-off-by: Wolfgang Denk --- drivers/mtd/nand/nand.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/mtd') diff --git a/drivers/mtd/nand/nand.c b/drivers/mtd/nand/nand.c index ebd2acd..71a0e4b 100644 --- a/drivers/mtd/nand/nand.c +++ b/drivers/mtd/nand/nand.c @@ -63,11 +63,11 @@ void nand_init(void) unsigned int size = 0; for (i = 0; i < CFG_MAX_NAND_DEVICE; i++) { nand_init_chip(&nand_info[i], &nand_chip[i], base_address[i]); - size += nand_info[i].size; + size += nand_info[i].size / 1024; if (nand_curr_device == -1) nand_curr_device = i; } - printf("%u MiB\n", size / (1024 * 1024)); + printf("%u MiB\n", size / 1024); #ifdef CFG_NAND_SELECT_DEVICE /* -- cgit v1.1 From 6d0f6bcf337c5261c08fabe12982178c2c489d76 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Thu, 16 Oct 2008 15:01:15 +0200 Subject: rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- drivers/mtd/cfi_flash.c | 102 +++++++++++++++++----------------- drivers/mtd/dataflash.c | 14 ++--- drivers/mtd/jedec_flash.c | 8 +-- drivers/mtd/nand/fsl_elbc_nand.c | 2 +- drivers/mtd/nand/nand.c | 14 ++--- drivers/mtd/nand/nand_base.c | 6 +- drivers/mtd/nand/s3c64xx.c | 12 ++-- drivers/mtd/nand_legacy/nand_legacy.c | 12 ++-- drivers/mtd/onenand/onenand_uboot.c | 2 +- drivers/mtd/spi/spi_flash_internal.h | 6 +- drivers/mtd/spi/stmicro.c | 2 +- 11 files changed, 90 insertions(+), 90 deletions(-) (limited to 'drivers/mtd') diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index 7bfdc43..c40bf66 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -57,12 +57,12 @@ * AMD/Spansion Application Note: Migration from Single-byte to Three-byte * Device IDs, Publication Number 25538 Revision A, November 8, 2001 * - * Define CFG_WRITE_SWAPPED_DATA, if you have to swap the Bytes between + * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between * reading and writing ... (yes there is such a Hardware). */ -#ifndef CFG_FLASH_BANKS_LIST -#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE } +#ifndef CONFIG_SYS_FLASH_BANKS_LIST +#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } #endif #define FLASH_CMD_CFI 0x98 @@ -143,7 +143,7 @@ #define CFI_CMDSET_SST 258 #define CFI_CMDSET_INTEL_PROG_REGIONS 512 -#ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */ +#ifdef CONFIG_SYS_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */ # undef FLASH_CMD_RESET # define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */ #endif @@ -159,11 +159,11 @@ typedef union { static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT }; -/* use CFG_MAX_FLASH_BANKS_DETECT if defined */ -#ifdef CFG_MAX_FLASH_BANKS_DETECT -# define CFI_MAX_FLASH_BANKS CFG_MAX_FLASH_BANKS_DETECT +/* use CONFIG_SYS_MAX_FLASH_BANKS_DETECT if defined */ +#ifdef CONFIG_SYS_MAX_FLASH_BANKS_DETECT +# define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS_DETECT #else -# define CFI_MAX_FLASH_BANKS CFG_MAX_FLASH_BANKS +# define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS #endif flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */ @@ -171,8 +171,8 @@ flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */ /* * Check if chip width is defined. If not, start detecting with 8bit. */ -#ifndef CFG_FLASH_CFI_WIDTH -#define CFG_FLASH_CFI_WIDTH FLASH_CFI_8BIT +#ifndef CONFIG_SYS_FLASH_CFI_WIDTH +#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT #endif typedef unsigned long flash_sect_t; @@ -255,20 +255,20 @@ u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64"))); /*----------------------------------------------------------------------- */ -#if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE) +#if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) static flash_info_t *flash_get_info(ulong base) { int i; flash_info_t * info = 0; - for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) { + for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { info = & flash_info[i]; if (info->size && info->start[0] <= base && base <= info->start[0] + info->size - 1) break; } - return i == CFG_MAX_FLASH_BANKS ? 0 : info; + return i == CONFIG_SYS_MAX_FLASH_BANKS ? 0 : info; } #endif @@ -309,7 +309,7 @@ static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf) int i; int cword_offset; int cp_offset; -#if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA) +#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) u32 cmd_le = cpu_to_le32(cmd); #endif uchar val; @@ -317,7 +317,7 @@ static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf) for (i = info->portwidth; i > 0; i--){ cword_offset = (info->portwidth-i)%info->chipwidth; -#if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA) +#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) cp_offset = info->portwidth - i; val = *((uchar*)&cmd_le + cword_offset); #else @@ -374,7 +374,7 @@ static inline uchar flash_read_uchar (flash_info_t * info, uint offset) uchar retval; cp = flash_map (info, 0, offset); -#if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA) +#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) retval = flash_read8(cp); #else retval = flash_read8(cp + info->portwidth - 1); @@ -419,7 +419,7 @@ static ulong flash_read_long (flash_info_t * info, flash_sect_t sect, debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x)); } #endif -#if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA) +#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) retval = ((flash_read8(addr) << 16) | (flash_read8(addr + info->portwidth) << 24) | (flash_read8(addr + 2 * info->portwidth)) | @@ -646,8 +646,8 @@ static int flash_status_check (flash_info_t * info, flash_sect_t sector, { ulong start; -#if CFG_HZ != 1000 - tout *= CFG_HZ/1000; +#if CONFIG_SYS_HZ != 1000 + tout *= CONFIG_SYS_HZ/1000; #endif /* Wait for command completion */ @@ -716,7 +716,7 @@ static int flash_full_status_check (flash_info_t * info, flash_sect_t sector, */ static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c) { -#if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA) +#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) unsigned short w; unsigned int l; unsigned long long ll; @@ -727,7 +727,7 @@ static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c) cword->c = c; break; case FLASH_CFI_16BIT: -#if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA) +#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) w = c; w <<= 8; cword->w = (cword->w >> 8) | w; @@ -736,7 +736,7 @@ static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c) #endif break; case FLASH_CFI_32BIT: -#if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA) +#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) l = c; l <<= 24; cword->l = (cword->l >> 8) | l; @@ -745,7 +745,7 @@ static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c) #endif break; case FLASH_CFI_64BIT: -#if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA) +#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA) ll = c; ll <<= 56; cword->ll = (cword->ll >> 8) | ll; @@ -850,7 +850,7 @@ static int flash_write_cfiword (flash_info_t * info, ulong dest, info->write_tout, "write"); } -#ifdef CFG_FLASH_USE_BUFFER_WRITE +#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, int len) @@ -1024,7 +1024,7 @@ out_unmap: unmap_physmem(dst, len); return retcode; } -#endif /* CFG_FLASH_USE_BUFFER_WRITE */ +#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */ /*----------------------------------------------------------------------- @@ -1173,7 +1173,7 @@ void flash_print_info (flash_info_t * info) for (i = 0; i < info->sector_count; ++i) { if ((i % 5) == 0) printf ("\n"); -#ifdef CFG_FLASH_EMPTY_INFO +#ifdef CONFIG_SYS_FLASH_EMPTY_INFO int k; int size; int erased; @@ -1198,7 +1198,7 @@ void flash_print_info (flash_info_t * info) info->start[i], erased ? 'E' : ' ', info->protect[i] ? "RO" : " "); -#else /* ! CFG_FLASH_EMPTY_INFO */ +#else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */ printf (" %08lX %s ", info->start[i], info->protect[i] ? "RO" : " "); @@ -1242,7 +1242,7 @@ int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) int aln; cfiword_t cword; int i, rc; -#ifdef CFG_FLASH_USE_BUFFER_WRITE +#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE int buffered_size; #endif #ifdef CONFIG_FLASH_SHOW_PROGRESS @@ -1286,7 +1286,7 @@ int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) } /* handle the aligned part */ -#ifdef CFG_FLASH_USE_BUFFER_WRITE +#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE buffered_size = (info->portwidth / info->chipwidth); buffered_size *= info->buffer_size; while (cnt >= info->portwidth) { @@ -1326,7 +1326,7 @@ int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) cnt -= info->portwidth; FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth); } -#endif /* CFG_FLASH_USE_BUFFER_WRITE */ +#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */ if (cnt == 0) { return (0); @@ -1350,7 +1350,7 @@ int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) /*----------------------------------------------------------------------- */ -#ifdef CFG_FLASH_PROTECTION +#ifdef CONFIG_SYS_FLASH_PROTECTION int flash_real_protect (flash_info_t * info, long sector, int prot) { @@ -1457,7 +1457,7 @@ void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset, flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src); } -#endif /* CFG_FLASH_PROTECTION */ +#endif /* CONFIG_SYS_FLASH_PROTECTION */ /*----------------------------------------------------------------------- * Reverse the order of the erase regions in the CFI QRY structure. @@ -1501,7 +1501,7 @@ static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry) cmdset_intel_read_jedec_ids(info); flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI); -#ifdef CFG_FLASH_PROTECTION +#ifdef CONFIG_SYS_FLASH_PROTECTION /* read legacy lock/unlock bit from intel flash */ if (info->ext_addr) { info->legacy_unlock = flash_read_uchar (info, @@ -1717,7 +1717,7 @@ static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry) { debug ("flash detect cfi\n"); - for (info->portwidth = CFG_FLASH_CFI_WIDTH; + for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH; info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) { for (info->chipwidth = FLASH_CFI_BY8; info->chipwidth <= info->portwidth; @@ -1793,7 +1793,7 @@ ulong flash_get_size (ulong base, int banknum) info->ext_addr = 0; info->cfi_version = 0; -#ifdef CFG_FLASH_PROTECTION +#ifdef CONFIG_SYS_FLASH_PROTECTION info->legacy_unlock = 0; #endif @@ -1882,7 +1882,7 @@ ulong flash_get_size (ulong base, int banknum) debug ("erase_region_count = %d erase_region_size = %d\n", erase_region_count, erase_region_size); for (j = 0; j < erase_region_count; j++) { - if (sect_cnt >= CFG_MAX_FLASH_SECT) { + if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) { printf("ERROR: too many flash sectors\n"); break; } @@ -1947,41 +1947,41 @@ unsigned long flash_init (void) { unsigned long size = 0; int i; -#if defined(CFG_FLASH_AUTOPROTECT_LIST) +#if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST) struct apl_s { ulong start; ulong size; - } apl[] = CFG_FLASH_AUTOPROTECT_LIST; + } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST; #endif -#ifdef CFG_FLASH_PROTECTION +#ifdef CONFIG_SYS_FLASH_PROTECTION char *s = getenv("unlock"); #endif -#define BANK_BASE(i) (((unsigned long [CFI_MAX_FLASH_BANKS])CFG_FLASH_BANKS_LIST)[i]) +#define BANK_BASE(i) (((unsigned long [CFI_MAX_FLASH_BANKS])CONFIG_SYS_FLASH_BANKS_LIST)[i]) /* Init: no FLASHes known */ - for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) { + for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) { flash_info[i].flash_id = FLASH_UNKNOWN; if (!flash_detect_legacy (BANK_BASE(i), i)) flash_get_size (BANK_BASE(i), i); size += flash_info[i].size; if (flash_info[i].flash_id == FLASH_UNKNOWN) { -#ifndef CFG_FLASH_QUIET_TEST +#ifndef CONFIG_SYS_FLASH_QUIET_TEST printf ("## Unknown FLASH on Bank %d " "- Size = 0x%08lx = %ld MB\n", i+1, flash_info[i].size, flash_info[i].size << 20); -#endif /* CFG_FLASH_QUIET_TEST */ +#endif /* CONFIG_SYS_FLASH_QUIET_TEST */ } -#ifdef CFG_FLASH_PROTECTION +#ifdef CONFIG_SYS_FLASH_PROTECTION else if ((s != NULL) && (strcmp(s, "yes") == 0)) { /* * Only the U-Boot image and it's environment * is protected, all other sectors are * unprotected (unlocked) if flash hardware - * protection is used (CFG_FLASH_PROTECTION) + * protection is used (CONFIG_SYS_FLASH_PROTECTION) * and the environment variable "unlock" is * set to "yes". */ @@ -2022,15 +2022,15 @@ unsigned long flash_init (void) &flash_info[i]); } } -#endif /* CFG_FLASH_PROTECTION */ +#endif /* CONFIG_SYS_FLASH_PROTECTION */ } /* Monitor protection ON by default */ -#if (CFG_MONITOR_BASE >= CFG_FLASH_BASE) +#if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) flash_protect (FLAG_PROTECT_SET, - CFG_MONITOR_BASE, - CFG_MONITOR_BASE + monitor_flash_len - 1, - flash_get_info(CFG_MONITOR_BASE)); + CONFIG_SYS_MONITOR_BASE, + CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1, + flash_get_info(CONFIG_SYS_MONITOR_BASE)); #endif /* Environment protection ON by default */ @@ -2049,7 +2049,7 @@ unsigned long flash_init (void) flash_get_info(CONFIG_ENV_ADDR_REDUND)); #endif -#if defined(CFG_FLASH_AUTOPROTECT_LIST) +#if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST) for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) { debug("autoprotecting from %08x to %08x\n", apl[i].start, apl[i].start + apl[i].size - 1); diff --git a/drivers/mtd/dataflash.c b/drivers/mtd/dataflash.c index 049da69..201e518 100644 --- a/drivers/mtd/dataflash.c +++ b/drivers/mtd/dataflash.c @@ -40,12 +40,12 @@ int AT91F_DataflashInit (void) int dfcode; int part; int last_part; - int found[CFG_MAX_DATAFLASH_BANKS]; + int found[CONFIG_SYS_MAX_DATAFLASH_BANKS]; unsigned char protected; AT91F_SpiInit (); - for (i = 0; i < CFG_MAX_DATAFLASH_BANKS; i++) { + for (i = 0; i < CONFIG_SYS_MAX_DATAFLASH_BANKS; i++) { found[i] = 0; dataflash_info[i].Desc.state = IDLE; dataflash_info[i].id = 0; @@ -179,7 +179,7 @@ void AT91F_DataflashSetEnv (void) unsigned char s[32]; /* Will fit a long int in hex */ unsigned long start; - for (i = 0, part= 0; i < CFG_MAX_DATAFLASH_BANKS; i++) { + for (i = 0, part= 0; i < CONFIG_SYS_MAX_DATAFLASH_BANKS; i++) { for(j = 0; j= CFG_MAX_FLASH_SECT) { + if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) { printf("ERROR: too many flash sectors\n"); break; } diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c index 4351824..7dda6c4 100644 --- a/drivers/mtd/nand/fsl_elbc_nand.c +++ b/drivers/mtd/nand/fsl_elbc_nand.c @@ -693,7 +693,7 @@ static struct fsl_elbc_ctrl *elbc_ctrl; static void fsl_elbc_ctrl_init(void) { - immap_t *im = (immap_t *)CFG_IMMR; + immap_t *im = (immap_t *)CONFIG_SYS_IMMR; elbc_ctrl = kzalloc(sizeof(*elbc_ctrl), GFP_KERNEL); if (!elbc_ctrl) diff --git a/drivers/mtd/nand/nand.c b/drivers/mtd/nand/nand.c index 71a0e4b..eeb19ff 100644 --- a/drivers/mtd/nand/nand.c +++ b/drivers/mtd/nand/nand.c @@ -24,15 +24,15 @@ #include #include -#ifndef CFG_NAND_BASE_LIST -#define CFG_NAND_BASE_LIST { CFG_NAND_BASE } +#ifndef CONFIG_SYS_NAND_BASE_LIST +#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } #endif int nand_curr_device = -1; -nand_info_t nand_info[CFG_MAX_NAND_DEVICE]; +nand_info_t nand_info[CONFIG_SYS_MAX_NAND_DEVICE]; -static struct nand_chip nand_chip[CFG_MAX_NAND_DEVICE]; -static ulong base_address[CFG_MAX_NAND_DEVICE] = CFG_NAND_BASE_LIST; +static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE]; +static ulong base_address[CONFIG_SYS_MAX_NAND_DEVICE] = CONFIG_SYS_NAND_BASE_LIST; static const char default_nand_name[] = "nand"; @@ -61,7 +61,7 @@ void nand_init(void) { int i; unsigned int size = 0; - for (i = 0; i < CFG_MAX_NAND_DEVICE; i++) { + for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++) { nand_init_chip(&nand_info[i], &nand_chip[i], base_address[i]); size += nand_info[i].size / 1024; if (nand_curr_device == -1) @@ -69,7 +69,7 @@ void nand_init(void) } printf("%u MiB\n", size / 1024); -#ifdef CFG_NAND_SELECT_DEVICE +#ifdef CONFIG_SYS_NAND_SELECT_DEVICE /* * Select the chip in the board/cpu specific driver */ diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index 0913bb8..fe34a48 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -492,7 +492,7 @@ EXPORT_SYMBOL_GPL(nand_wait_ready); void nand_wait_ready(struct mtd_info *mtd) { struct nand_chip *chip = mtd->priv; - u32 timeo = (CFG_HZ * 20) / 1000; + u32 timeo = (CONFIG_SYS_HZ * 20) / 1000; reset_timer(); @@ -831,9 +831,9 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *this) int state = this->state; if (state == FL_ERASING) - timeo = (CFG_HZ * 400) / 1000; + timeo = (CONFIG_SYS_HZ * 400) / 1000; else - timeo = (CFG_HZ * 20) / 1000; + timeo = (CONFIG_SYS_HZ * 20) / 1000; if ((state == FL_ERASING) && (this->options & NAND_IS_AND)) this->cmdfunc(mtd, NAND_CMD_STATUS_MULTI, -1, -1); diff --git a/drivers/mtd/nand/s3c64xx.c b/drivers/mtd/nand/s3c64xx.c index 159fe76..edaf55a 100644 --- a/drivers/mtd/nand/s3c64xx.c +++ b/drivers/mtd/nand/s3c64xx.c @@ -141,7 +141,7 @@ static int s3c_nand_device_ready(struct mtd_info *mtdinfo) return !!(readl(NFSTAT) & NFSTAT_RnB); } -#ifdef CFG_S3C_NAND_HWECC +#ifdef CONFIG_SYS_S3C_NAND_HWECC /* * This function is called before encoding ecc codes to ready ecc engine. * Written by jsgood @@ -256,7 +256,7 @@ static int s3c_nand_correct_data(struct mtd_info *mtd, u_char *dat, return ret; } -#endif /* CFG_S3C_NAND_HWECC */ +#endif /* CONFIG_SYS_S3C_NAND_HWECC */ /* * Board-specific NAND initialization. The following members of the @@ -297,7 +297,7 @@ int board_nand_init(struct nand_chip *nand) nand->read_buf = nand_read_buf; #endif -#ifdef CFG_S3C_NAND_HWECC +#ifdef CONFIG_SYS_S3C_NAND_HWECC nand->ecc.hwctl = s3c_nand_enable_hwecc; nand->ecc.calculate = s3c_nand_calculate_ecc; nand->ecc.correct = s3c_nand_correct_data; @@ -307,11 +307,11 @@ int board_nand_init(struct nand_chip *nand) * board one day, it will get more complicated... */ nand->ecc.mode = NAND_ECC_HW; - nand->ecc.size = CFG_NAND_ECCSIZE; - nand->ecc.bytes = CFG_NAND_ECCBYTES; + nand->ecc.size = CONFIG_SYS_NAND_ECCSIZE; + nand->ecc.bytes = CONFIG_SYS_NAND_ECCBYTES; #else nand->ecc.mode = NAND_ECC_SOFT; -#endif /* ! CFG_S3C_NAND_HWECC */ +#endif /* ! CONFIG_SYS_S3C_NAND_HWECC */ nand->priv = nand_cs + chip_n++; diff --git a/drivers/mtd/nand_legacy/nand_legacy.c b/drivers/mtd/nand_legacy/nand_legacy.c index bf5565a..407e901 100644 --- a/drivers/mtd/nand_legacy/nand_legacy.c +++ b/drivers/mtd/nand_legacy/nand_legacy.c @@ -66,7 +66,7 @@ struct nand_oob_config { int eccvalid_pos; } oob_config = { {0}, 0, 0}; -struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE] = {{0}}; +struct nand_chip nand_dev_desc[CONFIG_SYS_MAX_NAND_DEVICE] = {{0}}; int curr_device = -1; /* Current NAND Device */ @@ -982,7 +982,7 @@ static int nand_write_ecc (struct nand_chip* nand, size_t to, size_t len, #ifdef CONFIG_OMAP1510 archflashwp(0,0); #endif -#ifdef CFG_NAND_WP +#ifdef CONFIG_SYS_NAND_WP NAND_WP_OFF(); #endif @@ -1036,7 +1036,7 @@ out: #ifdef CONFIG_OMAP1510 archflashwp(0,1); #endif -#ifdef CFG_NAND_WP +#ifdef CONFIG_SYS_NAND_WP NAND_WP_ON(); #endif @@ -1235,7 +1235,7 @@ int nand_legacy_erase(struct nand_chip* nand, size_t ofs, size_t len, int clean) #ifdef CONFIG_OMAP1510 archflashwp(0,0); #endif -#ifdef CFG_NAND_WP +#ifdef CONFIG_SYS_NAND_WP NAND_WP_OFF(); #endif NAND_ENABLE_CE(nand); /* set pin low */ @@ -1321,7 +1321,7 @@ out: #ifdef CONFIG_OMAP1510 archflashwp(0,1); #endif -#ifdef CFG_NAND_WP +#ifdef CONFIG_SYS_NAND_WP NAND_WP_ON(); #endif @@ -1358,7 +1358,7 @@ unsigned long nand_probe(unsigned long physadr) #endif oob_config.badblock_pos = 5; - for (i=0; i