From c9fcb59d7db74b93df9ee0a830bb9f43888f195c Mon Sep 17 00:00:00 2001 From: Jagannadha Sutradharudu Teki Date: Thu, 13 Jun 2013 20:37:19 +0530 Subject: sf: Add bank address register writing support This patch provides support to program a flash bank address register. extended/bank address register contains an information to access the 4th byte addressing in 3-byte address mode. reff' the spec for more details about bank addr register in Page-63, Table 8.16 http://www.spansion.com/Support/Datasheets/S25FL128S_256S_00.pdf Signed-off-by: Jagannadha Sutradharudu Teki Reviewed-by: Simon Glass --- drivers/mtd/spi/spi_flash_internal.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'drivers/mtd/spi/spi_flash_internal.h') diff --git a/drivers/mtd/spi/spi_flash_internal.h b/drivers/mtd/spi/spi_flash_internal.h index 141cfa8..772fef6 100644 --- a/drivers/mtd/spi/spi_flash_internal.h +++ b/drivers/mtd/spi/spi_flash_internal.h @@ -77,6 +77,9 @@ static inline int spi_flash_cmd_write_disable(struct spi_flash *flash) /* Program the status register. */ int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr); +/* Program the bank address register */ +int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel); + /* * Same as spi_flash_cmd_read() except it also claims/releases the SPI * bus. Used as common part of the ->read() operation. -- cgit v1.1 From cf6b11dcda2f13d1c05c2f20e2a1735a833a41fe Mon Sep 17 00:00:00 2001 From: Jagannadha Sutradharudu Teki Date: Wed, 19 Jun 2013 15:31:23 +0530 Subject: sf: Discover the bank addr commands Bank/Extended addr commands are specific to particular flash vendor so discover them based on the idocode0. Assign the discovered bank commands to spi_flash members so-that the bank read/write will use their specific operations. Signed-off-by: Jagannadha Sutradharudu Teki --- drivers/mtd/spi/spi_flash_internal.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'drivers/mtd/spi/spi_flash_internal.h') diff --git a/drivers/mtd/spi/spi_flash_internal.h b/drivers/mtd/spi/spi_flash_internal.h index 772fef6..db6c444 100644 --- a/drivers/mtd/spi/spi_flash_internal.h +++ b/drivers/mtd/spi/spi_flash_internal.h @@ -28,6 +28,17 @@ #define CMD_ERASE_64K 0xd8 #define CMD_ERASE_CHIP 0xc7 +/* Manufacture ID's */ +#define SPI_FLASH_SPANSION_IDCODE0 0x01 +#define SPI_FLASH_STMICRO_IDCODE0 0x20 +#define SPI_FLASH_WINBOND_IDCODE0 0xef + +/* Bank addr access commands */ +#define CMD_BANKADDR_BRWR 0x17 +#define CMD_BANKADDR_BRRD 0x16 +#define CMD_EXTNADDR_WREAR 0xC5 +#define CMD_EXTNADDR_RDEAR 0xC8 + /* Common status */ #define STATUS_WIP 0x01 @@ -80,6 +91,9 @@ int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr); /* Program the bank address register */ int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel); +/* Configure the BAR - discover the bank cmds */ +int spi_flash_bank_config(struct spi_flash *flash, u8 idcode0); + /* * Same as spi_flash_cmd_read() except it also claims/releases the SPI * bus. Used as common part of the ->read() operation. -- cgit v1.1 From e612ddf5939ba257f2933c7539ee39a3f760e8ce Mon Sep 17 00:00:00 2001 From: Jagannadha Sutradharudu Teki Date: Wed, 19 Jun 2013 15:37:09 +0530 Subject: sf: Read flash bank addr register at probe time Read the flash bank addr register to get the state of bank in a perticular flash. and also bank write happens only when there is a change in bank selection from user. bank read only valid for flashes which has > 16Mbytes those are opearted in 3-byte addr mode, each bank occupies 16Mytes. Suppose if the flash has 64Mbytes size consists of 4 banks like bank0, bank1, bank2 and bank3. Signed-off-by: Jagannadha Sutradharudu Teki Reviewed-by: Simon Glass --- drivers/mtd/spi/spi_flash_internal.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers/mtd/spi/spi_flash_internal.h') diff --git a/drivers/mtd/spi/spi_flash_internal.h b/drivers/mtd/spi/spi_flash_internal.h index db6c444..00ed1ee 100644 --- a/drivers/mtd/spi/spi_flash_internal.h +++ b/drivers/mtd/spi/spi_flash_internal.h @@ -28,6 +28,8 @@ #define CMD_ERASE_64K 0xd8 #define CMD_ERASE_CHIP 0xc7 +#define SPI_FLASH_16MB_BOUN 0x1000000 + /* Manufacture ID's */ #define SPI_FLASH_SPANSION_IDCODE0 0x01 #define SPI_FLASH_STMICRO_IDCODE0 0x20 -- cgit v1.1 From 1dcd6d03811d4f30052a5e24377b378867211b05 Mon Sep 17 00:00:00 2001 From: Jagannadha Sutradharudu Teki Date: Wed, 19 Jun 2013 15:33:58 +0530 Subject: sf: Add bank addr code in CONFIG_SPI_FLASH_BAR Defined bank addr code on CONFIG_SPI_FLASH_BAR macro, to reduce the size for existing boards which has < 16Mbytes SPI flashes. It's upto user which has provision to use the bank addr code for flashes which has > 16Mbytes. Signed-off-by: Jagannadha Sutradharudu Teki Reviewed-by: Simon Glass --- drivers/mtd/spi/spi_flash_internal.h | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) (limited to 'drivers/mtd/spi/spi_flash_internal.h') diff --git a/drivers/mtd/spi/spi_flash_internal.h b/drivers/mtd/spi/spi_flash_internal.h index 00ed1ee..e613ef3 100644 --- a/drivers/mtd/spi/spi_flash_internal.h +++ b/drivers/mtd/spi/spi_flash_internal.h @@ -35,11 +35,13 @@ #define SPI_FLASH_STMICRO_IDCODE0 0x20 #define SPI_FLASH_WINBOND_IDCODE0 0xef +#ifdef CONFIG_SPI_FLASH_BAR /* Bank addr access commands */ -#define CMD_BANKADDR_BRWR 0x17 -#define CMD_BANKADDR_BRRD 0x16 -#define CMD_EXTNADDR_WREAR 0xC5 -#define CMD_EXTNADDR_RDEAR 0xC8 +# define CMD_BANKADDR_BRWR 0x17 +# define CMD_BANKADDR_BRRD 0x16 +# define CMD_EXTNADDR_WREAR 0xC5 +# define CMD_EXTNADDR_RDEAR 0xC8 +#endif /* Common status */ #define STATUS_WIP 0x01 @@ -90,11 +92,13 @@ static inline int spi_flash_cmd_write_disable(struct spi_flash *flash) /* Program the status register. */ int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr); +#ifdef CONFIG_SPI_FLASH_BAR /* Program the bank address register */ int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel); /* Configure the BAR - discover the bank cmds */ int spi_flash_bank_config(struct spi_flash *flash, u8 idcode0); +#endif /* * Same as spi_flash_cmd_read() except it also claims/releases the SPI -- cgit v1.1 From ba549de6c53663e534a20741f9ec917fb6526830 Mon Sep 17 00:00:00 2001 From: Jagannadha Sutradharudu Teki Date: Sun, 26 May 2013 23:37:11 +0530 Subject: sf: Remove spi_flash_cmd_poll_bit() There is no other call other than spi_flash_cmd_wait_ready(), hence removed spi_flash_cmd_poll_bit and use the poll status code spi_flash_cmd_wait_ready() itself. Signed-off-by: Jagannadha Sutradharudu Teki Reviewed-by: Simon Glass --- drivers/mtd/spi/spi_flash_internal.h | 4 ---- 1 file changed, 4 deletions(-) (limited to 'drivers/mtd/spi/spi_flash_internal.h') diff --git a/drivers/mtd/spi/spi_flash_internal.h b/drivers/mtd/spi/spi_flash_internal.h index e613ef3..e9b85bf 100644 --- a/drivers/mtd/spi/spi_flash_internal.h +++ b/drivers/mtd/spi/spi_flash_internal.h @@ -107,10 +107,6 @@ int spi_flash_bank_config(struct spi_flash *flash, u8 idcode0); int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd, size_t cmd_len, void *data, size_t data_len); -/* Send a command to the device and wait for some bit to clear itself. */ -int spi_flash_cmd_poll_bit(struct spi_flash *flash, unsigned long timeout, - u8 cmd, u8 poll_bit); - /* * Send the read status command to the device and wait for the wip * (write-in-progress) bit to clear itself. -- cgit v1.1 From 615a1561673a9a1b863f905d40f084f36edb9022 Mon Sep 17 00:00:00 2001 From: Jagannadha Sutradharudu Teki Date: Fri, 21 Jun 2013 15:56:30 +0530 Subject: sf: Add flag status register polling support Flag status register polling is required for micron 512Mb flash devices onwards, for performing erase/program operations. Like polling for WIP(Write-In-Progress) bit in read status register, spi_flash_cmd_wait_ready will poll for PEC(Program-Erase-Control) bit in flag status register. Signed-off-by: Jagannadha Sutradharudu Teki Reviewed-by: Simon Glass --- drivers/mtd/spi/spi_flash_internal.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers/mtd/spi/spi_flash_internal.h') diff --git a/drivers/mtd/spi/spi_flash_internal.h b/drivers/mtd/spi/spi_flash_internal.h index e9b85bf..8147f27 100644 --- a/drivers/mtd/spi/spi_flash_internal.h +++ b/drivers/mtd/spi/spi_flash_internal.h @@ -22,6 +22,7 @@ #define CMD_PAGE_PROGRAM 0x02 #define CMD_WRITE_DISABLE 0x04 #define CMD_READ_STATUS 0x05 +#define CMD_FLAG_STATUS 0x70 #define CMD_WRITE_ENABLE 0x06 #define CMD_ERASE_4K 0x20 #define CMD_ERASE_32K 0x52 @@ -45,6 +46,7 @@ /* Common status */ #define STATUS_WIP 0x01 +#define STATUS_PEC 0x80 /* Send a single-byte command to the device and read the response */ int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len); -- cgit v1.1 From acc237544a0a6b5ebfd41fccf12a7731db209959 Mon Sep 17 00:00:00 2001 From: Jagannadha Sutradharudu Teki Date: Fri, 21 Jun 2013 19:19:00 +0530 Subject: sf: Unify spi_flash write code Move common flash write code into spi_flash_write_common(). Signed-off-by: Jagannadha Sutradharudu Teki Acked-by: Simon Glass --- drivers/mtd/spi/spi_flash_internal.h | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'drivers/mtd/spi/spi_flash_internal.h') diff --git a/drivers/mtd/spi/spi_flash_internal.h b/drivers/mtd/spi/spi_flash_internal.h index 8147f27..be3c768 100644 --- a/drivers/mtd/spi/spi_flash_internal.h +++ b/drivers/mtd/spi/spi_flash_internal.h @@ -108,6 +108,16 @@ int spi_flash_bank_config(struct spi_flash *flash, u8 idcode0); */ int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd, size_t cmd_len, void *data, size_t data_len); +/* + * Used for spi_flash write operation + * - SPI claim + * - spi_flash_cmd_write_enable + * - spi_flash_cmd_write + * - spi_flash_cmd_wait_ready + * - SPI release + */ +int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd, + size_t cmd_len, const void *buf, size_t buf_len); /* * Send the read status command to the device and wait for the wip -- cgit v1.1