From 1336e2d343f088b71ec71907855caccd1053d166 Mon Sep 17 00:00:00 2001 From: "Haijun.Zhang" Date: Tue, 18 Mar 2014 17:04:23 +0800 Subject: mmc:eSDHC: Workaround for data timeout issue on Txxx SoC 1. The Data timeout counter value in eSDHC_SYSCTL register is not working as it should be, so add quirks to enable this workaround to fix it to the max value 0xE. 2. Add CONFIG_SYS_FSL_ERRATUM_ESDHC111 to enable its workaround. * Update of patch for change mmc interface by Pantelis Antoniou Signed-off-by: Haijun Zhang Acked-by: Pantelis Antoniou --- drivers/mmc/fsl_esdhc.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'drivers/mmc') diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 00a454f..4c3b93d 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -244,6 +244,9 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data) timeout++; #endif +#ifdef ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE + timeout = 0xE; +#endif esdhc_clrsetbits32(®s->sysctl, SYSCTL_TIMEOUT_MASK, timeout << 16); return 0; -- cgit v1.1