From eb118807a4c1778bda6294c36e379711cb08e198 Mon Sep 17 00:00:00 2001 From: Shengzhou Liu Date: Thu, 10 Mar 2016 17:36:56 +0800 Subject: driver/ddr/fsl: Add address parity support for DDR4 UDIMM/discrete Add support of address parity for DDR4 UDIMM or discrete memory. It requires to configurate corresponding MR5[2:0] and TIMING_CFG_7[PAR_LAT]. Parity can be turned on by hwconfig, e.g. hwconfig=fsl_ddr:parity=on. Signed-off-by: Shengzhou Liu Reviewed-by: York Sun --- doc/README.fsl-ddr | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'doc') diff --git a/doc/README.fsl-ddr b/doc/README.fsl-ddr index cd71ec8..cec5d94 100644 --- a/doc/README.fsl-ddr +++ b/doc/README.fsl-ddr @@ -123,6 +123,14 @@ ECC can be turned on/off by hwconfig. Syntax is hwconfig=fsl_ddr:ecc=off + +Memory address parity on/off +============================ +address parity can be turned on/off by hwconfig. +Syntax is: +hwconfig=fsl_ddr:parity=on + + Memory testing options for mpc85xx ================================== 1. Memory test can be done once U-Boot prompt comes up using mtest, or @@ -143,6 +151,7 @@ platform hwconfig=fsl_ddr:addr_hash=true,ctlr_intlv=cacheline,bank_intlv=cs0_cs1_cs2_cs3,ecc=on + Table for dynamic ODT for DDR3 ============================== For single-slot system with quad-rank DIMM and dual-slot system, dynamic ODT may -- cgit v1.1