From eec567a67e00d1ed8d941e9098b7d421f4091abf Mon Sep 17 00:00:00 2001 From: TsiChung Liew Date: Tue, 19 Aug 2008 03:01:19 +0600 Subject: ColdFire: I2C fix for multiple platforms Signed-off-by: TsiChung Liew --- cpu/mcf5227x/speed.c | 4 ++++ cpu/mcf523x/cpu_init.c | 4 ++-- cpu/mcf523x/speed.c | 4 ++++ cpu/mcf52x2/cpu_init.c | 12 +++++++++++- cpu/mcf52x2/speed.c | 8 ++++++++ cpu/mcf532x/speed.c | 5 +++++ cpu/mcf5445x/speed.c | 4 ++++ cpu/mcf547x_8x/speed.c | 5 +++++ 8 files changed, 43 insertions(+), 3 deletions(-) (limited to 'cpu') diff --git a/cpu/mcf5227x/speed.c b/cpu/mcf5227x/speed.c index 78c946f..0baf9bc 100644 --- a/cpu/mcf5227x/speed.c +++ b/cpu/mcf5227x/speed.c @@ -116,5 +116,9 @@ int get_clocks(void) gd->bus_clk = gd->flb_clk; } +#ifdef CONFIG_FSL_I2C + gd->i2c1_clk = gd->bus_clk; +#endif + return (0); } diff --git a/cpu/mcf523x/cpu_init.c b/cpu/mcf523x/cpu_init.c index 55c9cd3..8ab5b8e 100644 --- a/cpu/mcf523x/cpu_init.c +++ b/cpu/mcf523x/cpu_init.c @@ -110,8 +110,8 @@ void cpu_init_f(void) #endif #ifdef CONFIG_FSL_I2C - gpio->par_feci2c &= ~(GPIO_PAR_FECI2C_SCL_MASK | GPIO_PAR_FECI2C_SDA_MASK); - gpio->par_feci2c |= (GPIO_PAR_FECI2C_SCL_I2CSCL | GPIO_PAR_FECI2C_SDA_I2CSDA); + CFG_I2C_PINMUX_REG &= CFG_I2C_PINMUX_CLR; + CFG_I2C_PINMUX_REG |= CFG_I2C_PINMUX_SET; #endif icache_enable(); diff --git a/cpu/mcf523x/speed.c b/cpu/mcf523x/speed.c index 247d318..1bda2d4 100644 --- a/cpu/mcf523x/speed.c +++ b/cpu/mcf523x/speed.c @@ -45,5 +45,9 @@ int get_clocks(void) gd->bus_clk = CFG_CLK; gd->cpu_clk = (gd->bus_clk * 2); +#ifdef CONFIG_FSL_I2C + gd->i2c1_clk = gd->bus_clk; +#endif + return (0); } diff --git a/cpu/mcf52x2/cpu_init.c b/cpu/mcf52x2/cpu_init.c index 3cacb55..68aefe9 100644 --- a/cpu/mcf52x2/cpu_init.c +++ b/cpu/mcf52x2/cpu_init.c @@ -80,6 +80,15 @@ void cpu_init_f(void) mbar_writeShort(MCFSIM_CSCR0, CFG_CSCR0); mbar_writeLong(MCFSIM_CSMR0, CFG_CSMR0); +#ifdef CONFIG_FSL_I2C + CFG_I2C_PINMUX_REG = CFG_I2C_PINMUX_REG & CFG_I2C_PINMUX_CLR; + CFG_I2C_PINMUX_REG |= CFG_I2C_PINMUX_SET; +#ifdef CFG_I2C2_OFFSET + CFG_I2C2_PINMUX_REG &= CFG_I2C2_PINMUX_CLR; + CFG_I2C2_PINMUX_REG |= CFG_I2C2_PINMUX_SET; +#endif +#endif + /* enable instruction cache now */ icache_enable(); } @@ -322,7 +331,8 @@ void cpu_init_f(void) #endif /* #ifndef CONFIG_MONITOR_IS_IN_RAM */ #ifdef CONFIG_FSL_I2C - gpio_reg->par_feci2c = 0x000F; + CFG_I2C_PINMUX_REG &= CFG_I2C_PINMUX_CLR; + CFG_I2C_PINMUX_REG |= CFG_I2C_PINMUX_SET; #endif /* enable instruction cache now */ diff --git a/cpu/mcf52x2/speed.c b/cpu/mcf52x2/speed.c index f6edd5b..4cb8f93 100644 --- a/cpu/mcf52x2/speed.c +++ b/cpu/mcf52x2/speed.c @@ -82,5 +82,13 @@ int get_clocks (void) #else gd->bus_clk = gd->cpu_clk; #endif + +#ifdef CONFIG_FSL_I2C + gd->i2c1_clk = gd->bus_clk; +#ifdef CFG_I2C2_OFFSET + gd->i2c2_clk = gd->bus_clk; +#endif +#endif + return (0); } diff --git a/cpu/mcf532x/speed.c b/cpu/mcf532x/speed.c index 001b9f4..a11e425 100644 --- a/cpu/mcf532x/speed.c +++ b/cpu/mcf532x/speed.c @@ -212,5 +212,10 @@ int get_clocks(void) { gd->bus_clk = clock_pll(CFG_CLK / 1000, 0) * 1000; gd->cpu_clk = (gd->bus_clk * 3); + +#ifdef CONFIG_FSL_I2C + gd->i2c1_clk = gd->bus_clk; +#endif + return (0); } diff --git a/cpu/mcf5445x/speed.c b/cpu/mcf5445x/speed.c index f677f3c..6711a1d 100644 --- a/cpu/mcf5445x/speed.c +++ b/cpu/mcf5445x/speed.c @@ -209,5 +209,9 @@ int get_clocks(void) #endif } +#ifdef CONFIG_FSL_I2C + gd->i2c1_clk = gd->bus_clk; +#endif + return (0); } diff --git a/cpu/mcf547x_8x/speed.c b/cpu/mcf547x_8x/speed.c index 389e7c9..28fe657 100644 --- a/cpu/mcf547x_8x/speed.c +++ b/cpu/mcf547x_8x/speed.c @@ -39,5 +39,10 @@ int get_clocks(void) gd->bus_clk = CFG_CLK; gd->cpu_clk = (gd->bus_clk * 2); + +#ifdef CONFIG_FSL_I2C + gd->i2c1_clk = gd->bus_clk; +#endif + return (0); } -- cgit v1.1