From 899620c2d66d4eef3b2a0034d062e71d45d886c9 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Tue, 15 Aug 2006 14:22:35 +0200 Subject: Add initial support for the ALPR board from Prodrive NAND needs some additional testing Patch by Heiko Schocher, 15 Aug 2006 --- cpu/ppc4xx/405gp_pci.c | 4 ++++ cpu/ppc4xx/4xx_enet.c | 15 +++++++++++++++ cpu/ppc4xx/sdram.c | 8 ++++++++ 3 files changed, 27 insertions(+) (limited to 'cpu') diff --git a/cpu/ppc4xx/405gp_pci.c b/cpu/ppc4xx/405gp_pci.c index 0b0686b..7e2c7c1 100644 --- a/cpu/ppc4xx/405gp_pci.c +++ b/cpu/ppc4xx/405gp_pci.c @@ -475,7 +475,11 @@ void pci_440_init (struct pci_controller *hose) pci_set_region(hose->regions + reg_num++, CFG_PCI_TARGBASE, CFG_PCI_MEMBASE, +#ifdef CFG_PCI_MEMSIZE + CFG_PCI_MEMSIZE, +#else 0x10000000, +#endif PCI_REGION_MEM ); #if defined(CONFIG_PCI_SYS_MEM_BUS) && defined(CONFIG_PCI_SYS_MEM_PHYS) && \ diff --git a/cpu/ppc4xx/4xx_enet.c b/cpu/ppc4xx/4xx_enet.c index fab65af..d166993 100644 --- a/cpu/ppc4xx/4xx_enet.c +++ b/cpu/ppc4xx/4xx_enet.c @@ -502,6 +502,21 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis) * otherwise, just check the speeds & feeds */ if (hw_p->first_init == 0) { +#if defined(CONFIG_88E1111_CLK_DELAY) + /* + * On some boards (e.g. ALPR) the Marvell 88E1111 PHY needs + * the "RGMII transmit timing control" and "RGMII receive + * timing control" bits set, so that Gbit communication works + * without problems. + * Also set the "Transmitter disable" to 1 to enable the + * transmitter. + * After setting these bits a soft-reset must occur for this + * change to become active. + */ + miiphy_read (dev->name, reg, 0x14, ®_short); + reg_short |= (1 << 7) | (1 << 1) | (1 << 0); + miiphy_write (dev->name, reg, 0x14, reg_short); +#endif miiphy_reset (dev->name, reg); #if defined(CONFIG_440GX) || defined(CONFIG_440SP) || defined(CONFIG_440SPE) diff --git a/cpu/ppc4xx/sdram.c b/cpu/ppc4xx/sdram.c index faeea5c..f06038e 100644 --- a/cpu/ppc4xx/sdram.c +++ b/cpu/ppc4xx/sdram.c @@ -351,6 +351,14 @@ long int initdram(int board_type) int i; int tr1_bank1; +#if defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR) || defined(CONFIG_440SP) + /* + * Soft-reset SDRAM controller. + */ + mtsdr(sdr_srst, SDR0_SRST_DMC); + mtsdr(sdr_srst, 0x00000000); +#endif + for (i=0; i Date: Sat, 7 Oct 2006 11:30:52 +0200 Subject: Add CONFIG_BOARD_RESET to configure board specific reset function Patch by Stefan Roese, 07 Oct 2006 --- cpu/ppc4xx/cpu.c | 20 ++++++++------------ 1 file changed, 8 insertions(+), 12 deletions(-) (limited to 'cpu') diff --git a/cpu/ppc4xx/cpu.c b/cpu/ppc4xx/cpu.c index 94478db..4e81ce2 100644 --- a/cpu/ppc4xx/cpu.c +++ b/cpu/ppc4xx/cpu.c @@ -41,6 +41,10 @@ DECLARE_GLOBAL_DATA_PTR; #endif +#if defined(CONFIG_BOARD_RESET) +void board_reset(void); +#endif + #if defined(CONFIG_440) #define FREQ_EBC (sys_info.freqEPB) #else @@ -414,23 +418,15 @@ int ppc440spe_revB() { int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { -#if defined(CONFIG_YOSEMITE) || defined(CONFIG_YELLOWSTONE) - /*give reset to BCSR*/ - *(unsigned char*)(CFG_BCSR_BASE | 0x06) = 0x09; - +#if defined(CONFIG_BOARD_RESET) + board_reset(); #else - /* * Initiate system reset in debug control register DBCR */ - __asm__ __volatile__("lis 3, 0x3000" ::: "r3"); -#if defined(CONFIG_440) - __asm__ __volatile__("mtspr 0x134, 3"); -#else - __asm__ __volatile__("mtspr 0x3f2, 3"); -#endif + mtspr(dbcr0, 0x30000000); +#endif /* defined(CONFIG_BOARD_RESET) */ -#endif/* defined(CONFIG_YOSEMITE) || defined(CONFIG_YELLOWSTONE)*/ return 1; } -- cgit v1.1 From 1c2ce2262069510f31c7d3fd7efd3d58b8c0c148 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Mon, 27 Nov 2006 14:12:17 +0100 Subject: [PATCH] Update Prodrive ALPR board support (440GX) Signed-off-by: Stefan Roese --- cpu/ppc4xx/4xx_enet.c | 5 ++--- cpu/ppc4xx/cpu.c | 4 ++-- cpu/ppc4xx/cpu_init.c | 4 ++++ 3 files changed, 8 insertions(+), 5 deletions(-) (limited to 'cpu') diff --git a/cpu/ppc4xx/4xx_enet.c b/cpu/ppc4xx/4xx_enet.c index 81d49ff..8c517ba 100644 --- a/cpu/ppc4xx/4xx_enet.c +++ b/cpu/ppc4xx/4xx_enet.c @@ -470,8 +470,7 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis) #else if ((devnum == 0) || (devnum == 1)) { out32 (ZMII_FER, (ZMII_FER_SMII | ZMII_FER_MDI) << ZMII_FER_V (devnum)); - } - else { /* ((devnum == 2) || (devnum == 3)) */ + } else { /* ((devnum == 2) || (devnum == 3)) */ out32 (ZMII_FER, ZMII_FER_MDI << ZMII_FER_V (devnum)); out32 (RGMII_FER, ((RGMII_FER_RGMII << RGMII_FER_V (2)) | (RGMII_FER_RGMII << RGMII_FER_V (3)))); @@ -808,7 +807,7 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis) hw_p->rx[i].ctrl |= MAL_RX_CTRL_EMPTY | MAL_RX_CTRL_INTR; hw_p->rx_ready[i] = -1; #if 0 - printf ("RX_BUFF %d @ 0x%08lx\n", i, (ulong) rx[i].data_ptr); + printf ("RX_BUFF %d @ 0x%08lx\n", i, (ulong) hw_p->rx[i].data_ptr); #endif } diff --git a/cpu/ppc4xx/cpu.c b/cpu/ppc4xx/cpu.c index faa5257..c45525d 100644 --- a/cpu/ppc4xx/cpu.c +++ b/cpu/ppc4xx/cpu.c @@ -426,8 +426,8 @@ int ppc440spe_revB() { int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { -#if defined(CONFIG_BOARD_RESET) - board_reset(); +#if defined(CFG_4xx_RESET_TYPE) + mtspr(dbcr0, CFG_4xx_RESET_TYPE << 28); #else /* * Initiate system reset in debug control register DBCR diff --git a/cpu/ppc4xx/cpu_init.c b/cpu/ppc4xx/cpu_init.c index def46f1..4b746b0 100644 --- a/cpu/ppc4xx/cpu_init.c +++ b/cpu/ppc4xx/cpu_init.c @@ -321,6 +321,10 @@ cpu_init_f (void) #else val |= 0xf0000000; /* generate system reset after 2.684 seconds */ #endif +#if defined(CFG_4xx_RESET_TYPE) + val &= ~0x30000000; /* clear WRC bits */ + val |= CFG_4xx_RESET_TYPE << 28; /* set board specific WRC type */ +#endif mtspr(tcr, val); val = mfspr(tsr); -- cgit v1.1 From ec0c2ec725aec9524a177a77ce75559e644a931a Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Mon, 27 Nov 2006 14:46:06 +0100 Subject: [PATCH] Remove testing 4xx enet PHY setup Signed-off-by: Stefan Roese --- cpu/ppc4xx/4xx_enet.c | 17 +---------------- 1 file changed, 1 insertion(+), 16 deletions(-) (limited to 'cpu') diff --git a/cpu/ppc4xx/4xx_enet.c b/cpu/ppc4xx/4xx_enet.c index 8c517ba..7a2483c 100644 --- a/cpu/ppc4xx/4xx_enet.c +++ b/cpu/ppc4xx/4xx_enet.c @@ -560,22 +560,7 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis) * otherwise, just check the speeds & feeds */ if (hw_p->first_init == 0) { -#if defined(CONFIG_88E1111_CLK_DELAY) - /* - * On some boards (e.g. ALPR) the Marvell 88E1111 PHY needs - * the "RGMII transmit timing control" and "RGMII receive - * timing control" bits set, so that Gbit communication works - * without problems. - * Also set the "Transmitter disable" to 1 to enable the - * transmitter. - * After setting these bits a soft-reset must occur for this - * change to become active. - */ - miiphy_read (dev->name, reg, 0x14, ®_short); - reg_short |= (1 << 7) | (1 << 1) | (1 << 0); - miiphy_write (dev->name, reg, 0x14, reg_short); -#endif -#if defined(CONFIG_M88E1111_PHY) /* test-only: merge with CONFIG_88E1111_CLK_DELAY !!! */ +#if defined(CONFIG_M88E1111_PHY) miiphy_write (dev->name, reg, 0x14, 0x0ce3); miiphy_write (dev->name, reg, 0x18, 0x4101); miiphy_write (dev->name, reg, 0x09, 0x0e00); -- cgit v1.1 From 1f94d162e2b5f0edc28d9fb11482502c44d218e1 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Mon, 27 Nov 2006 14:48:41 +0100 Subject: [PATCH] 4xx: Fix problem with board specific reset code Signed-off-by: Stefan Roese --- cpu/ppc4xx/cpu.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'cpu') diff --git a/cpu/ppc4xx/cpu.c b/cpu/ppc4xx/cpu.c index c45525d..87299c1 100644 --- a/cpu/ppc4xx/cpu.c +++ b/cpu/ppc4xx/cpu.c @@ -426,6 +426,9 @@ int ppc440spe_revB() { int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { +#if defined(CONFIG_BOARD_RESET) + board_reset(); +#else /* defined(CONFIG_BOARD_RESET) */ #if defined(CFG_4xx_RESET_TYPE) mtspr(dbcr0, CFG_4xx_RESET_TYPE << 28); #else -- cgit v1.1 From 1729b92cde575476684bffe819d0b7791b57bff2 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Mon, 27 Nov 2006 14:52:04 +0100 Subject: [PATCH] 4xx: Fix problem with board specific reset code (now for real) Signed-off-by: Stefan Roese --- cpu/ppc4xx/cpu.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'cpu') diff --git a/cpu/ppc4xx/cpu.c b/cpu/ppc4xx/cpu.c index 87299c1..447383f 100644 --- a/cpu/ppc4xx/cpu.c +++ b/cpu/ppc4xx/cpu.c @@ -428,7 +428,7 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { #if defined(CONFIG_BOARD_RESET) board_reset(); -#else /* defined(CONFIG_BOARD_RESET) */ +#else #if defined(CFG_4xx_RESET_TYPE) mtspr(dbcr0, CFG_4xx_RESET_TYPE << 28); #else @@ -436,6 +436,7 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) * Initiate system reset in debug control register DBCR */ mtspr(dbcr0, 0x30000000); +#endif /* defined(CFG_4xx_RESET_TYPE) */ #endif /* defined(CONFIG_BOARD_RESET) */ return 1; -- cgit v1.1