From 96026d42fa4e646d28318c0a1438aac4b2017909 Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Thu, 12 Jun 2008 12:40:11 +0200 Subject: Fix 4xx build issue Building for 4xx doesn't work since commit 4dbdb768: In file included from 4xx_pcie.c:28: include/asm/processor.h:971: error: expected ')' before 'ver' make[1]: *** [4xx_pcie.o] Error 1 This patch fixes the problem. Signed-off-by: Anatolij Gustschin Acked-by: Stefan Roese Acked-by: Kumar Gala --- cpu/mpc85xx/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'cpu') diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c index 2b7e753..baf8b81 100644 --- a/cpu/mpc85xx/cpu.c +++ b/cpu/mpc85xx/cpu.c @@ -59,7 +59,7 @@ struct cpu_type cpu_type_list [] = { CPU_TYPE_ENTRY(8572, 8572_E), }; -struct cpu_type *identify_cpu(uint ver) +struct cpu_type *identify_cpu(u32 ver) { int i; for (i = 0; i < ARRAY_SIZE(cpu_type_list); i++) -- cgit v1.1 From 4688f9e34a87e825aed34d07c9ca7a273e6fc8ab Mon Sep 17 00:00:00 2001 From: Peter Ma Date: Sun, 1 Jun 2008 22:59:24 -0700 Subject: avr32: Add GPIO manipulation functions Adds GPIO manipulation functions for AVR32 AP7 platform. Signed-off-by: Peter Ma [haavard.skinnemoen@atmel.com: coding style fixup, slight simplification] Signed-off-by: Haavard Skinnemoen --- cpu/at32ap/pio.c | 56 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 56 insertions(+) (limited to 'cpu') diff --git a/cpu/at32ap/pio.c b/cpu/at32ap/pio.c index 9ba0b8e..f64004b 100644 --- a/cpu/at32ap/pio.c +++ b/cpu/at32ap/pio.c @@ -58,3 +58,59 @@ void gpio_select_periph_B(unsigned int pin, int use_pullup) else pio2_writel(base, PUDR, mask); } + +void gpio_select_pio(unsigned int pin, unsigned long gpiof_flags) +{ + void *base = gpio_pin_to_addr(pin); + uint32_t mask = 1 << (pin & 0x1f); + + if (!base) + panic("Invalid GPIO pin %u\n", pin); + + if (gpiof_flags & GPIOF_OUTPUT) { + if (gpiof_flags & GPIOF_MULTIDRV) + pio2_writel(base, MDER, mask); + else + pio2_writel(base, MDDR, mask); + pio2_writel(base, PUDR, mask); + pio2_writel(base, OER, mask); + } else { + if (gpiof_flags & GPIOF_PULLUP) + pio2_writel(base, PUER, mask); + else + pio2_writel(base, PUDR, mask); + if (gpiof_flags & GPIOF_DEGLITCH) + pio2_writel(base, IFER, mask); + else + pio2_writel(base, IFDR, mask); + pio2_writel(base, ODR, mask); + } + + pio2_writel(base, PER, mask); +} + +void gpio_set_value(unsigned int pin, int value) +{ + void *base = gpio_pin_to_addr(pin); + uint32_t mask = 1 << (pin & 0x1f); + + if (!base) + panic("Invalid GPIO pin %u\n", pin); + + if (value) + pio2_writel(base, SODR, mask); + else + pio2_writel(base, CODR, mask); +} + +int gpio_get_value(unsigned int pin) +{ + void *base = gpio_pin_to_addr(pin); + int value; + + if (!base) + panic("Invalid GPIO pin %u\n", pin); + + value = pio2_readl(base, PDSR); + return (value >> (pin & 0x1f)) & 1; +} -- cgit v1.1 From 5605ef6b5802921cbefe6a933a9dea3497396b5c Mon Sep 17 00:00:00 2001 From: Haavard Skinnemoen Date: Fri, 20 Jun 2008 12:44:28 +0200 Subject: avr32: Fix SPI portmux initialization Use the new GPIO manipulation functions to set up the chip select lines, and make sure both busses use GPIO for chip select control. Signed-off-by: Haavard Skinnemoen --- cpu/at32ap/at32ap700x/gpio.c | 56 +++++++++++++++++++++++++++----------------- 1 file changed, 34 insertions(+), 22 deletions(-) (limited to 'cpu') diff --git a/cpu/at32ap/at32ap700x/gpio.c b/cpu/at32ap/at32ap700x/gpio.c index 3da35d4..56ba2f9 100644 --- a/cpu/at32ap/at32ap700x/gpio.c +++ b/cpu/at32ap/at32ap700x/gpio.c @@ -149,24 +149,27 @@ void gpio_enable_mmci(void) #ifdef AT32AP700x_CHIP_HAS_SPI void gpio_enable_spi0(unsigned long cs_mask) { - u32 pa_mask = 0; - gpio_select_periph_A(GPIO_PIN_PA0, 0); /* MISO */ gpio_select_periph_A(GPIO_PIN_PA1, 0); /* MOSI */ gpio_select_periph_A(GPIO_PIN_PA2, 0); /* SCK */ - if (cs_mask & (1 << 0)) - pa_mask |= 1 << 3; /* NPCS0 */ - if (cs_mask & (1 << 1)) - pa_mask |= 1 << 4; /* NPCS1 */ - if (cs_mask & (1 << 2)) - pa_mask |= 1 << 5; /* NPCS2 */ - if (cs_mask & (1 << 3)) - pa_mask |= 1 << 20; /* NPCS3 */ - - __raw_writel(pa_mask, PIOA_BASE + 0x00); - __raw_writel(pa_mask, PIOA_BASE + 0x30); - __raw_writel(pa_mask, PIOA_BASE + 0x10); + /* Set up NPCSx as GPIO outputs, initially high */ + if (cs_mask & (1 << 0)) { + gpio_set_value(GPIO_PIN_PA3, 1); + gpio_select_pio(GPIO_PIN_PA3, GPIOF_OUTPUT); + } + if (cs_mask & (1 << 1)) { + gpio_set_value(GPIO_PIN_PA4, 1); + gpio_select_pio(GPIO_PIN_PA4, GPIOF_OUTPUT); + } + if (cs_mask & (1 << 2)) { + gpio_set_value(GPIO_PIN_PA5, 1); + gpio_select_pio(GPIO_PIN_PA5, GPIOF_OUTPUT); + } + if (cs_mask & (1 << 3)) { + gpio_set_value(GPIO_PIN_PA20, 1); + gpio_select_pio(GPIO_PIN_PA20, GPIOF_OUTPUT); + } } void gpio_enable_spi1(unsigned long cs_mask) @@ -175,13 +178,22 @@ void gpio_enable_spi1(unsigned long cs_mask) gpio_select_periph_B(GPIO_PIN_PB1, 0); /* MOSI */ gpio_select_periph_B(GPIO_PIN_PB5, 0); /* SCK */ - if (cs_mask & (1 << 0)) - gpio_select_periph_B(GPIO_PIN_PB2, 0); /* NPCS0 */ - if (cs_mask & (1 << 1)) - gpio_select_periph_B(GPIO_PIN_PB3, 0); /* NPCS1 */ - if (cs_mask & (1 << 2)) - gpio_select_periph_B(GPIO_PIN_PB4, 0); /* NPCS2 */ - if (cs_mask & (1 << 3)) - gpio_select_periph_A(GPIO_PIN_PA27, 0); /* NPCS3 */ + /* Set up NPCSx as GPIO outputs, initially high */ + if (cs_mask & (1 << 0)) { + gpio_set_value(GPIO_PIN_PB2, 1); + gpio_select_pio(GPIO_PIN_PB2, GPIOF_OUTPUT); + } + if (cs_mask & (1 << 1)) { + gpio_set_value(GPIO_PIN_PB3, 1); + gpio_select_pio(GPIO_PIN_PB3, GPIOF_OUTPUT); + } + if (cs_mask & (1 << 2)) { + gpio_set_value(GPIO_PIN_PB4, 1); + gpio_select_pio(GPIO_PIN_PB4, GPIOF_OUTPUT); + } + if (cs_mask & (1 << 3)) { + gpio_set_value(GPIO_PIN_PA27, 1); + gpio_select_pio(GPIO_PIN_PA27, GPIOF_OUTPUT); + } } #endif -- cgit v1.1 From aac7a5095b968d6c9a3e6422f31b4ad203cac9c8 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Mon, 23 Jun 2008 11:15:09 +0200 Subject: ppc4xx: Fix problem in gpio_config() As pointed out by Guennadi Liakhovetski (thanks), pin2 is already shifted left by one. So the additional shift is bogus. Signed-off-by: Stefan Roese --- cpu/ppc4xx/gpio.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'cpu') diff --git a/cpu/ppc4xx/gpio.c b/cpu/ppc4xx/gpio.c index 37d3fa8..df99f53 100644 --- a/cpu/ppc4xx/gpio.c +++ b/cpu/ppc4xx/gpio.c @@ -1,5 +1,5 @@ /* - * (C) Copyright 2007 + * (C) Copyright 2007-2008 * Stefan Roese, DENX Software Engineering, sr@denx.de. * * See file CREDITS for list of people who contributed to this @@ -52,7 +52,7 @@ void gpio_config(int pin, int in_out, int gpio_alt, int out_val) } mask = 0x80000000 >> pin; - mask2 = 0xc0000000 >> (pin2 << 1); + mask2 = 0xc0000000 >> pin2; /* first set TCR to 0 */ out_be32((void *)GPIO0_TCR + offs, in_be32((void *)GPIO0_TCR + offs) & ~mask); -- cgit v1.1 From 4890246a2c5df90a74e2941e3673a49bbd36aee9 Mon Sep 17 00:00:00 2001 From: Kim Phillips Date: Tue, 17 Jun 2008 17:45:27 -0500 Subject: mpc83xx: move CPU_TYPE_ENTRY over to processor.h to avoid this: cpu.c:47:1: warning: "CPU_TYPE_ENTRY" redefined In file included from cpu.c:33: /home/kim/git/u-boot/include/asm/processor.h:982:1: warning: this is the location of the previous definition Signed-off-by: Kim Phillips --- cpu/mpc83xx/cpu.c | 1 - 1 file changed, 1 deletion(-) (limited to 'cpu') diff --git a/cpu/mpc83xx/cpu.c b/cpu/mpc83xx/cpu.c index 36de78d..cc03f8a 100644 --- a/cpu/mpc83xx/cpu.c +++ b/cpu/mpc83xx/cpu.c @@ -44,7 +44,6 @@ int checkcpu(void) char buf[32]; int i; -#define CPU_TYPE_ENTRY(x) {#x, SPR_##x} const struct cpu_type { char name[15]; u32 partid; -- cgit v1.1 From 846f1574ddddeda2bc227655e687308695f41cdc Mon Sep 17 00:00:00 2001 From: Andre Schwarz Date: Mon, 23 Jun 2008 11:40:56 +0200 Subject: fix system config overwrite @ MPC834x and MPC8313 During 83xx setup the "System I/O configuration register high" gets overwritten with user defined value if CFG_SICRH is defined. Regarding to the MPC834x manual (Table 5-28 reve.1) bits 28+29 of SICRH must keep their reset value regardless of configuration. On my board (using RGMII) those bits are set after reset - yet it's unclear where they come from. The patch keeps both bits on MPC834x and MPC8313. Signed-off-by: Andre Schwarz Signed-off-by: Kim Phillips --- cpu/mpc83xx/cpu_init.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'cpu') diff --git a/cpu/mpc83xx/cpu_init.c b/cpu/mpc83xx/cpu_init.c index fb184d8..67c9e57 100644 --- a/cpu/mpc83xx/cpu_init.c +++ b/cpu/mpc83xx/cpu_init.c @@ -181,8 +181,13 @@ void cpu_init_f (volatile immap_t * im) /* System General Purpose Register */ #ifdef CFG_SICRH +#if defined(CONFIG_MPC834X) || defined(CONFIG_MPC8313) + /* regarding to MPC34x manual rev.1 bits 28..29 must be preserved */ + im->sysconf.sicrh = (im->sysconf.sicrh & 0x0000000C) | CFG_SICRH; +#else im->sysconf.sicrh = CFG_SICRH; #endif +#endif #ifdef CFG_SICRL im->sysconf.sicrl = CFG_SICRL; #endif -- cgit v1.1 From 341188b9ccaa8d4462d772cc067aca8d7618633a Mon Sep 17 00:00:00 2001 From: Haavard Skinnemoen Date: Thu, 22 May 2008 11:09:59 +0200 Subject: MMC: Consolidate MMC/SD command definitions This moves the MMC and SD Card command definitions from include/asm/arch/mmc.h into include/mmc.h. These definitions are given by the MMC and SD Card standards, not by any particular architecture. There's a lot more room for consolidation in the MMC drivers which I'm hoping to get done eventually, but this patch is a start. Compile-tested for all avr32 boards as well as lpc2292sodimm and lubbock. This should cover all three mmc drivers in the tree. Signed-off-by: Haavard Skinnemoen --- cpu/at32ap/atmel_mci.c | 4 ++-- cpu/pxa/mmc.c | 11 +++++++---- 2 files changed, 9 insertions(+), 6 deletions(-) (limited to 'cpu') diff --git a/cpu/at32ap/atmel_mci.c b/cpu/at32ap/atmel_mci.c index 3795add..61aa184 100644 --- a/cpu/at32ap/atmel_mci.c +++ b/cpu/at32ap/atmel_mci.c @@ -349,7 +349,7 @@ static int sd_init_card(struct mmc_cid *cid, int verbose) mmc_idle_cards(); for (i = 0; i < 1000; i++) { - ret = mmc_acmd(MMC_ACMD_SD_SEND_OP_COND, CFG_MMC_OP_COND, + ret = mmc_acmd(SD_CMD_APP_SEND_OP_COND, CFG_MMC_OP_COND, resp, R3 | NID); if (ret || (resp[0] & 0x80000000)) break; @@ -367,7 +367,7 @@ static int sd_init_card(struct mmc_cid *cid, int verbose) mmc_dump_cid(cid); /* Get RCA of the card that responded */ - ret = mmc_cmd(MMC_CMD_SD_SEND_RELATIVE_ADDR, 0, resp, R6 | NCR); + ret = mmc_cmd(SD_CMD_SEND_RELATIVE_ADDR, 0, resp, R6 | NCR); if (ret) return ret; diff --git a/cpu/pxa/mmc.c b/cpu/pxa/mmc.c index 039ce0f..4495a80 100644 --- a/cpu/pxa/mmc.c +++ b/cpu/pxa/mmc.c @@ -119,7 +119,7 @@ mmc_block_read(uchar * dst, ulong src, ulong len) MMC_RDTO = 0xffff; MMC_NOB = 1; MMC_BLKLEN = len; - mmc_cmd(MMC_CMD_READ_BLOCK, argh, argl, + mmc_cmd(MMC_CMD_READ_SINGLE_BLOCK, argh, argl, MMC_CMDAT_R1 | MMC_CMDAT_READ | MMC_CMDAT_BLOCK | MMC_CMDAT_DATA_EN); @@ -568,7 +568,7 @@ mmc_init(int verbose) MMC_SPI = MMC_SPI_DISABLE; /* reset */ - mmc_cmd(MMC_CMD_RESET, 0, 0, MMC_CMDAT_INIT | MMC_CMDAT_R0); + mmc_cmd(MMC_CMD_GO_IDLE_STATE, 0, 0, MMC_CMDAT_INIT | MMC_CMDAT_R0); udelay(200000); retries = 3; while (retries--) { @@ -578,7 +578,10 @@ mmc_init(int verbose) break; } - resp = mmc_cmd(SD_CMD_APP_OP_COND, 0x0020, 0, MMC_CMDAT_R3 | (retries < 2 ? 0 : MMC_CMDAT_INIT)); /* Select 3.2-3.3 and 3.3-3.4V */ + /* Select 3.2-3.3 and 3.3-3.4V */ + resp = mmc_cmd(SD_CMD_APP_SEND_OP_COND, 0x0020, 0, + MMC_CMDAT_R3 | (retries < 2 ? 0 + : MMC_CMDAT_INIT)); if (resp[0] & 0x80000000) { mmc_dev.if_type = IF_TYPE_SD; debug("Detected SD card\n"); @@ -616,7 +619,7 @@ mmc_init(int verbose) memcpy(cid_resp, resp, sizeof(cid_resp)); /* MMC exists, get CSD too */ - resp = mmc_cmd(MMC_CMD_SET_RCA, 0, 0, MMC_CMDAT_R1); + resp = mmc_cmd(MMC_CMD_SET_RELATIVE_ADDR, 0, 0, MMC_CMDAT_R1); if (IF_TYPE_SD == mmc_dev.if_type) rca = ((resp[0] & 0xffff0000) >> 16); resp = mmc_cmd(MMC_CMD_SEND_CSD, rca, 0, MMC_CMDAT_R2); -- cgit v1.1 From e093a247628228100f405b6d7f6b1bfc16141938 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Sat, 28 Jun 2008 23:34:37 +0200 Subject: Coding Style Cleanup Signed-off-by: Wolfgang Denk --- cpu/mpc85xx/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'cpu') diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c index baf8b81..0f72051 100644 --- a/cpu/mpc85xx/cpu.c +++ b/cpu/mpc85xx/cpu.c @@ -323,7 +323,7 @@ void upmconfig (uint upm, uint * table, uint size) /* Find the address for the dummy write transaction */ for (brp = &lbc->br0, orp = &lbc->or0, i = 0; i < 8; i++, brp += 2, orp += 2) { - + /* Look for a valid BR with selected UPM */ if ((in_be32(brp) & (BR_V | upmmask)) == (BR_V | upmmask)) { dummy = (volatile u8*)(in_be32(brp) >> BR_BA_SHIFT); -- cgit v1.1 From 745d8a0d3cea82e6d1753e14afb4588c34761b15 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Sat, 28 Jun 2008 14:56:17 +0200 Subject: ppc4xx: Fix 460EX errata with CPU lockup upon high AHB traffic This patch implements a fix provided by AMCC so that the lockup upon simultanious traffic on AHB USB OTG, USB 2.0 and SATA doesn't occur anymore: Set SDR0_AHB_CFG[A2P_INCR4] (bit 24) and clear SDR0_AHB_CFG[A2P_PROT2] (bit 25) for a new 460EX errata regarding concurrent use of AHB USB OTG, USB 2.0 host and SATA. This errata is not officially available yet. I'll update the comment to add the errata number later. Signed-off-by: Stefan Roese --- cpu/ppc4xx/cpu_init.c | 20 ++++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) (limited to 'cpu') diff --git a/cpu/ppc4xx/cpu_init.c b/cpu/ppc4xx/cpu_init.c index 1e9423a..ac64279 100644 --- a/cpu/ppc4xx/cpu_init.c +++ b/cpu/ppc4xx/cpu_init.c @@ -138,8 +138,8 @@ void reconfigure_pll(u32 new_cpu_freq) void cpu_init_f (void) { -#if defined(CONFIG_WATCHDOG) - unsigned long val; +#if defined(CONFIG_WATCHDOG) || defined(CONFIG_460EX) + u32 val; #endif reconfigure_pll(CFG_PLL_RECONFIG); @@ -272,6 +272,22 @@ cpu_init_f (void) reset_4xx_watchdog(); #endif /* CONFIG_WATCHDOG */ + +#if defined(CONFIG_460EX) + /* + * Set SDR0_AHB_CFG[A2P_INCR4] (bit 24) and + * clear SDR0_AHB_CFG[A2P_PROT2] (bit 25) for a new 460EX errata + * regarding concurrent use of AHB USB OTG, USB 2.0 host and SATA + */ + mfsdr(SDR0_AHB_CFG, val); + val |= 0x80; + val &= ~0x40; + mtsdr(SDR0_AHB_CFG, val); + mfsdr(SDR0_USB2HOST_CFG, val); + val &= ~0xf00; + val |= 0x400; + mtsdr(SDR0_USB2HOST_CFG, val); +#endif /* CONFIG_460EX */ } /* -- cgit v1.1 From dd1c5523d6f44e842e69f2fcb50788c6060eab86 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Tue, 1 Jul 2008 17:03:19 +0200 Subject: ppc4xx: Fix 460EX/GT PCIe port initialization This patch fixes a bug where the 460EX/GT PCIe UTLSET1 register was configured incorrectly. Thanks to Olga Buchonina from AMCC for pointing this out. Signed-off-by: Stefan Roese --- cpu/ppc4xx/4xx_pcie.c | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) (limited to 'cpu') diff --git a/cpu/ppc4xx/4xx_pcie.c b/cpu/ppc4xx/4xx_pcie.c index 503facc..d50a538 100644 --- a/cpu/ppc4xx/4xx_pcie.c +++ b/cpu/ppc4xx/4xx_pcie.c @@ -615,22 +615,20 @@ int __ppc4xx_init_pcie_port_hw(int port, int rootport) #if defined(CONFIG_460EX) || defined(CONFIG_460GT) int __ppc4xx_init_pcie_port_hw(int port, int rootport) { - u32 val = 1 << 24; + u32 val; u32 utlset1; - if (rootport) { + if (rootport) val = PTYPE_ROOT_PORT << 20; - utlset1 = 0x21222222; - } else { + else val = PTYPE_LEGACY_ENDPOINT << 20; - utlset1 = 0x20222222; - } if (port == 0) { val |= LNKW_X1 << 12; + utlset1 = 0x20000000; } else { val |= LNKW_X4 << 12; - utlset1 |= 0x00101101; + utlset1 = 0x20101101; } SDR_WRITE(SDRN_PESDR_DLPSET(port), val); -- cgit v1.1 From d92ea21bafb674ee2bf27447970b047845e7b0a2 Mon Sep 17 00:00:00 2001 From: Juergen Kilb Date: Sun, 8 Jun 2008 17:59:53 +0200 Subject: i.MX31: fixed CTRL-C detection The Register URXD contains status information in bits [15..8]. With status bit 15 set, CTRL-C was reported as 0x8003 instead of 0x03. Therefore CTRL-C was not detected. To solve this, bits [15..8] were masked out now. Signed-off-by: Juergen Kilb Acked-by: Felix Radensky --- cpu/arm1136/mx31/serial.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'cpu') diff --git a/cpu/arm1136/mx31/serial.c b/cpu/arm1136/mx31/serial.c index 1cad8f9..f498599 100644 --- a/cpu/arm1136/mx31/serial.c +++ b/cpu/arm1136/mx31/serial.c @@ -63,6 +63,7 @@ #define URXD_FRMERR (1<<12) #define URXD_BRK (1<<11) #define URXD_PRERR (1<<10) +#define URXD_RX_DATA (0xFF) #define UCR1_ADEN (1<<15) /* Auto dectect interrupt */ #define UCR1_ADBR (1<<14) /* Auto detect baud rate */ #define UCR1_TRDYEN (1<<13) /* Transmitter ready interrupt enable */ @@ -165,7 +166,7 @@ void serial_setbrg (void) int serial_getc (void) { while (__REG(UART_PHYS + UTS) & UTS_RXEMPTY); - return __REG(UART_PHYS + URXD); + return (__REG(UART_PHYS + URXD) & URXD_RX_DATA); /* mask out status from upper word */ } void serial_putc (const char c) -- cgit v1.1 From ee4ae38342142237ca85913f88ee570c1eb5ca7c Mon Sep 17 00:00:00 2001 From: Esben Haabendal Date: Wed, 18 Jun 2008 11:03:57 +0200 Subject: mpc8260: add fdt_fixup_ethernet support Add support for updating mac-address and local-mac-address in fdt for all MPC8260 targets. Signed-off-by: Esben Haabendal --- cpu/mpc8260/cpu.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'cpu') diff --git a/cpu/mpc8260/cpu.c b/cpu/mpc8260/cpu.c index 414759e..4d5d141 100644 --- a/cpu/mpc8260/cpu.c +++ b/cpu/mpc8260/cpu.c @@ -305,6 +305,11 @@ void ft_cpu_setup (void *blob, bd_t *bd) { char * cpu_path = "/cpus/" OF_CPU; +#if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) ||\ + defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3) + fdt_fixup_ethernet(blob, bd); +#endif + do_fixup_by_path_u32(blob, cpu_path, "bus-frequency", bd->bi_busfreq, 1); do_fixup_by_path_u32(blob, cpu_path, "timebase-frequency", OF_TBCLK, 1); do_fixup_by_path_u32(blob, cpu_path, "clock-frequency", bd->bi_intfreq, 1); -- cgit v1.1 From 461fa68d20861811487944d22291db5a13410e20 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Wed, 2 Jul 2008 23:00:14 +0200 Subject: Cleanup: replace hard-wired $(AR) 'crv' settings by $(ARFLAGS) Signed-off-by: Wolfgang Denk --- cpu/sh3/Makefile | 2 +- cpu/sh4/Makefile | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'cpu') diff --git a/cpu/sh3/Makefile b/cpu/sh3/Makefile index 7679248..1fdeb3c 100644 --- a/cpu/sh3/Makefile +++ b/cpu/sh3/Makefile @@ -37,7 +37,7 @@ OBJS = cpu.o interrupts.o watchdog.o time.o cache.o all: .depend $(START) $(LIB) $(LIB): $(OBJS) - $(AR) crv $@ $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) ######################################################################### diff --git a/cpu/sh4/Makefile b/cpu/sh4/Makefile index 1bb8bd7..aaaaf1f 100644 --- a/cpu/sh4/Makefile +++ b/cpu/sh4/Makefile @@ -34,7 +34,7 @@ OBJS = cpu.o interrupts.o watchdog.o time.o cache.o all: .depend $(START) $(LIB) $(LIB): $(OBJS) - $(AR) crv $@ $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) ######################################################################### -- cgit v1.1 From a30cc5a340e7f8f5f85a0e08e7f6c4106ce117c4 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Wed, 2 Jul 2008 23:38:50 +0200 Subject: Cleanup: fix out-of-tree building for some boards Signed-off-by: Wolfgang Denk --- cpu/sh3/Makefile | 22 +++++++++++++++------- cpu/sh4/Makefile | 22 +++++++++++++++------- 2 files changed, 30 insertions(+), 14 deletions(-) (limited to 'cpu') diff --git a/cpu/sh3/Makefile b/cpu/sh3/Makefile index 1fdeb3c..441c765 100644 --- a/cpu/sh3/Makefile +++ b/cpu/sh3/Makefile @@ -31,19 +31,27 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(CPU).a -START = start.o +SOBJS = start.o OBJS = cpu.o interrupts.o watchdog.o time.o cache.o -all: .depend $(START) $(LIB) +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) -$(LIB): $(OBJS) - $(AR) $(ARFLAGS) $@ $(OBJS) +$(LIB): $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend ######################################################################### -.depend: Makefile $(START:.o=.S) $(OBJS:.o=.c) - $(CC) -M $(CFLAGS) $(START:.o=.S) $(OBJS:.o=.c) > $@ +# defines $(obj).depend target +include $(SRCTREE)/rules.mk -sinclude .depend +sinclude $(obj).depend ######################################################################### diff --git a/cpu/sh4/Makefile b/cpu/sh4/Makefile index aaaaf1f..6192913 100644 --- a/cpu/sh4/Makefile +++ b/cpu/sh4/Makefile @@ -28,19 +28,27 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(CPU).a -START = start.o +SOBJS = start.o OBJS = cpu.o interrupts.o watchdog.o time.o cache.o -all: .depend $(START) $(LIB) +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) -$(LIB): $(OBJS) - $(AR) $(ARFLAGS) $@ $(OBJS) +$(LIB): $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend ######################################################################### -.depend: Makefile $(START:.o=.S) $(OBJS:.o=.c) - $(CC) -M $(CFLAGS) $(START:.o=.S) $(OBJS:.o=.c) > $@ +# defines $(obj).depend target +include $(SRCTREE)/rules.mk -sinclude .depend +sinclude $(obj).depend ######################################################################### -- cgit v1.1 From c8a3b109f07f02342d097b30908965f7261d9f15 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Wed, 2 Jul 2008 23:49:18 +0200 Subject: Cleanup out-or-tree building for some boards (.depend) Signed-off-by: Wolfgang Denk --- cpu/sh3/Makefile | 2 +- cpu/sh4/Makefile | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'cpu') diff --git a/cpu/sh3/Makefile b/cpu/sh3/Makefile index 441c765..a7eb1e2 100644 --- a/cpu/sh3/Makefile +++ b/cpu/sh3/Makefile @@ -45,7 +45,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/cpu/sh4/Makefile b/cpu/sh4/Makefile index 6192913..e38e04f 100644 --- a/cpu/sh4/Makefile +++ b/cpu/sh4/Makefile @@ -42,7 +42,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### -- cgit v1.1 From dd35479a50f6c7c31ea491c07c5200c6dfd06a24 Mon Sep 17 00:00:00 2001 From: Ben Warren Date: Mon, 23 Jun 2008 22:57:27 -0700 Subject: Add mechanisms for CPU and board-specific Ethernet initialization This patch is the first step in cleaning up net/eth.c, by moving Ethernet initialization to CPU or board-specific code. Initial implementation is only on the Freescale TSEC controller, but others will be added soon. Signed-off-by: Ben Warren --- cpu/mpc83xx/cpu.c | 20 ++++++++++++++++++++ cpu/mpc85xx/cpu.c | 30 ++++++++++++++++++++++++++++++ cpu/mpc86xx/cpu.c | 27 +++++++++++++++++++++++++++ 3 files changed, 77 insertions(+) (limited to 'cpu') diff --git a/cpu/mpc83xx/cpu.c b/cpu/mpc83xx/cpu.c index 36de78d..94d1a13 100644 --- a/cpu/mpc83xx/cpu.c +++ b/cpu/mpc83xx/cpu.c @@ -358,3 +358,23 @@ int dma_xfer(void *dest, u32 count, void *src) return ((int)dma_check()); } #endif /*CONFIG_DDR_ECC*/ + +#ifdef CONFIG_TSEC_ENET +/* Default initializations for TSEC controllers. To override, + * create a board-specific function called: + * int board_eth_init(bd_t *bis) + */ + +extern int tsec_initialize(bd_t * bis, int index, char *devname); + +int cpu_eth_init(bd_t *bis) +{ +#if defined(CONFIG_TSEC1) + tsec_initialize(bis, 0, CONFIG_TSEC1_NAME); +#endif +#if defined(CONFIG_TSEC2) + tsec_initialize(bis, 1, CONFIG_TSEC2_NAME); +#endif + return 0; +} +#endif diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c index baf8b81..fcdb587 100644 --- a/cpu/mpc85xx/cpu.c +++ b/cpu/mpc85xx/cpu.c @@ -353,3 +353,33 @@ void upmconfig (uint upm, uint * table, uint size) } out_be32(mxmr, loopval); /* OP_NORMAL */ } + +#if defined(CONFIG_TSEC_ENET) || defined(CONFIGMPC85XX_FEC) +/* Default initializations for TSEC controllers. To override, + * create a board-specific function called: + * int board_eth_init(bd_t *bis) + */ + +extern int tsec_initialize(bd_t * bis, int index, char *devname); + +int cpu_eth_init(bd_t *bis) +{ +#if defined(CONFIG_TSEC1) + tsec_initialize(bis, 0, CONFIG_TSEC1_NAME); +#endif +#if defined(CONFIG_TSEC2) + tsec_initialize(bis, 1, CONFIG_TSEC2_NAME); +#endif +#if defined(CONFIG_MPC85XX_FEC) + tsec_initialize(bis, 2, CONFIG_MPC85XX_FEC_NAME); +#else +#if defined(CONFIG_TSEC3) + tsec_initialize(bis, 2, CONFIG_TSEC3_NAME); +#endif +#if defined(CONFIG_TSEC4) + tsec_initialize(bis, 3, CONFIG_TSEC4_NAME); +#endif +#endif + return 0; +} +#endif diff --git a/cpu/mpc86xx/cpu.c b/cpu/mpc86xx/cpu.c index e26bf36..4eaed05 100644 --- a/cpu/mpc86xx/cpu.c +++ b/cpu/mpc86xx/cpu.c @@ -290,3 +290,30 @@ void mpc86xx_reginfo(void) printf("\tBR7\t0x%08X\tOR7\t0x%08X \n", in_be32(&lbc->br7), in_be32(&lbc->or7)); } + +#ifdef CONFIG_TSEC_ENET +/* Default initializations for TSEC controllers. To override, + * create a board-specific function called: + * int board_eth_init(bd_t *bis) + */ + +extern int tsec_initialize(bd_t * bis, int index, char *devname); + +int cpu_eth_init(bd_t *bis) +{ +#if defined(CONFIG_TSEC1) + tsec_initialize(bis, 0, CONFIG_TSEC1_NAME); +#endif +#if defined(CONFIG_TSEC2) + tsec_initialize(bis, 1, CONFIG_TSEC2_NAME); +#endif +#if defined(CONFIG_TSEC3) + tsec_initialize(bis, 2, CONFIG_TSEC3_NAME); +#endif +#if defined(CONFIG_TSEC4) + tsec_initialize(bis, 3, CONFIG_TSEC4_NAME); +#endif + return 0; +} +#endif + -- cgit v1.1 From 9fea65a6c469b1b474b27446feb58738baba2d31 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Tue, 24 Jun 2008 09:54:09 +0200 Subject: ppc4xx: Rename CONFIG_XILINX_ML300 to CONFIG_XILINX_405 This change helps with better handling with others Xilinx based platform. Signed-off-by: Michal Simek Acked-by: Stefan Roese --- cpu/ppc4xx/speed.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'cpu') diff --git a/cpu/ppc4xx/speed.c b/cpu/ppc4xx/speed.c index ef47ffc..34bd721 100644 --- a/cpu/ppc4xx/speed.c +++ b/cpu/ppc4xx/speed.c @@ -754,7 +754,7 @@ ulong get_OPB_freq (void) return sys_info.freqOPB; } -#elif defined(CONFIG_XILINX_ML300) +#elif defined(CONFIG_XILINX_405) extern void get_sys_info (sys_info_t * sysInfo); extern ulong get_PCI_freq (void); -- cgit v1.1 From fec61431a003f5778bafa2624073a571af8bec9f Mon Sep 17 00:00:00 2001 From: Hugo Villeneuve Date: Wed, 18 Jun 2008 12:10:31 -0400 Subject: Remove duplicate definitions in include/lxt971a.h. Remove duplicate definitions in include/lxt971a.h. Remove duplicate registers and bits definitions in include/lxt971a.h for standard MII registers, and use values in include/miiphy.h instead. Signed-off-by: Hugo Villeneuve Signed-off-by: Ben Warren --- cpu/arm920t/at91rm9200/lxt972.c | 15 ++++++++------- cpu/arm926ejs/davinci/lxt972.c | 15 ++++++++------- 2 files changed, 16 insertions(+), 14 deletions(-) (limited to 'cpu') diff --git a/cpu/arm920t/at91rm9200/lxt972.c b/cpu/arm920t/at91rm9200/lxt972.c index 4edcc9a..260d393 100644 --- a/cpu/arm920t/at91rm9200/lxt972.c +++ b/cpu/arm920t/at91rm9200/lxt972.c @@ -29,6 +29,7 @@ #include #include #include +#include #include #ifdef CONFIG_DRIVER_ETHER @@ -51,8 +52,8 @@ unsigned int lxt972_IsPhyConnected (AT91PS_EMAC p_mac) unsigned short Id1, Id2; at91rm9200_EmacEnableMDIO (p_mac); - at91rm9200_EmacReadPhy (p_mac, PHY_COMMON_ID1, &Id1); - at91rm9200_EmacReadPhy (p_mac, PHY_COMMON_ID2, &Id2); + at91rm9200_EmacReadPhy(p_mac, PHY_PHYIDR1, &Id1); + at91rm9200_EmacReadPhy(p_mac, PHY_PHYIDR2, &Id2); at91rm9200_EmacDisableMDIO (p_mac); if ((Id1 == (0x0013)) && ((Id2 & 0xFFF0) == 0x78E0)) @@ -169,18 +170,18 @@ UCHAR lxt972_AutoNegotiate (AT91PS_EMAC p_mac, int *status) unsigned short value; /* Set lxt972 control register */ - if (!at91rm9200_EmacReadPhy (p_mac, PHY_COMMON_CTRL, &value)) + if (!at91rm9200_EmacReadPhy (p_mac, PHY_BMCR, &value)) return FALSE; /* Restart Auto_negotiation */ - value |= PHY_COMMON_CTRL_RES_AUTO; - if (!at91rm9200_EmacWritePhy (p_mac, PHY_COMMON_CTRL, &value)) + value |= PHY_BMCR_RST_NEG; + if (!at91rm9200_EmacWritePhy (p_mac, PHY_BMCR, &value)) return FALSE; /*check AutoNegotiate complete */ udelay (10000); - at91rm9200_EmacReadPhy (p_mac, PHY_COMMON_STAT, &value); - if (!(value & PHY_COMMON_STAT_AN_COMP)) + at91rm9200_EmacReadPhy(p_mac, PHY_BMSR, &value); + if (!(value & PHY_BMSR_AUTN_COMP)) return FALSE; return (lxt972_GetLinkSpeed (p_mac)); diff --git a/cpu/arm926ejs/davinci/lxt972.c b/cpu/arm926ejs/davinci/lxt972.c index 6eeb6e5..620e7bb 100644 --- a/cpu/arm926ejs/davinci/lxt972.c +++ b/cpu/arm926ejs/davinci/lxt972.c @@ -27,6 +27,7 @@ #include #include +#include #include #include @@ -38,9 +39,9 @@ int lxt972_is_phy_connected(int phy_addr) { u_int16_t id1, id2; - if (!dm644x_eth_phy_read(phy_addr, PHY_COMMON_ID1, &id1)) + if (!dm644x_eth_phy_read(phy_addr, PHY_PHYIDR1, &id1)) return(0); - if (!dm644x_eth_phy_read(phy_addr, PHY_COMMON_ID2, &id2)) + if (!dm644x_eth_phy_read(phy_addr, PHY_PHYIDR2, &id2)) return(0); if ((id1 == (0x0013)) && ((id2 & 0xfff0) == 0x78e0)) @@ -119,19 +120,19 @@ int lxt972_auto_negotiate(int phy_addr) u_int16_t tmp; - if (!dm644x_eth_phy_read(phy_addr, PHY_COMMON_CTRL, &tmp)) + if (!dm644x_eth_phy_read(phy_addr, PHY_BMCR, &tmp)) return(0); /* Restart Auto_negotiation */ - tmp |= PHY_COMMON_CTRL_RES_AUTO; - dm644x_eth_phy_write(phy_addr, PHY_COMMON_CTRL, tmp); + tmp |= PHY_BMCR_RST_NEG; + dm644x_eth_phy_write(phy_addr, PHY_BMCR, tmp); /*check AutoNegotiate complete */ udelay (10000); - if (!dm644x_eth_phy_read(phy_addr, PHY_COMMON_STAT, &tmp)) + if (!dm644x_eth_phy_read(phy_addr, PHY_BMSR, &tmp)) return(0); - if (!(tmp & PHY_COMMON_STAT_AN_COMP)) + if (!(tmp & PHY_BMSR_AUTN_COMP)) return(0); return (lxt972_get_link_speed(phy_addr)); -- cgit v1.1 From 63676841ca2d603b13765f3f7b72ff1a61c23f90 Mon Sep 17 00:00:00 2001 From: Hugo Villeneuve Date: Wed, 18 Jun 2008 12:10:33 -0400 Subject: Remove duplicate code in cpu/arm926ejs/davinci/lxt972.c. Remove duplicate code in cpu/arm926ejs/davinci/lxt972.c. Remove duplicate code in a if/else block in cpu/arm926ejs/davinci/lxt972.c. Fixed style issues. Signed-off-by: Hugo Villeneuve Signed-off-by: Ben Warren --- cpu/arm926ejs/davinci/lxt972.c | 39 ++++++++++++--------------------------- 1 file changed, 12 insertions(+), 27 deletions(-) (limited to 'cpu') diff --git a/cpu/arm926ejs/davinci/lxt972.c b/cpu/arm926ejs/davinci/lxt972.c index 620e7bb..8130b48 100644 --- a/cpu/arm926ejs/davinci/lxt972.c +++ b/cpu/arm926ejs/davinci/lxt972.c @@ -37,7 +37,7 @@ int lxt972_is_phy_connected(int phy_addr) { - u_int16_t id1, id2; + u_int16_t id1, id2; if (!dm644x_eth_phy_read(phy_addr, PHY_PHYIDR1, &id1)) return(0); @@ -52,8 +52,8 @@ int lxt972_is_phy_connected(int phy_addr) int lxt972_get_link_speed(int phy_addr) { - u_int16_t stat1, tmp; - volatile emac_regs* emac = (emac_regs *)EMAC_BASE_ADDR; + u_int16_t stat1, tmp; + volatile emac_regs *emac = (emac_regs *)EMAC_BASE_ADDR; if (!dm644x_eth_phy_read(phy_addr, PHY_LXT971_STAT2, &stat1)) return(0); @@ -71,37 +71,23 @@ int lxt972_get_link_speed(int phy_addr) if (!dm644x_eth_phy_read(phy_addr, PHY_LXT971_DIG_CFG, &tmp)) return(0); - /* Speed doesn't matter, there is no setting for it in EMAC... */ - if (stat1 & PHY_LXT971_STAT2_100BTX) { - if (stat1 & PHY_LXT971_STAT2_DUPLEX_MODE) { - /* set DM644x EMAC for Full Duplex */ - emac->MACCONTROL = EMAC_MACCONTROL_MIIEN_ENABLE | EMAC_MACCONTROL_FULLDUPLEX_ENABLE; - } else { - /*set DM644x EMAC for Half Duplex */ - emac->MACCONTROL = EMAC_MACCONTROL_MIIEN_ENABLE; - } - - return(1); + if (stat1 & PHY_LXT971_STAT2_DUPLEX_MODE) { + /* set DM644x EMAC for Full Duplex */ + emac->MACCONTROL = EMAC_MACCONTROL_MIIEN_ENABLE | + EMAC_MACCONTROL_FULLDUPLEX_ENABLE; } else { - if (stat1 & PHY_LXT971_STAT2_DUPLEX_MODE) { - /* set DM644x EMAC for Full Duplex */ - emac->MACCONTROL = EMAC_MACCONTROL_MIIEN_ENABLE | EMAC_MACCONTROL_FULLDUPLEX_ENABLE; - } else { - /*set DM644x EMAC for Half Duplex */ - emac->MACCONTROL = EMAC_MACCONTROL_MIIEN_ENABLE; - } - - return(1); + /*set DM644x EMAC for Half Duplex */ + emac->MACCONTROL = EMAC_MACCONTROL_MIIEN_ENABLE; } - return(0); + return(1); } int lxt972_init_phy(int phy_addr) { - int ret = 1; + int ret = 1; if (!lxt972_get_link_speed(phy_addr)) { /* Try another time */ @@ -117,8 +103,7 @@ int lxt972_init_phy(int phy_addr) int lxt972_auto_negotiate(int phy_addr) { - u_int16_t tmp; - + u_int16_t tmp; if (!dm644x_eth_phy_read(phy_addr, PHY_BMCR, &tmp)) return(0); -- cgit v1.1 From 9e23fe0560b84e324dc5f0ff8813dab2aa34f074 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Tue, 8 Jul 2008 12:03:24 +0900 Subject: sh: Fix SH-boards compile error By Cleanup out-or-tree building for some boards (.depend) (commit:c8a3b109f07f02342d097b30908965f7261d9f15) because filse ware changed, some SH-boards have compile error. I revised this problem. Signed-off-by: Nobuhiro Iwamatsu --- cpu/sh3/Makefile | 2 +- cpu/sh4/Makefile | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'cpu') diff --git a/cpu/sh3/Makefile b/cpu/sh3/Makefile index a7eb1e2..587413d 100644 --- a/cpu/sh3/Makefile +++ b/cpu/sh3/Makefile @@ -32,7 +32,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(CPU).a SOBJS = start.o -OBJS = cpu.o interrupts.o watchdog.o time.o cache.o +COBJS = cpu.o interrupts.o watchdog.o time.o cache.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) diff --git a/cpu/sh4/Makefile b/cpu/sh4/Makefile index e38e04f..d3c5eef 100644 --- a/cpu/sh4/Makefile +++ b/cpu/sh4/Makefile @@ -29,7 +29,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(CPU).a SOBJS = start.o -OBJS = cpu.o interrupts.o watchdog.o time.o cache.o +COBJS = cpu.o interrupts.o watchdog.o time.o cache.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) -- cgit v1.1 From dc4b0b38d4aadf08826f6c31270f1eecd27964fd Mon Sep 17 00:00:00 2001 From: Andrew Klossner Date: Mon, 7 Jul 2008 06:41:14 -0700 Subject: Fix printf errors. The compiler will help find mismatches between printf formats and arguments if you let it. This patch adds the necessary attributes to declarations in include/common.h, then begins to correct the resulting compiler warnings. Some of these were bugs, e.g., "$d" instead of "%d" and incorrect arguments. Others were just annoying, like int-long mismatches on a system where both are 32 bits. It's worth fixing the annoying errors to catch the real ones. Signed-off-by: Andrew Klossner --- cpu/mpc85xx/traps.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'cpu') diff --git a/cpu/mpc85xx/traps.c b/cpu/mpc85xx/traps.c index fd36658..0eab694 100644 --- a/cpu/mpc85xx/traps.c +++ b/cpu/mpc85xx/traps.c @@ -216,10 +216,10 @@ MachineCheckException(struct pt_regs *regs) if (machinecheck_count > 1) { regs->nip += 4; /* skip offending instruction */ - printf("Skipping current instr, Returning to 0x%08x\n", + printf("Skipping current instr, Returning to 0x%08lx\n", regs->nip); } else { - printf("Returning back to 0x%08x\n",regs->nip); + printf("Returning back to 0x%08lx\n",regs->nip); } } @@ -302,7 +302,7 @@ ExtIntException(struct pt_regs *regs) printf("External Interrupt Exception at PC: %lx, SR: %lx, vector=%lx", regs->nip, regs->msr, regs->trap); vect = pic->iack0; - printf(" irq IACK0@%05x=%d\n",&pic->iack0,vect); + printf(" irq IACK0@%05x=%d\n",(int)&pic->iack0,vect); show_regs(regs); print_backtrace((unsigned long *)regs->gpr[1]); machinecheck_count++; @@ -310,7 +310,7 @@ ExtIntException(struct pt_regs *regs) printf("Returning back to 0x%08x\n",regs->nip); #else regs->nip += 4; /* skip offending instruction */ - printf("Skipping current instr, Returning to 0x%08x\n",regs->nip); + printf("Skipping current instr, Returning to 0x%08lx\n",regs->nip); #endif } -- cgit v1.1 From 0e6989b9faf1588e8723535539e88a0df3c71356 Mon Sep 17 00:00:00 2001 From: Matvejchikov Ilya Date: Sun, 6 Jul 2008 13:57:00 +0400 Subject: FDT memory and pci node fixes for MPC8260ADS Signed-off-by: Matvejchikov Ilya --- cpu/mpc8260/pci.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'cpu') diff --git a/cpu/mpc8260/pci.c b/cpu/mpc8260/pci.c index 75c6ab2..940f5c0 100644 --- a/cpu/mpc8260/pci.c +++ b/cpu/mpc8260/pci.c @@ -33,6 +33,10 @@ #include #include #include +#ifdef CONFIG_OF_LIBFDT +#include +#include +#endif #if defined CONFIG_MPC8266ADS || defined CONFIG_MPC8272 || defined CONFIG_PM826 DECLARE_GLOBAL_DATA_PTR; @@ -449,4 +453,12 @@ void pci_mpc8250_init (struct pci_controller *hose) immap->im_pci.pci_emr |= cpu_to_le32 (PCI_ERROR_PCI_NO_RSP); } +#if defined(CONFIG_OF_LIBFDT) +void ft_pci_setup(void *blob, bd_t *bd) +{ + do_fixup_by_prop_u32(blob, "device_type", "pci", 4, + "clock-frequency", bd->pci_clk, 1); +} +#endif + #endif /* CONFIG_PCI */ -- cgit v1.1 From d2d54ea449639f3d1a6007e333ab9fcc609a18f0 Mon Sep 17 00:00:00 2001 From: Haavard Skinnemoen Date: Thu, 12 Jun 2008 19:27:57 +0200 Subject: avr32: Use CONFIG_ATMEL_MCI to select the atmel_mci driver After we move the atmel_mci driver into drivers/mmc, we can't select it with CONFIG_MMC anymore. Introduce a new symbol specifically for this driver so that there's no ambiguity. Signed-off-by: Haavard Skinnemoen Acked-by: Jean-Chritophe PLAGNIOL-VILLARD --- cpu/at32ap/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'cpu') diff --git a/cpu/at32ap/Makefile b/cpu/at32ap/Makefile index d16c58b..f182330 100644 --- a/cpu/at32ap/Makefile +++ b/cpu/at32ap/Makefile @@ -35,7 +35,7 @@ COBJS-y += exception.o COBJS-y += cache.o COBJS-y += interrupts.o COBJS-y += pio.o -COBJS-$(CONFIG_MMC) += atmel_mci.o +COBJS-$(CONFIG_ATMEL_MCI) += atmel_mci.o SRCS := $(START-y:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y)) -- cgit v1.1 From c3bf1ad7baa1b0dd989dedc260b7098b6089ae05 Mon Sep 17 00:00:00 2001 From: Haavard Skinnemoen Date: Thu, 12 Jun 2008 19:27:58 +0200 Subject: mmc: Move atmel_mci driver into drivers/mmc This makes it easier to use the driver on other platforms. Signed-off-by: Haavard Skinnemoen Acked-by: Jean-Chritophe PLAGNIOL-VILLARD --- cpu/at32ap/Makefile | 1 - cpu/at32ap/atmel_mci.c | 548 ------------------------------------------------- cpu/at32ap/atmel_mci.h | 201 ------------------ 3 files changed, 750 deletions(-) delete mode 100644 cpu/at32ap/atmel_mci.c delete mode 100644 cpu/at32ap/atmel_mci.h (limited to 'cpu') diff --git a/cpu/at32ap/Makefile b/cpu/at32ap/Makefile index f182330..33dc427 100644 --- a/cpu/at32ap/Makefile +++ b/cpu/at32ap/Makefile @@ -35,7 +35,6 @@ COBJS-y += exception.o COBJS-y += cache.o COBJS-y += interrupts.o COBJS-y += pio.o -COBJS-$(CONFIG_ATMEL_MCI) += atmel_mci.o SRCS := $(START-y:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y)) diff --git a/cpu/at32ap/atmel_mci.c b/cpu/at32ap/atmel_mci.c deleted file mode 100644 index 61aa184..0000000 --- a/cpu/at32ap/atmel_mci.c +++ /dev/null @@ -1,548 +0,0 @@ -/* - * Copyright (C) 2004-2006 Atmel Corporation - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#include - -#include -#include - -#include -#include -#include -#include -#include - -#include "atmel_mci.h" - -#ifdef DEBUG -#define pr_debug(fmt, args...) printf(fmt, ##args) -#else -#define pr_debug(...) do { } while(0) -#endif - -#ifndef CFG_MMC_CLK_OD -#define CFG_MMC_CLK_OD 150000 -#endif - -#ifndef CFG_MMC_CLK_PP -#define CFG_MMC_CLK_PP 5000000 -#endif - -#ifndef CFG_MMC_OP_COND -#define CFG_MMC_OP_COND 0x00100000 -#endif - -#define MMC_DEFAULT_BLKLEN 512 -#define MMC_DEFAULT_RCA 1 - -static unsigned int mmc_rca; -static int mmc_card_is_sd; -static block_dev_desc_t mmc_blkdev; - -block_dev_desc_t *mmc_get_dev(int dev) -{ - return &mmc_blkdev; -} - -static void mci_set_mode(unsigned long hz, unsigned long blklen) -{ - unsigned long bus_hz; - unsigned long clkdiv; - - bus_hz = get_mci_clk_rate(); - clkdiv = (bus_hz / hz) / 2 - 1; - - pr_debug("mmc: setting clock %lu Hz, block size %lu\n", - hz, blklen); - - if (clkdiv & ~255UL) { - clkdiv = 255; - printf("mmc: clock %lu too low; setting CLKDIV to 255\n", - hz); - } - - blklen &= 0xfffc; - mmci_writel(MR, (MMCI_BF(CLKDIV, clkdiv) - | MMCI_BF(BLKLEN, blklen) - | MMCI_BIT(RDPROOF) - | MMCI_BIT(WRPROOF))); -} - -#define RESP_NO_CRC 1 -#define R1 MMCI_BF(RSPTYP, 1) -#define R2 MMCI_BF(RSPTYP, 2) -#define R3 (R1 | RESP_NO_CRC) -#define R6 R1 -#define NID MMCI_BF(MAXLAT, 0) -#define NCR MMCI_BF(MAXLAT, 1) -#define TRCMD_START MMCI_BF(TRCMD, 1) -#define TRDIR_READ MMCI_BF(TRDIR, 1) -#define TRTYP_BLOCK MMCI_BF(TRTYP, 0) -#define INIT_CMD MMCI_BF(SPCMD, 1) -#define OPEN_DRAIN MMCI_BF(OPDCMD, 1) - -#define ERROR_FLAGS (MMCI_BIT(DTOE) \ - | MMCI_BIT(RDIRE) \ - | MMCI_BIT(RENDE) \ - | MMCI_BIT(RINDE) \ - | MMCI_BIT(RTOE)) - -static int -mmc_cmd(unsigned long cmd, unsigned long arg, - void *resp, unsigned long flags) -{ - unsigned long *response = resp; - int i, response_words = 0; - unsigned long error_flags; - u32 status; - - pr_debug("mmc: CMD%lu 0x%lx (flags 0x%lx)\n", - cmd, arg, flags); - - error_flags = ERROR_FLAGS; - if (!(flags & RESP_NO_CRC)) - error_flags |= MMCI_BIT(RCRCE); - - flags &= ~MMCI_BF(CMDNB, ~0UL); - - if (MMCI_BFEXT(RSPTYP, flags) == MMCI_RSPTYP_48_BIT_RESP) - response_words = 1; - else if (MMCI_BFEXT(RSPTYP, flags) == MMCI_RSPTYP_136_BIT_RESP) - response_words = 4; - - mmci_writel(ARGR, arg); - mmci_writel(CMDR, cmd | flags); - do { - udelay(40); - status = mmci_readl(SR); - } while (!(status & MMCI_BIT(CMDRDY))); - - pr_debug("mmc: status 0x%08lx\n", status); - - if (status & error_flags) { - printf("mmc: command %lu failed (status: 0x%08lx)\n", - cmd, status); - return -EIO; - } - - if (response_words) - pr_debug("mmc: response:"); - - for (i = 0; i < response_words; i++) { - response[i] = mmci_readl(RSPR); - pr_debug(" %08lx", response[i]); - } - pr_debug("\n"); - - return 0; -} - -static int mmc_acmd(unsigned long cmd, unsigned long arg, - void *resp, unsigned long flags) -{ - unsigned long aresp[4]; - int ret; - - /* - * Seems like the APP_CMD part of an ACMD has 64 cycles max - * latency even though the ACMD part doesn't. This isn't - * entirely clear in the SD Card spec, but some cards refuse - * to work if we attempt to use 5 cycles max latency here... - */ - ret = mmc_cmd(MMC_CMD_APP_CMD, 0, aresp, - R1 | NCR | (flags & OPEN_DRAIN)); - if (ret) - return ret; - if ((aresp[0] & (R1_ILLEGAL_COMMAND | R1_APP_CMD)) != R1_APP_CMD) - return -ENODEV; - - ret = mmc_cmd(cmd, arg, resp, flags); - return ret; -} - -static unsigned long -mmc_bread(int dev, unsigned long start, lbaint_t blkcnt, - void *buffer) -{ - int ret, i = 0; - unsigned long resp[4]; - unsigned long card_status, data; - unsigned long wordcount; - u32 *p = buffer; - u32 status; - - if (blkcnt == 0) - return 0; - - pr_debug("mmc_bread: dev %d, start %lx, blkcnt %lx\n", - dev, start, blkcnt); - - /* Put the device into Transfer state */ - ret = mmc_cmd(MMC_CMD_SELECT_CARD, mmc_rca << 16, resp, R1 | NCR); - if (ret) goto out; - - /* Set block length */ - ret = mmc_cmd(MMC_CMD_SET_BLOCKLEN, mmc_blkdev.blksz, resp, R1 | NCR); - if (ret) goto out; - - pr_debug("MCI_DTOR = %08lx\n", mmci_readl(DTOR)); - - for (i = 0; i < blkcnt; i++, start++) { - ret = mmc_cmd(MMC_CMD_READ_SINGLE_BLOCK, - start * mmc_blkdev.blksz, resp, - (R1 | NCR | TRCMD_START | TRDIR_READ - | TRTYP_BLOCK)); - if (ret) goto out; - - ret = -EIO; - wordcount = 0; - do { - do { - status = mmci_readl(SR); - if (status & (ERROR_FLAGS | MMCI_BIT(OVRE))) - goto read_error; - } while (!(status & MMCI_BIT(RXRDY))); - - if (status & MMCI_BIT(RXRDY)) { - data = mmci_readl(RDR); - /* pr_debug("%x\n", data); */ - *p++ = data; - wordcount++; - } - } while(wordcount < (mmc_blkdev.blksz / 4)); - - pr_debug("mmc: read %u words, waiting for BLKE\n", wordcount); - - do { - status = mmci_readl(SR); - } while (!(status & MMCI_BIT(BLKE))); - - putc('.'); - } - -out: - /* Put the device back into Standby state */ - mmc_cmd(MMC_CMD_SELECT_CARD, 0, resp, NCR); - return i; - -read_error: - mmc_cmd(MMC_CMD_SEND_STATUS, mmc_rca << 16, &card_status, R1 | NCR); - printf("mmc: bread failed, status = %08x, card status = %08x\n", - status, card_status); - goto out; -} - -static void mmc_parse_cid(struct mmc_cid *cid, unsigned long *resp) -{ - cid->mid = resp[0] >> 24; - cid->oid = (resp[0] >> 8) & 0xffff; - cid->pnm[0] = resp[0]; - cid->pnm[1] = resp[1] >> 24; - cid->pnm[2] = resp[1] >> 16; - cid->pnm[3] = resp[1] >> 8; - cid->pnm[4] = resp[1]; - cid->pnm[5] = resp[2] >> 24; - cid->pnm[6] = 0; - cid->prv = resp[2] >> 16; - cid->psn = (resp[2] << 16) | (resp[3] >> 16); - cid->mdt = resp[3] >> 8; -} - -static void sd_parse_cid(struct mmc_cid *cid, unsigned long *resp) -{ - cid->mid = resp[0] >> 24; - cid->oid = (resp[0] >> 8) & 0xffff; - cid->pnm[0] = resp[0]; - cid->pnm[1] = resp[1] >> 24; - cid->pnm[2] = resp[1] >> 16; - cid->pnm[3] = resp[1] >> 8; - cid->pnm[4] = resp[1]; - cid->pnm[5] = 0; - cid->pnm[6] = 0; - cid->prv = resp[2] >> 24; - cid->psn = (resp[2] << 8) | (resp[3] >> 24); - cid->mdt = (resp[3] >> 8) & 0x0fff; -} - -static void mmc_dump_cid(const struct mmc_cid *cid) -{ - printf("Manufacturer ID: %02lX\n", cid->mid); - printf("OEM/Application ID: %04lX\n", cid->oid); - printf("Product name: %s\n", cid->pnm); - printf("Product Revision: %lu.%lu\n", - cid->prv >> 4, cid->prv & 0x0f); - printf("Product Serial Number: %lu\n", cid->psn); - printf("Manufacturing Date: %02lu/%02lu\n", - cid->mdt >> 4, cid->mdt & 0x0f); -} - -static void mmc_dump_csd(const struct mmc_csd *csd) -{ - unsigned long *csd_raw = (unsigned long *)csd; - printf("CSD data: %08lx %08lx %08lx %08lx\n", - csd_raw[0], csd_raw[1], csd_raw[2], csd_raw[3]); - printf("CSD structure version: 1.%u\n", csd->csd_structure); - printf("MMC System Spec version: %u\n", csd->spec_vers); - printf("Card command classes: %03x\n", csd->ccc); - printf("Read block length: %u\n", 1 << csd->read_bl_len); - if (csd->read_bl_partial) - puts("Supports partial reads\n"); - else - puts("Does not support partial reads\n"); - printf("Write block length: %u\n", 1 << csd->write_bl_len); - if (csd->write_bl_partial) - puts("Supports partial writes\n"); - else - puts("Does not support partial writes\n"); - if (csd->wp_grp_enable) - printf("Supports group WP: %u\n", csd->wp_grp_size + 1); - else - puts("Does not support group WP\n"); - printf("Card capacity: %u bytes\n", - (csd->c_size + 1) * (1 << (csd->c_size_mult + 2)) * - (1 << csd->read_bl_len)); - printf("File format: %u/%u\n", - csd->file_format_grp, csd->file_format); - puts("Write protection: "); - if (csd->perm_write_protect) - puts(" permanent"); - if (csd->tmp_write_protect) - puts(" temporary"); - putc('\n'); -} - -static int mmc_idle_cards(void) -{ - int ret; - - /* Reset and initialize all cards */ - ret = mmc_cmd(MMC_CMD_GO_IDLE_STATE, 0, NULL, 0); - if (ret) - return ret; - - /* Keep the bus idle for 74 clock cycles */ - return mmc_cmd(0, 0, NULL, INIT_CMD); -} - -static int sd_init_card(struct mmc_cid *cid, int verbose) -{ - unsigned long resp[4]; - int i, ret = 0; - - mmc_idle_cards(); - for (i = 0; i < 1000; i++) { - ret = mmc_acmd(SD_CMD_APP_SEND_OP_COND, CFG_MMC_OP_COND, - resp, R3 | NID); - if (ret || (resp[0] & 0x80000000)) - break; - ret = -ETIMEDOUT; - } - - if (ret) - return ret; - - ret = mmc_cmd(MMC_CMD_ALL_SEND_CID, 0, resp, R2 | NID); - if (ret) - return ret; - sd_parse_cid(cid, resp); - if (verbose) - mmc_dump_cid(cid); - - /* Get RCA of the card that responded */ - ret = mmc_cmd(SD_CMD_SEND_RELATIVE_ADDR, 0, resp, R6 | NCR); - if (ret) - return ret; - - mmc_rca = resp[0] >> 16; - if (verbose) - printf("SD Card detected (RCA %u)\n", mmc_rca); - mmc_card_is_sd = 1; - return 0; -} - -static int mmc_init_card(struct mmc_cid *cid, int verbose) -{ - unsigned long resp[4]; - int i, ret = 0; - - mmc_idle_cards(); - for (i = 0; i < 1000; i++) { - ret = mmc_cmd(MMC_CMD_SEND_OP_COND, CFG_MMC_OP_COND, resp, - R3 | NID | OPEN_DRAIN); - if (ret || (resp[0] & 0x80000000)) - break; - ret = -ETIMEDOUT; - } - - if (ret) - return ret; - - /* Get CID of all cards. FIXME: Support more than one card */ - ret = mmc_cmd(MMC_CMD_ALL_SEND_CID, 0, resp, R2 | NID | OPEN_DRAIN); - if (ret) - return ret; - mmc_parse_cid(cid, resp); - if (verbose) - mmc_dump_cid(cid); - - /* Set Relative Address of the card that responded */ - ret = mmc_cmd(MMC_CMD_SET_RELATIVE_ADDR, mmc_rca << 16, resp, - R1 | NCR | OPEN_DRAIN); - return ret; -} - -static void mci_set_data_timeout(struct mmc_csd *csd) -{ - static const unsigned int dtomul_to_shift[] = { - 0, 4, 7, 8, 10, 12, 16, 20, - }; - static const unsigned int taac_exp[] = { - 1, 10, 100, 1000, 10000, 100000, 1000000, 10000000, - }; - static const unsigned int taac_mant[] = { - 0, 10, 12, 13, 15, 60, 25, 30, - 35, 40, 45, 50, 55, 60, 70, 80, - }; - unsigned int timeout_ns, timeout_clks; - unsigned int e, m; - unsigned int dtocyc, dtomul; - unsigned int shift; - u32 dtor; - - e = csd->taac & 0x07; - m = (csd->taac >> 3) & 0x0f; - - timeout_ns = (taac_exp[e] * taac_mant[m] + 9) / 10; - timeout_clks = csd->nsac * 100; - - timeout_clks += (((timeout_ns + 9) / 10) - * ((CFG_MMC_CLK_PP + 99999) / 100000) + 9999) / 10000; - if (!mmc_card_is_sd) - timeout_clks *= 10; - else - timeout_clks *= 100; - - dtocyc = timeout_clks; - dtomul = 0; - shift = 0; - while (dtocyc > 15 && dtomul < 8) { - dtomul++; - shift = dtomul_to_shift[dtomul]; - dtocyc = (timeout_clks + (1 << shift) - 1) >> shift; - } - - if (dtomul >= 8) { - dtomul = 7; - dtocyc = 15; - puts("Warning: Using maximum data timeout\n"); - } - - dtor = (MMCI_BF(DTOMUL, dtomul) - | MMCI_BF(DTOCYC, dtocyc)); - mmci_writel(DTOR, dtor); - - printf("mmc: Using %u cycles data timeout (DTOR=0x%x)\n", - dtocyc << shift, dtor); -} - -int mmc_init(int verbose) -{ - struct mmc_cid cid; - struct mmc_csd csd; - unsigned int max_blksz; - int ret; - - /* Initialize controller */ - mmci_writel(CR, MMCI_BIT(SWRST)); - mmci_writel(CR, MMCI_BIT(MCIEN)); - mmci_writel(DTOR, 0x5f); - mmci_writel(IDR, ~0UL); - mci_set_mode(CFG_MMC_CLK_OD, MMC_DEFAULT_BLKLEN); - - mmc_card_is_sd = 0; - - ret = sd_init_card(&cid, verbose); - if (ret) { - mmc_rca = MMC_DEFAULT_RCA; - ret = mmc_init_card(&cid, verbose); - } - if (ret) - return ret; - - /* Get CSD from the card */ - ret = mmc_cmd(MMC_CMD_SEND_CSD, mmc_rca << 16, &csd, R2 | NCR); - if (ret) - return ret; - if (verbose) - mmc_dump_csd(&csd); - - mci_set_data_timeout(&csd); - - /* Initialize the blockdev structure */ - mmc_blkdev.if_type = IF_TYPE_MMC; - mmc_blkdev.part_type = PART_TYPE_DOS; - mmc_blkdev.block_read = mmc_bread; - sprintf((char *)mmc_blkdev.vendor, - "Man %02x%04x Snr %08x", - cid.mid, cid.oid, cid.psn); - strncpy((char *)mmc_blkdev.product, cid.pnm, - sizeof(mmc_blkdev.product)); - sprintf((char *)mmc_blkdev.revision, "%x %x", - cid.prv >> 4, cid.prv & 0x0f); - - /* - * If we can't use 512 byte blocks, refuse to deal with the - * card. Tons of code elsewhere seems to depend on this. - */ - max_blksz = 1 << csd.read_bl_len; - if (max_blksz < 512 || (max_blksz > 512 && !csd.read_bl_partial)) { - printf("Card does not support 512 byte reads, aborting.\n"); - return -ENODEV; - } - mmc_blkdev.blksz = 512; - mmc_blkdev.lba = (csd.c_size + 1) * (1 << (csd.c_size_mult + 2)); - - mci_set_mode(CFG_MMC_CLK_PP, mmc_blkdev.blksz); - -#if 0 - if (fat_register_device(&mmc_blkdev, 1)) - printf("Could not register MMC fat device\n"); -#else - init_part(&mmc_blkdev); -#endif - - return 0; -} - -int mmc_read(ulong src, uchar *dst, int size) -{ - return -ENOSYS; -} - -int mmc_write(uchar *src, ulong dst, int size) -{ - return -ENOSYS; -} - -int mmc2info(ulong addr) -{ - return 0; -} diff --git a/cpu/at32ap/atmel_mci.h b/cpu/at32ap/atmel_mci.h deleted file mode 100644 index 5b4f5c9..0000000 --- a/cpu/at32ap/atmel_mci.h +++ /dev/null @@ -1,201 +0,0 @@ -/* - * Copyright (C) 2005-2006 Atmel Corporation - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#ifndef __CPU_AT32AP_ATMEL_MCI_H__ -#define __CPU_AT32AP_ATMEL_MCI_H__ - -/* Atmel MultiMedia Card Interface (MCI) registers */ -#define MMCI_CR 0x0000 -#define MMCI_MR 0x0004 -#define MMCI_DTOR 0x0008 -#define MMCI_SDCR 0x000c -#define MMCI_ARGR 0x0010 -#define MMCI_CMDR 0x0014 -#define MMCI_RSPR 0x0020 -#define MMCI_RSPR1 0x0024 -#define MMCI_RSPR2 0x0028 -#define MMCI_RSPR3 0x002c -#define MMCI_RDR 0x0030 -#define MMCI_TDR 0x0034 -#define MMCI_SR 0x0040 -#define MMCI_IER 0x0044 -#define MMCI_IDR 0x0048 -#define MMCI_IMR 0x004c - -/* Bitfields in CR */ -#define MMCI_MCIEN_OFFSET 0 -#define MMCI_MCIEN_SIZE 1 -#define MMCI_MCIDIS_OFFSET 1 -#define MMCI_MCIDIS_SIZE 1 -#define MMCI_PWSEN_OFFSET 2 -#define MMCI_PWSEN_SIZE 1 -#define MMCI_PWSDIS_OFFSET 3 -#define MMCI_PWSDIS_SIZE 1 -#define MMCI_SWRST_OFFSET 7 -#define MMCI_SWRST_SIZE 1 - -/* Bitfields in MR */ -#define MMCI_CLKDIV_OFFSET 0 -#define MMCI_CLKDIV_SIZE 8 -#define MMCI_PWSDIV_OFFSET 8 -#define MMCI_PWSDIV_SIZE 3 -#define MMCI_RDPROOF_OFFSET 11 -#define MMCI_RDPROOF_SIZE 1 -#define MMCI_WRPROOF_OFFSET 12 -#define MMCI_WRPROOF_SIZE 1 -#define MMCI_PDCPADV_OFFSET 14 -#define MMCI_PDCPADV_SIZE 1 -#define MMCI_PDCMODE_OFFSET 15 -#define MMCI_PDCMODE_SIZE 1 -#define MMCI_BLKLEN_OFFSET 16 -#define MMCI_BLKLEN_SIZE 16 - -/* Bitfields in DTOR */ -#define MMCI_DTOCYC_OFFSET 0 -#define MMCI_DTOCYC_SIZE 4 -#define MMCI_DTOMUL_OFFSET 4 -#define MMCI_DTOMUL_SIZE 3 - -/* Bitfields in SDCR */ -#define MMCI_SCDSEL_OFFSET 0 -#define MMCI_SCDSEL_SIZE 4 -#define MMCI_SCDBUS_OFFSET 7 -#define MMCI_SCDBUS_SIZE 1 - -/* Bitfields in ARGR */ -#define MMCI_ARG_OFFSET 0 -#define MMCI_ARG_SIZE 32 - -/* Bitfields in CMDR */ -#define MMCI_CMDNB_OFFSET 0 -#define MMCI_CMDNB_SIZE 6 -#define MMCI_RSPTYP_OFFSET 6 -#define MMCI_RSPTYP_SIZE 2 -#define MMCI_SPCMD_OFFSET 8 -#define MMCI_SPCMD_SIZE 3 -#define MMCI_OPDCMD_OFFSET 11 -#define MMCI_OPDCMD_SIZE 1 -#define MMCI_MAXLAT_OFFSET 12 -#define MMCI_MAXLAT_SIZE 1 -#define MMCI_TRCMD_OFFSET 16 -#define MMCI_TRCMD_SIZE 2 -#define MMCI_TRDIR_OFFSET 18 -#define MMCI_TRDIR_SIZE 1 -#define MMCI_TRTYP_OFFSET 19 -#define MMCI_TRTYP_SIZE 2 - -/* Bitfields in RSPRx */ -#define MMCI_RSP_OFFSET 0 -#define MMCI_RSP_SIZE 32 - -/* Bitfields in SR/IER/IDR/IMR */ -#define MMCI_CMDRDY_OFFSET 0 -#define MMCI_CMDRDY_SIZE 1 -#define MMCI_RXRDY_OFFSET 1 -#define MMCI_RXRDY_SIZE 1 -#define MMCI_TXRDY_OFFSET 2 -#define MMCI_TXRDY_SIZE 1 -#define MMCI_BLKE_OFFSET 3 -#define MMCI_BLKE_SIZE 1 -#define MMCI_DTIP_OFFSET 4 -#define MMCI_DTIP_SIZE 1 -#define MMCI_NOTBUSY_OFFSET 5 -#define MMCI_NOTBUSY_SIZE 1 -#define MMCI_ENDRX_OFFSET 6 -#define MMCI_ENDRX_SIZE 1 -#define MMCI_ENDTX_OFFSET 7 -#define MMCI_ENDTX_SIZE 1 -#define MMCI_RXBUFF_OFFSET 14 -#define MMCI_RXBUFF_SIZE 1 -#define MMCI_TXBUFE_OFFSET 15 -#define MMCI_TXBUFE_SIZE 1 -#define MMCI_RINDE_OFFSET 16 -#define MMCI_RINDE_SIZE 1 -#define MMCI_RDIRE_OFFSET 17 -#define MMCI_RDIRE_SIZE 1 -#define MMCI_RCRCE_OFFSET 18 -#define MMCI_RCRCE_SIZE 1 -#define MMCI_RENDE_OFFSET 19 -#define MMCI_RENDE_SIZE 1 -#define MMCI_RTOE_OFFSET 20 -#define MMCI_RTOE_SIZE 1 -#define MMCI_DCRCE_OFFSET 21 -#define MMCI_DCRCE_SIZE 1 -#define MMCI_DTOE_OFFSET 22 -#define MMCI_DTOE_SIZE 1 -#define MMCI_OVRE_OFFSET 30 -#define MMCI_OVRE_SIZE 1 -#define MMCI_UNRE_OFFSET 31 -#define MMCI_UNRE_SIZE 1 - -/* Constants for DTOMUL */ -#define MMCI_DTOMUL_1_CYCLE 0 -#define MMCI_DTOMUL_16_CYCLES 1 -#define MMCI_DTOMUL_128_CYCLES 2 -#define MMCI_DTOMUL_256_CYCLES 3 -#define MMCI_DTOMUL_1024_CYCLES 4 -#define MMCI_DTOMUL_4096_CYCLES 5 -#define MMCI_DTOMUL_65536_CYCLES 6 -#define MMCI_DTOMUL_1048576_CYCLES 7 - -/* Constants for RSPTYP */ -#define MMCI_RSPTYP_NO_RESP 0 -#define MMCI_RSPTYP_48_BIT_RESP 1 -#define MMCI_RSPTYP_136_BIT_RESP 2 - -/* Constants for SPCMD */ -#define MMCI_SPCMD_NO_SPEC_CMD 0 -#define MMCI_SPCMD_INIT_CMD 1 -#define MMCI_SPCMD_SYNC_CMD 2 -#define MMCI_SPCMD_INT_CMD 4 -#define MMCI_SPCMD_INT_RESP 5 - -/* Constants for TRCMD */ -#define MMCI_TRCMD_NO_TRANS 0 -#define MMCI_TRCMD_START_TRANS 1 -#define MMCI_TRCMD_STOP_TRANS 2 - -/* Constants for TRTYP */ -#define MMCI_TRTYP_BLOCK 0 -#define MMCI_TRTYP_MULTI_BLOCK 1 -#define MMCI_TRTYP_STREAM 2 - -/* Bit manipulation macros */ -#define MMCI_BIT(name) \ - (1 << MMCI_##name##_OFFSET) -#define MMCI_BF(name,value) \ - (((value) & ((1 << MMCI_##name##_SIZE) - 1)) \ - << MMCI_##name##_OFFSET) -#define MMCI_BFEXT(name,value) \ - (((value) >> MMCI_##name##_OFFSET)\ - & ((1 << MMCI_##name##_SIZE) - 1)) -#define MMCI_BFINS(name,value,old) \ - (((old) & ~(((1 << MMCI_##name##_SIZE) - 1) \ - << MMCI_##name##_OFFSET)) \ - | MMCI_BF(name,value)) - -/* Register access macros */ -#define mmci_readl(reg) \ - readl((void *)MMCI_BASE + MMCI_##reg) -#define mmci_writel(reg,value) \ - writel((value), (void *)MMCI_BASE + MMCI_##reg) - -#endif /* __CPU_AT32AP_ATMEL_MCI_H__ */ -- cgit v1.1 From 3167c5386ea1c98b638be5d8763ef6d5938ef1bd Mon Sep 17 00:00:00 2001 From: Scott Wood Date: Fri, 20 Jun 2008 12:38:57 -0500 Subject: NAND: Rename DEBUG to MTDDEBUG to avoid namespace pollution. This is particularly problematic now that non-NAND-specific code is including , and thus all debugging code is being compiled regardless of whether it was requested, as reported by Scott McNutt . Signed-off-by: Scott Wood --- cpu/arm926ejs/davinci/nand.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) (limited to 'cpu') diff --git a/cpu/arm926ejs/davinci/nand.c b/cpu/arm926ejs/davinci/nand.c index ffc770f..36468e6 100644 --- a/cpu/arm926ejs/davinci/nand.c +++ b/cpu/arm926ejs/davinci/nand.c @@ -240,7 +240,8 @@ static int nand_davinci_compare_ecc(u_int8_t *ecc_nand, u_int8_t *ecc_calc, u_in return 0; case 1: /* Uncorrectable error */ - DEBUG (MTD_DEBUG_LEVEL0, "ECC UNCORRECTED_ERROR 1\n"); + MTDDEBUG (MTD_DEBUG_LEVEL0, + "ECC UNCORRECTED_ERROR 1\n"); return(-1); case 12: /* Correctable error */ @@ -256,7 +257,9 @@ static int nand_davinci_compare_ecc(u_int8_t *ecc_nand, u_int8_t *ecc_calc, u_in find_bit = (ecc_bit[5] << 2) + (ecc_bit[3] << 1) + ecc_bit[1]; - DEBUG (MTD_DEBUG_LEVEL0, "Correcting single bit ECC error at offset: %d, bit: %d\n", find_byte, find_bit); + MTDDEBUG (MTD_DEBUG_LEVEL0, "Correcting single bit ECC " + "error at offset: %d, bit: %d\n", + find_byte, find_bit); page_data[find_byte] ^= (1 << find_bit); @@ -266,7 +269,8 @@ static int nand_davinci_compare_ecc(u_int8_t *ecc_nand, u_int8_t *ecc_calc, u_in if (ecc_calc[0] == 0 && ecc_calc[1] == 0 && ecc_calc[2] == 0) return(0); } - DEBUG (MTD_DEBUG_LEVEL0, "UNCORRECTED_ERROR default\n"); + MTDDEBUG (MTD_DEBUG_LEVEL0, + "UNCORRECTED_ERROR default\n"); return(-1); } } -- cgit v1.1 From dbab0691d2533560f7e91b92ae844046a9ad1df3 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Wed, 9 Jul 2008 08:17:06 +0200 Subject: Minor spelling fix in comment. Signed-off-by: Marcel Ziswiler --- cpu/pxa/start.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'cpu') diff --git a/cpu/pxa/start.S b/cpu/pxa/start.S index 1cdb709..23005e2 100644 --- a/cpu/pxa/start.S +++ b/cpu/pxa/start.S @@ -128,7 +128,7 @@ relocate: /* relocate U-Boot to RAM */ copy_loop: ldmia r0!, {r3-r10} /* copy from source address [r0] */ stmia r1!, {r3-r10} /* copy to target address [r1] */ - cmp r0, r2 /* until source end addreee [r2] */ + cmp r0, r2 /* until source end address [r2] */ ble copy_loop #endif /* !CONFIG_SKIP_RELOCATE_UBOOT */ -- cgit v1.1 From 4188f0491886b3b486164e819c0a83fdb97efd7d Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Thu, 10 Jul 2008 01:13:30 +0200 Subject: Minor coding style cleanup; update CHANGELOG Signed-off-by: Wolfgang Denk --- cpu/mpc86xx/cpu.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'cpu') diff --git a/cpu/mpc86xx/cpu.c b/cpu/mpc86xx/cpu.c index 4eaed05..7d2b591 100644 --- a/cpu/mpc86xx/cpu.c +++ b/cpu/mpc86xx/cpu.c @@ -315,5 +315,4 @@ int cpu_eth_init(bd_t *bis) #endif return 0; } -#endif - +#endif /* CONFIG_TSEC_ENET */ -- cgit v1.1 From 5d812b8b4ad9667c77a5bf92b4ba81699abc9fc3 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Wed, 9 Jul 2008 17:33:57 +0200 Subject: ppc4xx: Enable support for > 2GB SDRAM on AMCC Katmai Newer PPC's like 440SPe, 460EX/GT can be equipped with more than 2GB of SDRAM. To support such configurations, we "only" map the first 2GB via the TLB's. We need some free virtual address space for the remaining peripherals like, SoC devices, FLASH etc. Note that ECC is currently not supported on configurations with more than 2GB SDRAM. This is because we only map the first 2GB on such systems, and therefore the ECC parity byte of the remaining area can't be written. Signed-off-by: Stefan Roese --- cpu/ppc4xx/44x_spd_ddr2.c | 56 +++++++++++++++++++++++++++++++++++++---------- 1 file changed, 45 insertions(+), 11 deletions(-) (limited to 'cpu') diff --git a/cpu/ppc4xx/44x_spd_ddr2.c b/cpu/ppc4xx/44x_spd_ddr2.c index c28fc46..9a5340c 100644 --- a/cpu/ppc4xx/44x_spd_ddr2.c +++ b/cpu/ppc4xx/44x_spd_ddr2.c @@ -138,6 +138,20 @@ #endif /* + * Newer PPC's like 440SPe, 460EX/GT can be equipped with more than 2GB of SDRAM. + * To support such configurations, we "only" map the first 2GB via the TLB's. We + * need some free virtual address space for the remaining peripherals like, SoC + * devices, FLASH etc. + * + * Note that ECC is currently not supported on configurations with more than 2GB + * SDRAM. This is because we only map the first 2GB on such systems, and therefore + * the ECC parity byte of the remaining area can't be written. + */ +#ifndef CONFIG_MAX_MEM_MAPPED +#define CONFIG_MAX_MEM_MAPPED ((phys_size_t)2 << 30) +#endif + +/* * Board-specific Platform code can reimplement spd_ddr_init_hang () if needed */ void __spd_ddr_init_hang (void) @@ -181,7 +195,7 @@ typedef enum ddr_cas_id { /*-----------------------------------------------------------------------------+ * Prototypes *-----------------------------------------------------------------------------*/ -static unsigned long sdram_memsize(void); +static phys_size_t sdram_memsize(void); static void get_spd_info(unsigned long *dimm_populated, unsigned char *iic0_dimm_addr, unsigned long num_dimm_banks); @@ -306,9 +320,9 @@ static unsigned char spd_read(uchar chip, uint addr) /*-----------------------------------------------------------------------------+ * sdram_memsize *-----------------------------------------------------------------------------*/ -static unsigned long sdram_memsize(void) +static phys_size_t sdram_memsize(void) { - unsigned long mem_size; + phys_size_t mem_size; unsigned long mcopt2; unsigned long mcstat; unsigned long mb0cf; @@ -364,6 +378,8 @@ static unsigned long sdram_memsize(void) mem_size+=4096; break; default: + printf("WARNING: Unsupported bank size (SDSZ=0x%x)!\n" + , sdsz); mem_size=0; break; } @@ -371,8 +387,7 @@ static unsigned long sdram_memsize(void) } } - mem_size *= 1024 * 1024; - return(mem_size); + return mem_size << 20; } /*-----------------------------------------------------------------------------+ @@ -400,7 +415,7 @@ phys_size_t initdram(int board_type) unsigned long val; ddr_cas_id_t selected_cas = DDR_CAS_5; /* preset to silence compiler */ int write_recovery; - unsigned long dram_size = 0; + phys_size_t dram_size = 0; num_dimm_banks = sizeof(iic0_dimm_addr); @@ -558,6 +573,12 @@ phys_size_t initdram(int board_type) /* get installed memory size */ dram_size = sdram_memsize(); + /* + * Limit size to 2GB + */ + if (dram_size > CONFIG_MAX_MEM_MAPPED) + dram_size = CONFIG_MAX_MEM_MAPPED; + /* and program tlb entries for this size (dynamic) */ /* @@ -595,7 +616,7 @@ phys_size_t initdram(int board_type) */ set_mcsr(get_mcsr()); - return dram_size; + return sdram_memsize(); } static void get_spd_info(unsigned long *dimm_populated, @@ -2133,15 +2154,15 @@ static void program_memory_queue(unsigned long *dimm_populated, unsigned long num_dimm_banks) { unsigned long dimm_num; - unsigned long rank_base_addr; + phys_size_t rank_base_addr; unsigned long rank_reg; - unsigned long rank_size_bytes; + phys_size_t rank_size_bytes; unsigned long rank_size_id; unsigned long num_ranks; unsigned long baseadd_size; unsigned long i; unsigned long bank_0_populated = 0; - unsigned long total_size = 0; + phys_size_t total_size = 0; /*------------------------------------------------------------------ * Reset the rank_base_address. @@ -2289,6 +2310,11 @@ static void program_ecc(unsigned long *dimm_populated, if (ecc == 0) return; + if (sdram_memsize() > CONFIG_MAX_MEM_MAPPED) { + printf("\nWarning: Can't enable ECC on systems with more than 2GB of SDRAM!\n"); + return; + } + mfsdram(SDRAM_MCOPT1, mcopt1); mfsdram(SDRAM_MCOPT2, mcopt2); @@ -2441,6 +2467,7 @@ static int short_mem_test(void) u32 bxcf; int i; int j; + phys_size_t base_addr; u32 test[NUMMEMTESTS][NUMMEMWORDS] = { {0x00000000, 0x00000000, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000, 0x00000000, 0xFFFFFFFF, 0xFFFFFFFF}, @@ -2467,10 +2494,17 @@ static int short_mem_test(void) if ((bxcf & SDRAM_BXCF_M_BE_MASK) == SDRAM_BXCF_M_BE_ENABLE) { /* Bank is enabled */ + /* + * Only run test on accessable memory (below 2GB) + */ + base_addr = SDRAM_RXBAS_SDBA_DECODE(mfdcr_any(SDRAM_R0BAS+bxcr_num)); + if (base_addr >= CONFIG_MAX_MEM_MAPPED) + continue; + /*------------------------------------------------------------------ * Run the short memory test. *-----------------------------------------------------------------*/ - membase = (u32 *)(SDRAM_RXBAS_SDBA_DECODE(mfdcr_any(SDRAM_R0BAS+bxcr_num))); + membase = (u32 *)(u32)base_addr; for (i = 0; i < NUMMEMTESTS; i++) { for (j = 0; j < NUMMEMWORDS; j++) { -- cgit v1.1 From b002144e1dc21374b1ef5281fe6b5d014af96650 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Thu, 10 Jul 2008 09:58:06 +0200 Subject: ppc4xx: Fix printf format warnings now visible with the updated format check This patch fixes ppc4xx related printf format warning. Those warnings are now visible since patch dc4b0b38d4aadf08826f6c31270f1eecd27964fd [Fix printf errors.] by Andrew Klossner has been applied. Thanks, this is really helpful. Signed-off-by: Stefan Roese --- cpu/ppc4xx/44x_spd_ddr2.c | 10 +++++----- cpu/ppc4xx/4xx_enet.c | 2 +- cpu/ppc4xx/denali_spd_ddr2.c | 8 ++++---- cpu/ppc4xx/tlb.c | 4 ++-- cpu/ppc4xx/traps.c | 26 +++++++++++++------------- 5 files changed, 25 insertions(+), 25 deletions(-) (limited to 'cpu') diff --git a/cpu/ppc4xx/44x_spd_ddr2.c b/cpu/ppc4xx/44x_spd_ddr2.c index 9a5340c..a27e276 100644 --- a/cpu/ppc4xx/44x_spd_ddr2.c +++ b/cpu/ppc4xx/44x_spd_ddr2.c @@ -378,7 +378,7 @@ static phys_size_t sdram_memsize(void) mem_size+=4096; break; default: - printf("WARNING: Unsupported bank size (SDSZ=0x%x)!\n" + printf("WARNING: Unsupported bank size (SDSZ=0x%lx)!\n" , sdsz); mem_size=0; break; @@ -860,8 +860,8 @@ static void check_rank_number(unsigned long *dimm_populated, if (dimm_rank > MAXRANKS) { - printf("ERROR: DRAM DIMM detected with %d ranks in " - "slot %d is not supported.\n", dimm_rank, dimm_num); + printf("ERROR: DRAM DIMM detected with %lu ranks in " + "slot %lu is not supported.\n", dimm_rank, dimm_num); printf("Only %d ranks are supported for all DIMM.\n", MAXRANKS); printf("Replace the DIMM module with a supported DIMM.\n\n"); spd_ddr_init_hang (); @@ -1062,7 +1062,7 @@ static void program_copt1(unsigned long *dimm_populated, dimm_32bit = TRUE; break; default: - printf("WARNING: Detected a DIMM with a data width of %d bits.\n", + printf("WARNING: Detected a DIMM with a data width of %lu bits.\n", data_width); printf("Only DIMMs with 32 or 64 bit DDR-SDRAM widths are supported.\n"); break; @@ -1615,7 +1615,7 @@ static void program_mode(unsigned long *dimm_populated, printf("Make sure the PLB speed is within the supported range of the DIMMs.\n"); printf("cas3=%d cas4=%d cas5=%d\n", cas_3_0_available, cas_4_0_available, cas_5_0_available); - printf("sdram_freq=%d cycle3=%d cycle4=%d cycle5=%d\n\n", + printf("sdram_freq=%lu cycle3=%lu cycle4=%lu cycle5=%lu\n\n", sdram_freq, cycle_3_0_clk, cycle_4_0_clk, cycle_5_0_clk); spd_ddr_init_hang (); } diff --git a/cpu/ppc4xx/4xx_enet.c b/cpu/ppc4xx/4xx_enet.c index c40e0ca..4e863dc 100644 --- a/cpu/ppc4xx/4xx_enet.c +++ b/cpu/ppc4xx/4xx_enet.c @@ -1076,7 +1076,7 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis) bd_cached = (u32)malloc_aligned(MAL_ALLOC_SIZE, 4096); if (!bd_cached) { - printf("%s: Error allocating MAL descriptor buffers!\n"); + printf("%s: Error allocating MAL descriptor buffers!\n", __func__); return -1; } diff --git a/cpu/ppc4xx/denali_spd_ddr2.c b/cpu/ppc4xx/denali_spd_ddr2.c index 3bd6375..670fc5c 100644 --- a/cpu/ppc4xx/denali_spd_ddr2.c +++ b/cpu/ppc4xx/denali_spd_ddr2.c @@ -339,7 +339,7 @@ static void get_spd_info(unsigned long dimm_ranks[], "\n", dimm_num, ranks_on_dimm); if (ranks_on_dimm > max_ranks_per_dimm) { printf("WARNING: DRAM DIMM in slot %lu has %lu " - "ranks.\n"); + "ranks.\n", dimm_num, ranks_on_dimm); if (1 == max_ranks_per_dimm) { printf("Only one rank will be used.\n"); } else { @@ -668,8 +668,8 @@ static void program_ddr0_03(unsigned long dimm_ranks[], "and 5.0 are supported.\n"); printf("Make sure the PLB speed is within the supported range " "of the DIMMs.\n"); - printf("sdram_freq=%d cycle2=%d cycle3=%d cycle4=%d " - "cycle5=%d\n\n", sdram_freq, cycle_2_0_clk, + printf("sdram_freq=%ld cycle2=%ld cycle3=%ld cycle4=%ld " + "cycle5=%ld\n\n", sdram_freq, cycle_2_0_clk, cycle_3_0_clk, cycle_4_0_clk, cycle_5_0_clk); spd_ddr_init_hang(); } @@ -1248,7 +1248,7 @@ void board_add_ram_info(int use_default) if (!is_ecc_enabled()) { printf(" not"); } - printf(" enabled, %d MHz", (2 * get_bus_freq(0)) / 1000000); + printf(" enabled, %ld MHz", (2 * get_bus_freq(0)) / 1000000); mfsdram(DDR0_03, val); printf(", CL%d)", DDR0_03_CASLAT_LIN_DECODE(val) >> 1); diff --git a/cpu/ppc4xx/tlb.c b/cpu/ppc4xx/tlb.c index f44822d..24a9a9c 100644 --- a/cpu/ppc4xx/tlb.c +++ b/cpu/ppc4xx/tlb.c @@ -316,12 +316,12 @@ static void program_tlb_addr(u64 phys_addr, virt_addr += TLB_1KB_SIZE; } } else { - printf("ERROR: no TLB size exists for the base address 0x%0X.\n", + printf("ERROR: no TLB size exists for the base address 0x%llx.\n", phys_addr); } if (rc != 0) - printf("ERROR: no TLB entries available for the base addr 0x%0X.\n", + printf("ERROR: no TLB entries available for the base addr 0x%llx.\n", phys_addr); } diff --git a/cpu/ppc4xx/traps.c b/cpu/ppc4xx/traps.c index 8b7e32a..55154b6 100644 --- a/cpu/ppc4xx/traps.c +++ b/cpu/ppc4xx/traps.c @@ -214,7 +214,7 @@ MachineCheckException(struct pt_regs *regs) } #if defined(CONFIG_440EPX) || defined(CONFIG_440GRX) mfsdram(DDR0_00, val) ; - printf("DDR0: DDR0_00 %p\n", val); + printf("DDR0: DDR0_00 %lx\n", val); val = (val >> 16) & 0xff; if (val & 0x80) printf("DDR0: At least one interrupt active\n"); @@ -263,44 +263,44 @@ MachineCheckException(struct pt_regs *regs) break; default: mfsdram(DDR0_01, value2); - printf("DDR0: No DDR0 error know 0x%x %p\n", val, value2); + printf("DDR0: No DDR0 error know 0x%lx %x\n", val, value2); } mfsdram(DDR0_23, val); if (((val >> 16) & 0xff) && corr_ecc) - printf("DDR0: Syndrome for correctable ECC event 0x%x\n", + printf("DDR0: Syndrome for correctable ECC event 0x%lx\n", (val >> 16) & 0xff); mfsdram(DDR0_23, val); if (((val >> 8) & 0xff) && uncorr_ecc) - printf("DDR0: Syndrome for uncorrectable ECC event 0x%x\n", + printf("DDR0: Syndrome for uncorrectable ECC event 0x%lx\n", (val >> 8) & 0xff); mfsdram(DDR0_33, val); if (val) printf("DDR0: Address of command that caused an " - "Out-of-Range interrupt %p\n", val); + "Out-of-Range interrupt %lx\n", val); mfsdram(DDR0_34, val); if (val && uncorr_ecc) - printf("DDR0: Address of uncorrectable ECC event %p\n", val); + printf("DDR0: Address of uncorrectable ECC event %lx\n", val); mfsdram(DDR0_35, val); if (val && uncorr_ecc) - printf("DDR0: Address of uncorrectable ECC event %p\n", val); + printf("DDR0: Address of uncorrectable ECC event %lx\n", val); mfsdram(DDR0_36, val); if (val && uncorr_ecc) - printf("DDR0: Data of uncorrectable ECC event 0x%08x\n", val); + printf("DDR0: Data of uncorrectable ECC event 0x%08lx\n", val); mfsdram(DDR0_37, val); if (val && uncorr_ecc) - printf("DDR0: Data of uncorrectable ECC event 0x%08x\n", val); + printf("DDR0: Data of uncorrectable ECC event 0x%08lx\n", val); mfsdram(DDR0_38, val); if (val && corr_ecc) - printf("DDR0: Address of correctable ECC event %p\n", val); + printf("DDR0: Address of correctable ECC event %lx\n", val); mfsdram(DDR0_39, val); if (val && corr_ecc) - printf("DDR0: Address of correctable ECC event %p\n", val); + printf("DDR0: Address of correctable ECC event %lx\n", val); mfsdram(DDR0_40, val); if (val && corr_ecc) - printf("DDR0: Data of correctable ECC event 0x%08x\n", val); + printf("DDR0: Data of correctable ECC event 0x%08lx\n", val); mfsdram(DDR0_41, val); if (val && corr_ecc) - printf("DDR0: Data of correctable ECC event 0x%08x\n", val); + printf("DDR0: Data of correctable ECC event 0x%08lx\n", val); #endif /* CONFIG_440EPX */ #endif /* CONFIG_440 */ show_regs(regs); -- cgit v1.1