From 3666afffe7baf859c6ae0ce2bebbc8ab7e512ddc Mon Sep 17 00:00:00 2001
From: Michal Simek <monstr@monstr.eu>
Date: Sun, 17 Jun 2007 19:03:21 +0200
Subject: [FIX] fix microblaze file permitission

---
 cpu/microblaze/cache.c      | 0
 cpu/microblaze/interrupts.c | 0
 cpu/microblaze/irq.S        | 0
 3 files changed, 0 insertions(+), 0 deletions(-)
 mode change 100755 => 100644 cpu/microblaze/cache.c
 mode change 100755 => 100644 cpu/microblaze/interrupts.c
 mode change 100755 => 100644 cpu/microblaze/irq.S

(limited to 'cpu')

diff --git a/cpu/microblaze/cache.c b/cpu/microblaze/cache.c
old mode 100755
new mode 100644
diff --git a/cpu/microblaze/interrupts.c b/cpu/microblaze/interrupts.c
old mode 100755
new mode 100644
diff --git a/cpu/microblaze/irq.S b/cpu/microblaze/irq.S
old mode 100755
new mode 100644
-- 
cgit v1.1


From 093172f08d6afb3f34d8a2f26ee0ee874261cf27 Mon Sep 17 00:00:00 2001
From: Michal Simek <monstr@monstr.eu>
Date: Sun, 17 Jun 2007 19:04:11 +0200
Subject: [fix] email reparation

---
 cpu/microblaze/cache.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'cpu')

diff --git a/cpu/microblaze/cache.c b/cpu/microblaze/cache.c
index 4f36a84..2f86a54 100644
--- a/cpu/microblaze/cache.c
+++ b/cpu/microblaze/cache.c
@@ -1,7 +1,7 @@
 /*
  * (C) Copyright 2007 Michal Simek
  *
- * Michal SIMEK <moonstr@monstr.eu>
+ * Michal SIMEK <monstr@monstr.eu>
  *
  * See file CREDITS for list of people who contributed to this
  * project.
-- 
cgit v1.1


From a476ca2ac2217ddd05a2bf0c514075814b10a3c0 Mon Sep 17 00:00:00 2001
From: Michal Simek <monstr@monstr.eu>
Date: Fri, 13 Jul 2007 21:43:55 +0200
Subject: [PATCH] Remove problem with disabled BARREL SHIFTER

---
 cpu/microblaze/start.S | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

(limited to 'cpu')

diff --git a/cpu/microblaze/start.S b/cpu/microblaze/start.S
index 3c027ff..8740284 100644
--- a/cpu/microblaze/start.S
+++ b/cpu/microblaze/start.S
@@ -33,15 +33,13 @@ _start:
 	addi	r1, r0, CFG_INIT_SP_OFFSET
 	addi	r1, r1, -4	/* Decrement SP to top of memory */
 	/* add opcode instruction for 32bit jump - 2 instruction imm & brai*/
-	addi	r6, r0, 0xb000	/* hex b000 opcode imm */
-	bslli	r6, r6, 16	/* shift */
+	addi	r6, r0, 0xb0000000	/* hex b000 opcode imm */
 	swi	r6, r0, 0x0	/* reset address */
 	swi	r6, r0, 0x8	/* user vector exception */
 	swi	r6, r0, 0x10	/* interrupt */
 	swi	r6, r0, 0x20	/* hardware exception */
 
-	addi	r6, r0, 0xb808	/* hew b808 opcode brai*/
-	bslli	r6, r6, 16
+	addi	r6, r0, 0xb8080000	/* hew b808 opcode brai*/
 	swi	r6, r0, 0x4	/* reset address */
 	swi	r6, r0, 0xC	/* user vector exception */
 	swi	r6, r0, 0x14	/* interrupt */
-- 
cgit v1.1


From 5a2f1098d81ad58b309e5e558d0492643166a799 Mon Sep 17 00:00:00 2001
From: Michal Simek <monstr@monstr.eu>
Date: Sat, 14 Jul 2007 00:18:48 +0200
Subject: [PATCH] Support time without timer

---
 cpu/microblaze/timer.c | 7 +++++++
 1 file changed, 7 insertions(+)

(limited to 'cpu')

diff --git a/cpu/microblaze/timer.c b/cpu/microblaze/timer.c
index ab1cb12..b350453 100644
--- a/cpu/microblaze/timer.c
+++ b/cpu/microblaze/timer.c
@@ -33,10 +33,17 @@ void reset_timer (void)
 	timestamp = 0;
 }
 
+#ifdef CFG_TIMER_0
 ulong get_timer (ulong base)
 {
 	return (timestamp - base);
 }
+#else
+ulong get_timer (ulong base)
+{
+	return (timestamp++ - base);
+}
+#endif
 
 void set_timer (ulong t)
 {
-- 
cgit v1.1


From 9f5c3d3720e777a572dcdc8af2008b44c7243885 Mon Sep 17 00:00:00 2001
From: Peter Pearse <peter.pearse@arm.com>
Date: Tue, 4 Sep 2007 16:18:38 +0100
Subject: Add coloured led interface for ARM boards. Use it in
 cpu/arm920t/start.S to indicate U-Boot code has been entered.

---
 cpu/arm920t/start.S | 14 ++++++--------
 1 file changed, 6 insertions(+), 8 deletions(-)
 mode change 100644 => 100755 cpu/arm920t/start.S

(limited to 'cpu')

diff --git a/cpu/arm920t/start.S b/cpu/arm920t/start.S
old mode 100644
new mode 100755
index b9c364b..1bc6099
--- a/cpu/arm920t/start.S
+++ b/cpu/arm920t/start.S
@@ -27,9 +27,7 @@
 
 #include <config.h>
 #include <version.h>
-#if	defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK) || defined(CONFIG_AT91RM9200DF)
-#include	<led.h>
-#endif
+#include <asm/led.h>
 
 /*
  *************************************************************************
@@ -117,13 +115,13 @@ reset:
 	bic	r0,r0,#0x1f
 	orr	r0,r0,#0xd3
 	msr	cpsr,r0
-
-#if	CONFIG_AT91RM9200
-#if	defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK) || defined(CONFIG_AT91RM9200DF)
-	bl LED_init
+	/* 
+	 * if board has a red led use it to show U-Boot is running
+	 */
+	bl coloured_LED_init
 	bl red_LED_on
-#endif
 
+#ifdef CONFIG_AT91RM9200
 #ifdef CONFIG_BOOTBINFUNC
 /* code based on entry.S from ATMEL */
 #define AT91C_BASE_CKGR 0xFFFFFC20
-- 
cgit v1.1


From 80767a6cead9990d9e77e62be947843c2c72f469 Mon Sep 17 00:00:00 2001
From: Peter Pearse <peter.pearse@arm.com>
Date: Wed, 5 Sep 2007 16:04:41 +0100
Subject: Changed API name to coloured_led.h Removed code using deprecated
 ifdef CONFIG_BOOTBINFUNC Tidied other cpu/arm920t/start.S code

---
 cpu/arm920t/start.S | 126 +++++++++-------------------------------------------
 1 file changed, 21 insertions(+), 105 deletions(-)

(limited to 'cpu')

diff --git a/cpu/arm920t/start.S b/cpu/arm920t/start.S
index 1bc6099..df2ee20 100755
--- a/cpu/arm920t/start.S
+++ b/cpu/arm920t/start.S
@@ -27,7 +27,7 @@
 
 #include <config.h>
 #include <version.h>
-#include <asm/led.h>
+#include <asm/coloured_led.h>
 
 /*
  *************************************************************************
@@ -39,7 +39,7 @@
 
 
 .globl _start
-_start:	b       reset
+_start:	b       start_code
 	ldr	pc, _undefined_instruction
 	ldr	pc, _software_interrupt
 	ldr	pc, _prefetch_abort
@@ -62,7 +62,7 @@ _fiq:			.word fiq
 /*
  *************************************************************************
  *
- * Startup Code (reset vector)
+ * Startup Code (called from the ARM reset exception vector)
  *
  * do important init only if we don't start from memory!
  * relocate armboot to ram
@@ -104,10 +104,10 @@ FIQ_STACK_START:
 
 
 /*
- * the actual reset code
+ * the actual start code
  */
 
-reset:
+start_code:
 	/*
 	 * set the cpu to SVC32 mode
 	 */
@@ -115,59 +115,13 @@ reset:
 	bic	r0,r0,#0x1f
 	orr	r0,r0,#0xd3
 	msr	cpsr,r0
-	/* 
-	 * if board has a red led use it to show U-Boot is running
-	 */
+
 	bl coloured_LED_init
 	bl red_LED_on
 
-#ifdef CONFIG_AT91RM9200
-#ifdef CONFIG_BOOTBINFUNC
-/* code based on entry.S from ATMEL */
-#define AT91C_BASE_CKGR 0xFFFFFC20
-#define CKGR_MOR 0
-	/* Get the CKGR Base Address */
-	ldr     r1, =AT91C_BASE_CKGR
-
-/* Main oscillator Enable register	APMC_MOR : Enable main oscillator , OSCOUNT = 0xFF */
-/*	ldr 	r0, = AT91C_CKGR_MOSCEN:OR:AT91C_CKGR_OSCOUNT */
-	ldr 	r0, =0x0000FF01
-	str     r0, [r1, #CKGR_MOR]
-	/* Add loop to compensate Main Oscillator startup time */
-	ldr 	r0, =0x00000010
-LoopOsc:
-	subs    r0, r0, #1
-	bhi     LoopOsc
-	/* scratch stack */
-	ldr 	r1, =0x00204000
-	/* Insure word alignment */
-	bic     r1, r1, #3
-	/* Init stack SYS	 */
-	mov     sp, r1
-	/*
-	 * This does a lot more than just set up the memory, which
-	 * is why it's called lowlevelinit
-	 */
-	bl	lowlevelinit /* in memsetup.S */
-	bl	icache_enable;
-	/* ------------------------------------
-	 * Read/modify/write CP15 control register
-	 * -------------------------------------
-	 * read cp15 control register (cp15 r1) in r0
-	 * ------------------------------------
-	 */
-	mrc     p15, 0, r0, c1, c0, 0
-	/* Reset bit :Little Endian end fast bus mode */
-	ldr     r3, =0xC0000080
-	/* Set bit :Asynchronous clock mode, Not Fast Bus */
-	ldr     r4, =0xC0000000
-	bic     r0, r0, r3
-	orr     r0, r0, r4
-	/* write r0 in cp15 control register (cp15 r1) */
-	mcr     p15, 0, r0, c1, c0, 0
-#endif /* CONFIG_BOOTBINFUNC */
+#if	defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK) || defined(CONFIG_AT91RM9200DF)
 	/*
-	 * relocate exeception table
+	 * relocate exception table
 	 */
 	ldr	r0, =_start
 	ldr	r1, =0x0
@@ -179,19 +133,20 @@ copyex:
 	bne	copyex
 #endif
 
-/* turn off the watchdog */
-#if defined(CONFIG_S3C2400)
-# define pWTCON		0x15300000
-# define INTMSK		0x14400008	/* Interupt-Controller base addresses */
-# define CLKDIVN	0x14800014	/* clock divisor register */
-#elif defined(CONFIG_S3C2410)
-# define pWTCON		0x53000000
-# define INTMSK		0x4A000008	/* Interupt-Controller base addresses */
-# define INTSUBMSK	0x4A00001C
-# define CLKDIVN	0x4C000014	/* clock divisor register */
-#endif
-
 #if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410)
+	/* turn off the watchdog */
+
+# if defined(CONFIG_S3C2400)
+#  define pWTCON		0x15300000
+#  define INTMSK		0x14400008	/* Interupt-Controller base addresses */
+#  define CLKDIVN	0x14800014	/* clock divisor register */
+#else
+#  define pWTCON		0x53000000
+#  define INTMSK		0x4A000008	/* Interupt-Controller base addresses */
+#  define INTSUBMSK	0x4A00001C
+#  define CLKDIVN	0x4C000014	/* clock divisor register */
+# endif
+
 	ldr     r0, =pWTCON
 	mov     r1, #0x0
 	str     r1, [r0]
@@ -224,25 +179,7 @@ copyex:
 #endif
 
 #ifdef	CONFIG_AT91RM9200
-#ifdef CONFIG_BOOTBINFUNC
-relocate:				/* relocate U-Boot to RAM	    */
-	adr	r0, _start		/* r0 <- current position of code   */
-	ldr	r1, _TEXT_BASE		/* test if we run from flash or RAM */
-	cmp     r0, r1                  /* don't reloc during debug         */
-	beq     stack_setup
 
-	ldr	r2, _armboot_start
-	ldr	r3, _bss_start
-	sub	r2, r3, r2		/* r2 <- size of armboot            */
-	add	r2, r0, r2		/* r2 <- source end address         */
-
-copy_loop:
-	ldmia	r0!, {r3-r10}		/* copy from source address [r0]    */
-	stmia	r1!, {r3-r10}		/* copy to   target address [r1]    */
-	cmp	r0, r2			/* until source end addreee [r2]    */
-	ble	copy_loop
-#endif /* CONFIG_BOOTBINFUNC */
-#else
 #ifndef CONFIG_SKIP_RELOCATE_UBOOT
 relocate:				/* relocate U-Boot to RAM	    */
 	adr	r0, _start		/* r0 <- current position of code   */
@@ -282,27 +219,6 @@ clbss_l:str	r2, [r0]		/* clear loop...                    */
 	cmp	r0, r1
 	ble	clbss_l
 
-#if 0
-	/* try doing this stuff after the relocation */
-	ldr     r0, =pWTCON
-	mov     r1, #0x0
-	str     r1, [r0]
-
-	/*
-	 * mask all IRQs by setting all bits in the INTMR - default
-	 */
-	mov	r1, #0xffffffff
-	ldr	r0, =INTMR
-	str	r1, [r0]
-
-	/* FCLK:HCLK:PCLK = 1:2:4 */
-	/* default FCLK is 120 MHz ! */
-	ldr	r0, =CLKDIVN
-	mov	r1, #3
-	str	r1, [r0]
-	/* END stuff after relocation */
-#endif
-
 	ldr	pc, _start_armboot
 
 _start_armboot:	.word start_armboot
-- 
cgit v1.1


From d94c79e47011af5e8dd10ed6163c09b4cfc743cc Mon Sep 17 00:00:00 2001
From: Peter Pearse <peter.pearse@arm.com>
Date: Tue, 11 Sep 2007 15:35:01 +0100
Subject: Final tidy

---
 cpu/arm920t/start.S | 0
 1 file changed, 0 insertions(+), 0 deletions(-)
 mode change 100755 => 100644 cpu/arm920t/start.S

(limited to 'cpu')

diff --git a/cpu/arm920t/start.S b/cpu/arm920t/start.S
old mode 100755
new mode 100644
-- 
cgit v1.1


From bd86220f58b99d6896198c385fda132f0c980915 Mon Sep 17 00:00:00 2001
From: Peter Pearse <peter.pearse@arm.com>
Date: Tue, 18 Sep 2007 13:07:54 +0100
Subject: Move coloured led API to status_led.h Improve indentation in
 drivers/at45.c

---
 cpu/arm920t/start.S | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'cpu')

diff --git a/cpu/arm920t/start.S b/cpu/arm920t/start.S
index df2ee20..aefcdd1 100644
--- a/cpu/arm920t/start.S
+++ b/cpu/arm920t/start.S
@@ -27,7 +27,7 @@
 
 #include <config.h>
 #include <version.h>
-#include <asm/coloured_led.h>
+#include <status_led.h>
 
 /*
  *************************************************************************
-- 
cgit v1.1


From b90c045f035c3cc9b5d2edaed6048dfb74e40763 Mon Sep 17 00:00:00 2001
From: Michal Simek <monstr@monstr.eu>
Date: Mon, 24 Sep 2007 00:08:37 +0200
Subject: synchronizition with mainline

---
 cpu/microblaze/cache.c | 2 +-
 cpu/microblaze/start.S | 6 ++++--
 cpu/microblaze/timer.c | 7 -------
 3 files changed, 5 insertions(+), 10 deletions(-)

(limited to 'cpu')

diff --git a/cpu/microblaze/cache.c b/cpu/microblaze/cache.c
index 4b7866f..6ce0b55 100644
--- a/cpu/microblaze/cache.c
+++ b/cpu/microblaze/cache.c
@@ -1,7 +1,7 @@
 /*
  * (C) Copyright 2007 Michal Simek
  *
- * Michal SIMEK <monstr@monstr.eu>
+ * Michal SIMEK <moonstr@monstr.eu>
  *
  * See file CREDITS for list of people who contributed to this
  * project.
diff --git a/cpu/microblaze/start.S b/cpu/microblaze/start.S
index 8740284..3c027ff 100644
--- a/cpu/microblaze/start.S
+++ b/cpu/microblaze/start.S
@@ -33,13 +33,15 @@ _start:
 	addi	r1, r0, CFG_INIT_SP_OFFSET
 	addi	r1, r1, -4	/* Decrement SP to top of memory */
 	/* add opcode instruction for 32bit jump - 2 instruction imm & brai*/
-	addi	r6, r0, 0xb0000000	/* hex b000 opcode imm */
+	addi	r6, r0, 0xb000	/* hex b000 opcode imm */
+	bslli	r6, r6, 16	/* shift */
 	swi	r6, r0, 0x0	/* reset address */
 	swi	r6, r0, 0x8	/* user vector exception */
 	swi	r6, r0, 0x10	/* interrupt */
 	swi	r6, r0, 0x20	/* hardware exception */
 
-	addi	r6, r0, 0xb8080000	/* hew b808 opcode brai*/
+	addi	r6, r0, 0xb808	/* hew b808 opcode brai*/
+	bslli	r6, r6, 16
 	swi	r6, r0, 0x4	/* reset address */
 	swi	r6, r0, 0xC	/* user vector exception */
 	swi	r6, r0, 0x14	/* interrupt */
diff --git a/cpu/microblaze/timer.c b/cpu/microblaze/timer.c
index b350453..ab1cb12 100644
--- a/cpu/microblaze/timer.c
+++ b/cpu/microblaze/timer.c
@@ -33,17 +33,10 @@ void reset_timer (void)
 	timestamp = 0;
 }
 
-#ifdef CFG_TIMER_0
 ulong get_timer (ulong base)
 {
 	return (timestamp - base);
 }
-#else
-ulong get_timer (ulong base)
-{
-	return (timestamp++ - base);
-}
-#endif
 
 void set_timer (ulong t)
 {
-- 
cgit v1.1


From db14d77995ce515b728b178b63f82babe60e3d56 Mon Sep 17 00:00:00 2001
From: Michal Simek <monstr@monstr.eu>
Date: Mon, 24 Sep 2007 00:18:46 +0200
Subject: [FIX] repair email address

---
 cpu/microblaze/cache.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'cpu')

diff --git a/cpu/microblaze/cache.c b/cpu/microblaze/cache.c
index 6ce0b55..4b7866f 100644
--- a/cpu/microblaze/cache.c
+++ b/cpu/microblaze/cache.c
@@ -1,7 +1,7 @@
 /*
  * (C) Copyright 2007 Michal Simek
  *
- * Michal SIMEK <moonstr@monstr.eu>
+ * Michal SIMEK <monstr@monstr.eu>
  *
  * See file CREDITS for list of people who contributed to this
  * project.
-- 
cgit v1.1


From 0731933ec8ec45d02ba89b52df673d526873cdde Mon Sep 17 00:00:00 2001
From: Michal Simek <monstr@monstr.eu>
Date: Mon, 24 Sep 2007 00:19:48 +0200
Subject: [FIX] resolve problem with cpu without barrel shifter

---
 cpu/microblaze/start.S | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

(limited to 'cpu')

diff --git a/cpu/microblaze/start.S b/cpu/microblaze/start.S
index 3c027ff..8740284 100644
--- a/cpu/microblaze/start.S
+++ b/cpu/microblaze/start.S
@@ -33,15 +33,13 @@ _start:
 	addi	r1, r0, CFG_INIT_SP_OFFSET
 	addi	r1, r1, -4	/* Decrement SP to top of memory */
 	/* add opcode instruction for 32bit jump - 2 instruction imm & brai*/
-	addi	r6, r0, 0xb000	/* hex b000 opcode imm */
-	bslli	r6, r6, 16	/* shift */
+	addi	r6, r0, 0xb0000000	/* hex b000 opcode imm */
 	swi	r6, r0, 0x0	/* reset address */
 	swi	r6, r0, 0x8	/* user vector exception */
 	swi	r6, r0, 0x10	/* interrupt */
 	swi	r6, r0, 0x20	/* hardware exception */
 
-	addi	r6, r0, 0xb808	/* hew b808 opcode brai*/
-	bslli	r6, r6, 16
+	addi	r6, r0, 0xb8080000	/* hew b808 opcode brai*/
 	swi	r6, r0, 0x4	/* reset address */
 	swi	r6, r0, 0xC	/* user vector exception */
 	swi	r6, r0, 0x14	/* interrupt */
-- 
cgit v1.1


From 1c1100d2fcf46b9d11dcf78d6e5aea75e2e8b716 Mon Sep 17 00:00:00 2001
From: Michal Simek <monstr@monstr.eu>
Date: Mon, 24 Sep 2007 00:21:19 +0200
Subject: [PATCH] Add support for design without interrupt controller Polling
 timer

---
 cpu/microblaze/timer.c | 7 +++++++
 1 file changed, 7 insertions(+)

(limited to 'cpu')

diff --git a/cpu/microblaze/timer.c b/cpu/microblaze/timer.c
index ab1cb12..b350453 100644
--- a/cpu/microblaze/timer.c
+++ b/cpu/microblaze/timer.c
@@ -33,10 +33,17 @@ void reset_timer (void)
 	timestamp = 0;
 }
 
+#ifdef CFG_TIMER_0
 ulong get_timer (ulong base)
 {
 	return (timestamp - base);
 }
+#else
+ulong get_timer (ulong base)
+{
+	return (timestamp++ - base);
+}
+#endif
 
 void set_timer (ulong t)
 {
-- 
cgit v1.1


From 1487adbdcf9594bb2eb686325a6f9540dad1b70a Mon Sep 17 00:00:00 2001
From: Ed Swarthout <Ed.Swarthout@freescale.com>
Date: Wed, 26 Sep 2007 16:35:54 -0500
Subject: 85xx io out functions need sync after write.

This fixes the mc146818 rtc_read/write functions for 85xx.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
---
 cpu/mpc85xx/start.S | 5 +++++
 1 file changed, 5 insertions(+)

(limited to 'cpu')

diff --git a/cpu/mpc85xx/start.S b/cpu/mpc85xx/start.S
index 2c98c2a..5d65190 100644
--- a/cpu/mpc85xx/start.S
+++ b/cpu/mpc85xx/start.S
@@ -701,6 +701,7 @@ in8:
 	.globl	out8
 out8:
 	stb	r4,0x0000(r3)
+	sync
 	blr
 
 /*------------------------------------------------------------------------------- */
@@ -710,6 +711,7 @@ out8:
 	.globl	out16
 out16:
 	sth	r4,0x0000(r3)
+	sync
 	blr
 
 /*------------------------------------------------------------------------------- */
@@ -719,6 +721,7 @@ out16:
 	.globl	out16r
 out16r:
 	sthbrx	r4,r0,r3
+	sync
 	blr
 
 /*------------------------------------------------------------------------------- */
@@ -728,6 +731,7 @@ out16r:
 	.globl	out32
 out32:
 	stw	r4,0x0000(r3)
+	sync
 	blr
 
 /*------------------------------------------------------------------------------- */
@@ -737,6 +741,7 @@ out32:
 	.globl	out32r
 out32r:
 	stwbrx	r4,r0,r3
+	sync
 	blr
 
 /*------------------------------------------------------------------------------- */
-- 
cgit v1.1


From 86ec86c04326c3913178a7679aa910de071da75d Mon Sep 17 00:00:00 2001
From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Date: Thu, 27 Sep 2007 23:27:47 +0200
Subject: Fix missing DECLARE_GLOBAL_DATA_PTR on CONFIG_LPC2292 in serial

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
---
 cpu/arm720t/serial.c | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'cpu')

diff --git a/cpu/arm720t/serial.c b/cpu/arm720t/serial.c
index 27eb73a..1b0e147 100644
--- a/cpu/arm720t/serial.c
+++ b/cpu/arm720t/serial.c
@@ -125,6 +125,8 @@ serial_puts (const char *s)
 
 #elif defined(CONFIG_LPC2292)
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #include <asm/arch/hardware.h>
 
 void serial_setbrg (void)
-- 
cgit v1.1


From 2db64784061bfc34f4ba70ef1d2fbe7133b55670 Mon Sep 17 00:00:00 2001
From: Grzegorz Bernacki <gjb@semihalf.com>
Date: Mon, 1 Oct 2007 09:51:50 +0200
Subject: Program EPLD to force full duplex mode for PHY.

EPLD forces modes of PHY operation. By default full duplex is turned off.
This fix turns it on.

Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
---
 cpu/ppc4xx/4xx_enet.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

(limited to 'cpu')

diff --git a/cpu/ppc4xx/4xx_enet.c b/cpu/ppc4xx/4xx_enet.c
index cc8e734..4e9a05e 100644
--- a/cpu/ppc4xx/4xx_enet.c
+++ b/cpu/ppc4xx/4xx_enet.c
@@ -138,7 +138,8 @@
 #define BI_PHYMODE_MII   7
 #endif
 
-#if defined(CONFIG_440SPE) || defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
+#if defined(CONFIG_440SPE) || defined(CONFIG_440EPX) || \
+	defined(CONFIG_440GRX) || defined(CONFIG_440SP)
 #define SDR0_MFR_ETH_CLK_SEL_V(n)	((0x01<<27) / (n+1))
 #endif
 
@@ -408,7 +409,8 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis)
 	int ethgroup = -1;
 #endif
 #endif
-#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || defined(CONFIG_440SPE)
+#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
+	defined(CONFIG_440SPE) || defined(CONFIG_440SP)
 	unsigned long mfr;
 #endif
 
@@ -500,7 +502,8 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis)
 	__asm__ volatile ("eieio");
 
 	/* reset emac so we have access to the phy */
-#if defined(CONFIG_440SPE) || defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
+#if defined(CONFIG_440SPE) || defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
+	defined(CONFIG_440SP)
 	/* provide clocks for EMAC internal loopback  */
 	mfsdr (sdr_mfr, mfr);
 	mfr |= SDR0_MFR_ETH_CLK_SEL_V(devnum);
@@ -518,7 +521,8 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis)
 	if (failsafe <= 0)
 		printf("\nProblem resetting EMAC!\n");
 
-#if defined(CONFIG_440SPE) || defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
+#if defined(CONFIG_440SPE) || defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
+	defined(CONFIG_440SP)
 	/* remove clocks for EMAC internal loopback  */
 	mfsdr (sdr_mfr, mfr);
 	mfr &= ~SDR0_MFR_ETH_CLK_SEL_V(devnum);
-- 
cgit v1.1


From 738815c0cc44aa329097f868dc1efc49ede9c5ba Mon Sep 17 00:00:00 2001
From: Stefan Roese <sr@denx.de>
Date: Tue, 2 Oct 2007 11:44:46 +0200
Subject: ppc4xx: Coding style cleanup

Signed-off-by: Stefan Roese <sr@denx.de>
---
 cpu/ppc4xx/440spe_pcie.c | 10 +++++-----
 cpu/ppc4xx/4xx_enet.c    | 14 +++++++-------
 2 files changed, 12 insertions(+), 12 deletions(-)

(limited to 'cpu')

diff --git a/cpu/ppc4xx/440spe_pcie.c b/cpu/ppc4xx/440spe_pcie.c
index 158f1c5..3eac0ae 100644
--- a/cpu/ppc4xx/440spe_pcie.c
+++ b/cpu/ppc4xx/440spe_pcie.c
@@ -104,7 +104,7 @@ static int pcie_read_config(struct pci_controller *hose, unsigned int devfn,
 	if ((!((PCI_FUNC(devfn) == 0) && (PCI_DEV(devfn) == 0))) &&
 		((PCI_BUS(devfn) == 0) || (PCI_BUS(devfn) == 1)))
 		return 0;
-		
+
 	address = pcie_get_base(hose, devfn);
 	offset += devfn << 4;
 
@@ -136,12 +136,12 @@ static int pcie_write_config(struct pci_controller *hose, unsigned int devfn,
 	int offset, int len, u32 val) {
 
 	u8 *address;
-	
+
 	/*
 	 * Bus numbers are relative to hose->first_busno
 	 */
 	devfn -= PCI_BDF(hose->first_busno, 0, 0);
-	
+
 	/*
 	 * Same constraints as in pcie_read_config().
 	 */
@@ -151,7 +151,7 @@ static int pcie_write_config(struct pci_controller *hose, unsigned int devfn,
 	if ((!((PCI_FUNC(devfn) == 0) && (PCI_DEV(devfn) == 0))) &&
 		((PCI_BUS(devfn) == 0) || (PCI_BUS(devfn) == 1)))
 		return 0;
-	
+
 	address = pcie_get_base(hose, devfn);
 	offset += devfn << 4;
 
@@ -926,7 +926,7 @@ void ppc440spe_setup_pcie_rootpoint(struct pci_controller *hose, int port)
 		 in_le16((u16 *)(mbase + PCI_COMMAND)) |
 		 PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
 	printf("PCIE:%d successfully set as rootpoint\n",port);
-	
+
 	/* Set Device and Vendor Id */
 	switch (port) {
 	case 0:
diff --git a/cpu/ppc4xx/4xx_enet.c b/cpu/ppc4xx/4xx_enet.c
index 4e9a05e..71a9e37 100644
--- a/cpu/ppc4xx/4xx_enet.c
+++ b/cpu/ppc4xx/4xx_enet.c
@@ -410,7 +410,7 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis)
 #endif
 #endif
 #if defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
-	defined(CONFIG_440SPE) || defined(CONFIG_440SP)
+    defined(CONFIG_440SP) || defined(CONFIG_440SPE)
 	unsigned long mfr;
 #endif
 
@@ -502,8 +502,8 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis)
 	__asm__ volatile ("eieio");
 
 	/* reset emac so we have access to the phy */
-#if defined(CONFIG_440SPE) || defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
-	defined(CONFIG_440SP)
+#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
+    defined(CONFIG_440SP) || defined(CONFIG_440SPE)
 	/* provide clocks for EMAC internal loopback  */
 	mfsdr (sdr_mfr, mfr);
 	mfr |= SDR0_MFR_ETH_CLK_SEL_V(devnum);
@@ -521,8 +521,8 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis)
 	if (failsafe <= 0)
 		printf("\nProblem resetting EMAC!\n");
 
-#if defined(CONFIG_440SPE) || defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
-	defined(CONFIG_440SP)
+#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
+    defined(CONFIG_440SP) || defined(CONFIG_440SPE)
 	/* remove clocks for EMAC internal loopback  */
 	mfsdr (sdr_mfr, mfr);
 	mfr &= ~SDR0_MFR_ETH_CLK_SEL_V(devnum);
@@ -924,8 +924,8 @@ static int ppc_4xx_eth_init (struct eth_device *dev, bd_t * bis)
 
 	/* set speed */
 	if (speed == _1000BASET) {
-#if defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \
-    defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
+#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
+    defined(CONFIG_440SP) || defined(CONFIG_440SPE)
 		unsigned long pfc1;
 
 		mfsdr (sdr_pfc1, pfc1);
-- 
cgit v1.1


From 68f14f77ca5fe5f9cc025c8cae101671f628309f Mon Sep 17 00:00:00 2001
From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Date: Sat, 29 Sep 2007 13:41:37 +0200
Subject: Fix warning differ in signedness in cpu/pxa/mmc.c

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
---
 cpu/pxa/mmc.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

(limited to 'cpu')

diff --git a/cpu/pxa/mmc.c b/cpu/pxa/mmc.c
index 0fbaa16..d76e0cd 100644
--- a/cpu/pxa/mmc.c
+++ b/cpu/pxa/mmc.c
@@ -438,11 +438,11 @@ mmc_init(int verbose)
 		/* FIXME fill in the correct size (is set to 32MByte) */
 		mmc_dev.blksz = 512;
 		mmc_dev.lba = 0x10000;
-		sprintf(mmc_dev.vendor,"Man %02x%02x%02x Snr %02x%02x%02x",
+		sprintf((char*)mmc_dev.vendor,"Man %02x%02x%02x Snr %02x%02x%02x",
 				cid->id[0], cid->id[1], cid->id[2],
 				cid->sn[0], cid->sn[1], cid->sn[2]);
-		sprintf(mmc_dev.product,"%s",cid->name);
-		sprintf(mmc_dev.revision,"%x %x",cid->hwrev, cid->fwrev);
+		sprintf((char*)mmc_dev.product,"%s",cid->name);
+		sprintf((char*)mmc_dev.revision,"%x %x",cid->hwrev, cid->fwrev);
 		mmc_dev.removable = 0;
 		mmc_dev.block_read = mmc_bread;
 
-- 
cgit v1.1


From 4d4a945e189a2f384c66432316da2788a0ac1607 Mon Sep 17 00:00:00 2001
From: Rodolfo Giometti <giometti@enneenne.com>
Date: Mon, 15 Oct 2007 11:59:17 +0200
Subject: PXA USB OHCI: "usb stop" implementation.

Some USB keys need to be switched off before loading the kernel
otherwise they can remain in an undefined status which prevents them
to be correctly recognized by the kernel.

Signed-off-by: Rodolfo Giometti <giometti@linux.it>
---
 cpu/pxa/usb.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

(limited to 'cpu')

diff --git a/cpu/pxa/usb.c b/cpu/pxa/usb.c
index 65f457f..3c11d4d 100644
--- a/cpu/pxa/usb.c
+++ b/cpu/pxa/usb.c
@@ -67,6 +67,22 @@ int usb_cpu_init()
 
 int usb_cpu_stop()
 {
+	UHCHR |= UHCHR_FHR;
+	udelay(11);
+	UHCHR &= ~UHCHR_FHR;
+
+	UHCCOMS |= 1;
+	udelay(10);
+
+#if defined(CONFIG_CPU_MONAHANS)
+	UHCHR |= UHCHR_SSEP0;
+#endif
+#if defined(CONFIG_PXA27X)
+	UHCHR |= UHCHR_SSEP2;
+#endif
+	UHCHR |= UHCHR_SSEP1;
+	UHCHR |= UHCHR_SSE;
+
 	return 0;
 }
 
-- 
cgit v1.1


From 2491167c245d8ebe6f2dbd8c4287aaa0d14fe93a Mon Sep 17 00:00:00 2001
From: Jon Loeliger <jdl@freescale.com>
Date: Mon, 27 Aug 2007 12:41:03 -0500
Subject: 86xx: Allow for fewer DDR slots per memory controller.

As a direct correlation exists between DDR DIMM slots
and SPD EEPROM addresses used to configure them, use
the individually defined SPD_EEPROM_ADDRESS* values to
determine if a DDR DIMM slot should have its SPD
configuration read or not.

Effectively, this now allows for 1 or 2 DIMM slots
per memory controller.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
---
 cpu/mpc86xx/spd_sdram.c | 30 +++++++++++++++++++++---------
 1 file changed, 21 insertions(+), 9 deletions(-)

(limited to 'cpu')

diff --git a/cpu/mpc86xx/spd_sdram.c b/cpu/mpc86xx/spd_sdram.c
index f37ab43..059097f 100644
--- a/cpu/mpc86xx/spd_sdram.c
+++ b/cpu/mpc86xx/spd_sdram.c
@@ -948,19 +948,25 @@ unsigned int enable_ddr(unsigned int ddr_num)
 	 * Read both dimm slots and decide whether
 	 * or not to enable this controller.
 	 */
-	memset((void *)&spd1,0,sizeof(spd1));
-	memset((void *)&spd2,0,sizeof(spd2));
+	memset((void *)&spd1, 0, sizeof(spd1));
+	memset((void *)&spd2, 0, sizeof(spd2));
 
 	if (ddr_num == 1) {
 		CFG_READ_SPD(SPD_EEPROM_ADDRESS1,
 			     0, 1, (uchar *) &spd1, sizeof(spd1));
+#if defined(SPD_EEPROM_ADDRESS2)
 		CFG_READ_SPD(SPD_EEPROM_ADDRESS2,
 			     0, 1, (uchar *) &spd2, sizeof(spd2));
+#endif
 	} else {
+#if defined(SPD_EEPROM_ADDRESS3)
 		CFG_READ_SPD(SPD_EEPROM_ADDRESS3,
 			     0, 1, (uchar *) &spd1, sizeof(spd1));
+#endif
+#if defined(SPD_EEPROM_ADDRESS4)
 		CFG_READ_SPD(SPD_EEPROM_ADDRESS4,
 			     0, 1, (uchar *) &spd2, sizeof(spd2));
+#endif
 	}
 
 	/*
@@ -1105,21 +1111,25 @@ spd_sdram(void)
 {
 	int memsize_ddr1_dimm1 = 0;
 	int memsize_ddr1_dimm2 = 0;
+	int memsize_ddr1 = 0;
+	unsigned int law_size_ddr1;
+	volatile immap_t *immap = (immap_t *)CFG_IMMR;
+	volatile ccsr_ddr_t *ddr1 = &immap->im_ddr1;
+	volatile ccsr_local_mcm_t *mcm = &immap->im_local_mcm;
+
+#if (CONFIG_NUM_DDR_CONTROLLERS > 1)
 	int memsize_ddr2_dimm1 = 0;
 	int memsize_ddr2_dimm2 = 0;
-	int memsize_total = 0;
-	int memsize_ddr1 = 0;
 	int memsize_ddr2 = 0;
+	unsigned int law_size_ddr2;
+#endif
+
 	unsigned int ddr1_enabled = 0;
 	unsigned int ddr2_enabled = 0;
-	unsigned int law_size_ddr1;
-	unsigned int law_size_ddr2;
-	volatile immap_t *immap = (immap_t *)CFG_IMMR;
-	volatile ccsr_local_mcm_t *mcm = &immap->im_local_mcm;
+	int memsize_total = 0;
 
 #ifdef CONFIG_DDR_INTERLEAVE
 	unsigned int law_size_interleaved;
-	volatile ccsr_ddr_t *ddr1 = &immap->im_ddr1;
 	volatile ccsr_ddr_t *ddr2 = &immap->im_ddr2;
 
 	memsize_ddr1_dimm1 = spd_init(SPD_EEPROM_ADDRESS1,
@@ -1194,9 +1204,11 @@ spd_sdram(void)
 				      (unsigned int)memsize_total * 1024*1024);
 	memsize_total += memsize_ddr1_dimm1;
 
+#if defined(SPD_EEPROM_ADDRESS2)
 	memsize_ddr1_dimm2 = spd_init(SPD_EEPROM_ADDRESS2,
 				      1, 2,
 				      (unsigned int)memsize_total * 1024*1024);
+#endif
 	memsize_total += memsize_ddr1_dimm2;
 
 	/*
-- 
cgit v1.1


From e1ce3cb617bb06f91f82f98915391175addf3e82 Mon Sep 17 00:00:00 2001
From: Kumar Gala <galak@kernel.crashing.org>
Date: Tue, 2 Oct 2007 11:12:27 -0500
Subject: Remove magic numbers from cache related operations for mpc85xx

The mpc85xx start code uses some magic numbers that we actually
have #defines for in <config.h> so use those instead.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
 cpu/mpc85xx/start.S | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

(limited to 'cpu')

diff --git a/cpu/mpc85xx/start.S b/cpu/mpc85xx/start.S
index 5d65190..e5cabca 100644
--- a/cpu/mpc85xx/start.S
+++ b/cpu/mpc85xx/start.S
@@ -266,13 +266,13 @@ _start_e500:
 	 */
 	lis	r3,CFG_INIT_RAM_ADDR@h
 	ori	r3,r3,CFG_INIT_RAM_ADDR@l
-	li	r2,512 /* 512*32=16K */
+	li	r2,(CFG_DCACHE_SIZE / (2 * CFG_CACHELINE_SIZE)) 
 	mtctr	r2
 	li	r0,0
 1:
 	dcbz	r0,r3
 	dcbtls	0,r0,r3
-	addi	r3,r3,32
+	addi	r3,r3,CFG_CACHELINE_SIZE
 	bdnz	1b
 
 	/* Jump out the last 4K page and continue to 'normal' start */
@@ -1066,11 +1066,11 @@ unlock_ram_in_cache:
 	/* invalidate the INIT_RAM section */
 	lis	r3,(CFG_INIT_RAM_ADDR & ~31)@h
 	ori	r3,r3,(CFG_INIT_RAM_ADDR & ~31)@l
-	li	r4,512
+	li	r4,(CFG_DCACHE_SIZE / (2 * CFG_CACHELINE_SIZE)) 
 	mtctr	r4
 1:	icbi	r0,r3
 	dcbi	r0,r3
-	addi	r3,r3,32
+	addi	r3,r3,CFG_CACHELINE_SIZE
 	bdnz	1b
 	sync			/* Wait for all icbi to complete on bus */
 	isync
-- 
cgit v1.1


From 1e701e701304b3c3a3768ca83dd2ab7b9e88c77d Mon Sep 17 00:00:00 2001
From: "urwithsughosh@gmail.com" <urwithsughosh@gmail.com>
Date: Mon, 24 Sep 2007 13:36:01 -0400
Subject: MSR overwrite fix

Hello,
  This patch fixes the MSR overwrite in the start.S when moving out of
  the last 4K page.

Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com>
---
 cpu/mpc85xx/start.S | 11 +++--------
 1 file changed, 3 insertions(+), 8 deletions(-)

(limited to 'cpu')

diff --git a/cpu/mpc85xx/start.S b/cpu/mpc85xx/start.S
index e5cabca..ada6ea5 100644
--- a/cpu/mpc85xx/start.S
+++ b/cpu/mpc85xx/start.S
@@ -218,6 +218,8 @@ _start_e500:
 	bdnz	0b
 
 	/* Clear and set up some registers. */
+	li      r0,0
+	mtmsr   r0
 	li	r0,0x0000
 	lis	r1,0xffff
 	mtspr	DEC,r0			/* prevent dec exceptions */
@@ -277,7 +279,6 @@ _start_e500:
 
 	/* Jump out the last 4K page and continue to 'normal' start */
 #ifdef CFG_RAMBOOT
-	bl	3f
 	b	_start_cont
 #else
 	/* Calculate absolute address in FLASH and jump there		*/
@@ -286,15 +287,9 @@ _start_e500:
 	ori	r3,r3,CFG_MONITOR_BASE@l
 	addi	r3,r3,_start_cont - _start + _START_OFFSET
 	mtlr	r3
+	blr
 #endif
 
-3:	li	r0,0
-	mtspr	SRR1,r0		/* Keep things disabled for now */
-	mflr	r1
-	mtspr	SRR0,r1
-	rfi
-	isync
-
 	.text
 	.globl	_start
 _start:
-- 
cgit v1.1


From df90968b48fb34fa9072fab150db2ac89678f537 Mon Sep 17 00:00:00 2001
From: "urwithsughosh@gmail.com" <urwithsughosh@gmail.com>
Date: Mon, 24 Sep 2007 13:32:13 -0400
Subject: Setting MSR[DE] in do_reset

Hello,
   This patch ensures the soft reset of the board for the 85xx boards
   by setting the MSR[DE] in the do_reset function.

Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com>
---
 cpu/mpc85xx/cpu.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

(limited to 'cpu')

diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c
index 08e0468..bbc5444 100644
--- a/cpu/mpc85xx/cpu.c
+++ b/cpu/mpc85xx/cpu.c
@@ -163,7 +163,12 @@ int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
 	 * Initiate hard reset in debug control register DBCR0
 	 * Make sure MSR[DE] = 1
 	 */
-		unsigned long val;
+		unsigned long val, msr;
+
+		msr = mfmsr ();
+		msr |= MSR_DE;
+		mtmsr (msr);
+
 		val = mfspr(DBCR0);
 		val |= 0x70000000;
 		mtspr(DBCR0,val);
-- 
cgit v1.1


From 22069215eb7adf5a3888bf7c7784ea9d70a72cd0 Mon Sep 17 00:00:00 2001
From: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
Date: Sun, 21 Oct 2007 10:55:36 +0900
Subject: [MIPS] Fix $gp usage

Now we load $gp with _GLOBAL_OFFSET_TABLE_, but this is incorrect use.
As a general principle, we should use _gp for $gp.

Thanks to linker script's help we fortunately have _gp which equals to
_GLOBAL_OFFSET_TABLE_. But once _gp gets out of alignment, we will not
be able to access to GOT entires, global variables and procedure entry
points. The right thing to do is to use _gp.

This patch also introduce a new symbol `.gpword _GLOBAL_OFFSET_TABLE_'
which holds the offset from _gp. When updating GOT entries, we use this
offset and _gp to calculate the final _GLOBAL_OFFSET_TABLE_.

This patch is originally submitted by Vlad Lungu <vlad@comsys.ro>, then
I made some change to leave over num_got_entries.

Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
Cc: Vlad Lungu <vlad@comsys.ro>
---
 cpu/mips/start.S | 19 +++++++++++++------
 1 file changed, 13 insertions(+), 6 deletions(-)

(limited to 'cpu')

diff --git a/cpu/mips/start.S b/cpu/mips/start.S
index e91e213..074d01d 100644
--- a/cpu/mips/start.S
+++ b/cpu/mips/start.S
@@ -234,11 +234,11 @@ reset:
 	li	t0, CONF_CM_UNCACHED
 	mtc0	t0, CP0_CONFIG
 
-	/* Initialize GOT pointer.
+	/* Initialize $gp.
 	*/
 	bal     1f
 	nop
-	.word   _GLOBAL_OFFSET_TABLE_
+	.word	_gp
 	1:
 	move    gp, ra
 	lw      t1, 0(ra)
@@ -306,9 +306,9 @@ relocate_code:
 	move	t1, a2
 
 	/*
-	 * Fix GOT pointer:
+	 * Fix $gp:
 	 *
-	 * New GOT-PTR = (old GOT-PTR - CFG_MONITOR_BASE) + Destination Address
+	 * New $gp = (Old $gp - CFG_MONITOR_BASE) + Destination Address
 	 */
 	move	t6, gp
 	sub	gp, CFG_MONITOR_BASE
@@ -341,15 +341,22 @@ relocate_code:
 	j	t0
 	nop
 
+	.gpword	_GLOBAL_OFFSET_TABLE_	/* _GLOBAL_OFFSET_TABLE_ - _gp	*/
 	.word	uboot_end_data
 	.word	uboot_end
 	.word	num_got_entries
 
 in_ram:
-	/* Now we want to update GOT.
+	/*
+	 * Now we want to update GOT.
+	 *
+	 * GOT[0] is reserved. GOT[1] is also reserved for the dynamic object
+	 * generated by GNU ld. Skip these reserved entries from relocation.
 	 */
 	lw	t3, -4(t0)	/* t3 <-- num_got_entries	*/
-	addi	t4, gp, 8	/* Skipping first two entries.	*/
+	lw	t4, -16(t0)	/* t4 <-- (_GLOBAL_OFFSET_TABLE_ - _gp)	*/
+	add	t4, t4, gp	/* t4 now holds _GLOBAL_OFFSET_TABLE_	*/
+	addi	t4, t4, 8	/* Skipping first two entries.	*/
 	li	t2, 2
 1:
 	lw	t1, 0(t4)
-- 
cgit v1.1


From 00101dd7a32d12f698150123e47e4b3420279f86 Mon Sep 17 00:00:00 2001
From: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
Date: Sun, 21 Oct 2007 21:30:42 +0900
Subject: [MIPS] Add PIC-related switches to PLATFORM_{CPP,LD}FLAGS and cleanup

Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
---
 cpu/mips/config.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'cpu')

diff --git a/cpu/mips/config.mk b/cpu/mips/config.mk
index b29986e..487c4eb 100644
--- a/cpu/mips/config.mk
+++ b/cpu/mips/config.mk
@@ -35,6 +35,6 @@ else
 ENDIANNESS = -EB
 endif
 
-MIPSFLAGS += $(ENDIANNESS) -mabicalls
+MIPSFLAGS += $(ENDIANNESS)
 
 PLATFORM_CPPFLAGS += $(MIPSFLAGS)
-- 
cgit v1.1


From 2a4741d9a14ec475f50e9856d2c0a67e8b4271bd Mon Sep 17 00:00:00 2001
From: Marcel Ziswiler <marcel@ziswiler.com>
Date: Fri, 19 Oct 2007 00:25:33 +0200
Subject: fix pxa255_idp board

The pxa255_idp being an old unmaintained board showed several issues:
1. CONFIG_INIT_CRITICAL was still defined.
2. Neither CONFIG_MAC_PARTITION nor CONFIG_DOS_PARTITION was defined.
3. Symbol flash_addr was undeclared.
4. The boards lowlevel_init function was still called memsetup.
5. The TEXT_BASE was still 0xa3000000 rather than 0xa3080000.
6. Using -march=armv5 instead of -march=armv5te resulted in lots of
'target CPU does not support interworking' warnings on recent compilers.
7. The PXA's serial driver redefined FFUART, BTUART and STUART used as
indexes rather than the register definitions from the pxa-regs header
file. Renamed them to FFUART_INDEX, BTUART_INDEX and STUART_INDEX to
avoid any ambiguities.
8. There were several redefinition warnings concerning ICMR, OSMR3,
OSCR, OWER, OIER, RCSR and CCCR in the PXA's assembly start file.
9. The board configuration file was rather outdated.
10. The part header file defined the vendor, product and revision arrays
as unsigned chars instead of just chars in the block_dev_desc_t
structure.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
---
 cpu/pxa/config.mk |  3 +--
 cpu/pxa/serial.c  | 72 +++++++++++++++++++++++++++----------------------------
 cpu/pxa/start.S   |  6 ++++-
 3 files changed, 42 insertions(+), 39 deletions(-)

(limited to 'cpu')

diff --git a/cpu/pxa/config.mk b/cpu/pxa/config.mk
index fb810ca..f0b86b7 100644
--- a/cpu/pxa/config.mk
+++ b/cpu/pxa/config.mk
@@ -25,8 +25,7 @@
 PLATFORM_RELFLAGS += -fno-strict-aliasing  -fno-common -ffixed-r8 \
 	-msoft-float
 
-#PLATFORM_CPPFLAGS += -mapcs-32 -march=armv4 -mtune=strongarm1100
-PLATFORM_CPPFLAGS += -march=armv5 -mtune=xscale
+PLATFORM_CPPFLAGS += -march=armv5te -mtune=xscale
 # =========================================================================
 #
 # Supply options according to compiler version
diff --git a/cpu/pxa/serial.c b/cpu/pxa/serial.c
index 51e7f65..9ba457e 100644
--- a/cpu/pxa/serial.c
+++ b/cpu/pxa/serial.c
@@ -35,17 +35,17 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define FFUART	0
-#define BTUART	1
-#define STUART	2
+#define FFUART_INDEX	0
+#define BTUART_INDEX	1
+#define STUART_INDEX	2
 
 #ifndef CONFIG_SERIAL_MULTI
 #if defined (CONFIG_FFUART)
-#define UART_INDEX	FFUART
+#define UART_INDEX	FFUART_INDEX
 #elif defined (CONFIG_BTUART)
-#define UART_INDEX	BTUART
+#define UART_INDEX	BTUART_INDEX
 #elif defined (CONFIG_STUART)
-#define UART_INDEX	STUART
+#define UART_INDEX	STUART_INDEX
 #else
 #error "Bad: you didn't configure serial ..."
 #endif
@@ -71,7 +71,7 @@ void pxa_setbrg_dev (unsigned int uart_index)
 		hang ();
 
 	switch (uart_index) {
-		case FFUART:
+		case FFUART_INDEX:
 #ifdef CONFIG_CPU_MONAHANS
 			CKENA |= CKENA_22_FFUART;
 #else
@@ -90,7 +90,7 @@ void pxa_setbrg_dev (unsigned int uart_index)
 			FFIER = IER_UUE;	/* Enable FFUART */
 		break;
 
-		case BTUART:
+		case BTUART_INDEX:
 #ifdef CONFIG_CPU_MONAHANS
 			CKENA |= CKENA_21_BTUART;
 #else
@@ -110,7 +110,7 @@ void pxa_setbrg_dev (unsigned int uart_index)
 
 		break;
 
-		case STUART:
+		case STUART_INDEX:
 #ifdef CONFIG_CPU_MONAHANS
 			CKENA |= CKENA_23_STUART;
 #else
@@ -154,20 +154,20 @@ int pxa_init_dev (unsigned int uart_index)
 void pxa_putc_dev (unsigned int uart_index,const char c)
 {
 	switch (uart_index) {
-		case FFUART:
+		case FFUART_INDEX:
 		/* wait for room in the tx FIFO on FFUART */
 			while ((FFLSR & LSR_TEMT) == 0)
 				WATCHDOG_RESET ();	/* Reset HW Watchdog, if needed */
 			FFTHR = c;
 			break;
 
-		case BTUART:
+		case BTUART_INDEX:
 			while ((BTLSR & LSR_TEMT ) == 0 )
 				WATCHDOG_RESET ();	/* Reset HW Watchdog, if needed */
 			BTTHR = c;
 			break;
 
-		case STUART:
+		case STUART_INDEX:
 			while ((STLSR & LSR_TEMT ) == 0 )
 				WATCHDOG_RESET ();	/* Reset HW Watchdog, if needed */
 			STTHR = c;
@@ -187,11 +187,11 @@ void pxa_putc_dev (unsigned int uart_index,const char c)
 int pxa_tstc_dev (unsigned int uart_index)
 {
 	switch (uart_index) {
-		case FFUART:
+		case FFUART_INDEX:
 			return FFLSR & LSR_DR;
-		case BTUART:
+		case BTUART_INDEX:
 			return BTLSR & LSR_DR;
-		case STUART:
+		case STUART_INDEX:
 			return STLSR & LSR_DR;
 	}
 	return -1;
@@ -205,16 +205,16 @@ int pxa_tstc_dev (unsigned int uart_index)
 int pxa_getc_dev (unsigned int uart_index)
 {
 	switch (uart_index) {
-		case FFUART:
+		case FFUART_INDEX:
 			while (!(FFLSR & LSR_DR))
 			WATCHDOG_RESET ();	/* Reset HW Watchdog, if needed */
 			return (char) FFRBR & 0xff;
 
-		case BTUART:
+		case BTUART_INDEX:
 			while (!(BTLSR & LSR_DR))
 			WATCHDOG_RESET ();	/* Reset HW Watchdog, if needed */
 			return (char) BTRBR & 0xff;
-		case STUART:
+		case STUART_INDEX:
 			while (!(STLSR & LSR_DR))
 			WATCHDOG_RESET ();	/* Reset HW Watchdog, if needed */
 			return (char) STRBR & 0xff;
@@ -233,32 +233,32 @@ pxa_puts_dev (unsigned int uart_index,const char *s)
 #if defined (CONFIG_FFUART)
 static int ffuart_init(void)
 {
-	return pxa_init_dev(FFUART);
+	return pxa_init_dev(FFUART_INDEX);
 }
 
 static void ffuart_setbrg(void)
 {
-	return pxa_setbrg_dev(FFUART);
+	return pxa_setbrg_dev(FFUART_INDEX);
 }
 
 static void ffuart_putc(const char c)
 {
-	return pxa_putc_dev(FFUART,c);
+	return pxa_putc_dev(FFUART_INDEX,c);
 }
 
 static void ffuart_puts(const char *s)
 {
-	return pxa_puts_dev(FFUART,s);
+	return pxa_puts_dev(FFUART_INDEX,s);
 }
 
 static int ffuart_getc(void)
 {
-	return pxa_getc_dev(FFUART);
+	return pxa_getc_dev(FFUART_INDEX);
 }
 
 static int ffuart_tstc(void)
 {
-	return pxa_tstc_dev(FFUART);
+	return pxa_tstc_dev(FFUART_INDEX);
 }
 
 struct serial_device serial_ffuart_device =
@@ -277,32 +277,32 @@ struct serial_device serial_ffuart_device =
 #if defined (CONFIG_BTUART)
 static int btuart_init(void)
 {
-	return pxa_init_dev(BTUART);
+	return pxa_init_dev(BTUART_INDEX);
 }
 
 static void btuart_setbrg(void)
 {
-	return pxa_setbrg_dev(BTUART);
+	return pxa_setbrg_dev(BTUART_INDEX);
 }
 
 static void btuart_putc(const char c)
 {
-	return pxa_putc_dev(BTUART,c);
+	return pxa_putc_dev(BTUART_INDEX,c);
 }
 
 static void btuart_puts(const char *s)
 {
-	return pxa_puts_dev(BTUART,s);
+	return pxa_puts_dev(BTUART_INDEX,s);
 }
 
 static int btuart_getc(void)
 {
-	return pxa_getc_dev(BTUART);
+	return pxa_getc_dev(BTUART_INDEX);
 }
 
 static int btuart_tstc(void)
 {
-	return pxa_tstc_dev(BTUART);
+	return pxa_tstc_dev(BTUART_INDEX);
 }
 
 struct serial_device serial_btuart_device =
@@ -321,32 +321,32 @@ struct serial_device serial_btuart_device =
 #if defined (CONFIG_STUART)
 static int stuart_init(void)
 {
-	return pxa_init_dev(STUART);
+	return pxa_init_dev(STUART_INDEX);
 }
 
 static void stuart_setbrg(void)
 {
-	return pxa_setbrg_dev(STUART);
+	return pxa_setbrg_dev(STUART_INDEX);
 }
 
 static void stuart_putc(const char c)
 {
-	return pxa_putc_dev(STUART,c);
+	return pxa_putc_dev(STUART_INDEX,c);
 }
 
 static void stuart_puts(const char *s)
 {
-	return pxa_puts_dev(STUART,s);
+	return pxa_puts_dev(STUART_INDEX,s);
 }
 
 static int stuart_getc(void)
 {
-	return pxa_getc_dev(STUART);
+	return pxa_getc_dev(STUART_INDEX);
 }
 
 static int stuart_tstc(void)
 {
-	return pxa_tstc_dev(STUART);
+	return pxa_tstc_dev(STUART_INDEX);
 }
 
 struct serial_device serial_stuart_device =
diff --git a/cpu/pxa/start.S b/cpu/pxa/start.S
index ffaa30f..b922485 100644
--- a/cpu/pxa/start.S
+++ b/cpu/pxa/start.S
@@ -166,13 +166,17 @@ _start_armboot: .word start_armboot
 /*									    */
 /****************************************************************************/
 /* mk@tbd: Fix this! */
-#ifdef CONFIG_CPU_MONAHANS
+#if defined(CONFIG_PXA250) || defined(CONFIG_CPU_MONAHANS)
 #undef ICMR
 #undef OSMR3
 #undef OSCR
 #undef OWER
 #undef OIER
 #endif
+#ifdef CONFIG_PXA250
+#undef RCSR
+#undef CCCR
+#endif
 
 /* Interrupt-Controller base address					    */
 IC_BASE:	   .word	   0x40d00000
-- 
cgit v1.1


From 9c4884f54da982ce990c7d1760ac81b0704d3c64 Mon Sep 17 00:00:00 2001
From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Date: Fri, 19 Oct 2007 08:10:15 +0200
Subject: fix warning: no return statement in function returning non-void

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
---
 cpu/arm920t/at91rm9200/usb.c | 8 ++++----
 cpu/pxa/usb.c                | 6 +++---
 2 files changed, 7 insertions(+), 7 deletions(-)

(limited to 'cpu')

diff --git a/cpu/arm920t/at91rm9200/usb.c b/cpu/arm920t/at91rm9200/usb.c
index 366262e..c121de6 100644
--- a/cpu/arm920t/at91rm9200/usb.c
+++ b/cpu/arm920t/at91rm9200/usb.c
@@ -28,7 +28,7 @@
 
 #include <asm/arch/hardware.h>
 
-int usb_cpu_init()
+int usb_cpu_init(void)
 {
 	/* Enable USB host clock. */
 	*AT91C_PMC_SCER = AT91C_PMC_UHP;	/* 48MHz clock enabled for UHP */
@@ -36,7 +36,7 @@ int usb_cpu_init()
 	return 0;
 }
 
-int usb_cpu_stop()
+int usb_cpu_stop(void)
 {
 	/* Initialization failed */
 	*AT91C_PMC_PCDR = 1 << AT91C_ID_UHP;	/* Peripheral Clock Disable Register */
@@ -44,9 +44,9 @@ int usb_cpu_stop()
 	return 0;
 }
 
-int usb_cpu_init_fail()
+int usb_cpu_init_fail(void)
 {
-	usb_cpu_stop();
+	return usb_cpu_stop();
 }
 
 # endif /* CONFIG_AT91RM9200 */
diff --git a/cpu/pxa/usb.c b/cpu/pxa/usb.c
index 3c11d4d..d2812a4 100644
--- a/cpu/pxa/usb.c
+++ b/cpu/pxa/usb.c
@@ -28,7 +28,7 @@
 
 #include <asm/arch/pxa-regs.h>
 
-int usb_cpu_init()
+int usb_cpu_init(void)
 {
 #if defined(CONFIG_CPU_MONAHANS)
 	/* Enable USB host clock. */
@@ -65,7 +65,7 @@ int usb_cpu_init()
 	return 0;
 }
 
-int usb_cpu_stop()
+int usb_cpu_stop(void)
 {
 	UHCHR |= UHCHR_FHR;
 	udelay(11);
@@ -86,7 +86,7 @@ int usb_cpu_stop()
 	return 0;
 }
 
-int usb_cpu_init_fail()
+int usb_cpu_init_fail(void)
 {
 	return 0;
 }
-- 
cgit v1.1


From e9d0d527992566ebef9826962ff1745b2f082b92 Mon Sep 17 00:00:00 2001
From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Date: Fri, 19 Oct 2007 10:55:24 +0200
Subject: delta: Fix OHCI_REGS_BASE undeclared and wait_ms implicit declaration

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
---
 cpu/pxa/usb.c | 1 +
 1 file changed, 1 insertion(+)

(limited to 'cpu')

diff --git a/cpu/pxa/usb.c b/cpu/pxa/usb.c
index d2812a4..72b7dfa 100644
--- a/cpu/pxa/usb.c
+++ b/cpu/pxa/usb.c
@@ -27,6 +27,7 @@
 # if defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_PXA27X)
 
 #include <asm/arch/pxa-regs.h>
+#include <usb.h>
 
 int usb_cpu_init(void)
 {
-- 
cgit v1.1


From 2acefa72ee0026f862ab65597ca687428f63a973 Mon Sep 17 00:00:00 2001
From: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
Date: Thu, 25 Oct 2007 17:09:17 -0500
Subject: ColdFire 5282: Fix external flash boot and return dramsize

Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
---
 cpu/mcf52x2/start.S | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

(limited to 'cpu')

diff --git a/cpu/mcf52x2/start.S b/cpu/mcf52x2/start.S
index 686e2a5..260a09a 100644
--- a/cpu/mcf52x2/start.S
+++ b/cpu/mcf52x2/start.S
@@ -58,7 +58,7 @@ _vectors:
 .long	0x00000000		/* Flash offset is 0 until we setup CS0 */
 #if defined(CONFIG_R5200)
 .long	0x400
-#elif defined(CONFIG_M5282)
+#elif defined(CONFIG_M5282) && (TEXT_BASE == CFG_INT_FLASH_BASE)
 .long	_start - TEXT_BASE
 #else
 .long	_START
@@ -177,7 +177,11 @@ _after_flashbar_copy:
 	 * therefore no VBR to set
 	 */
 #if !defined(CONFIG_MONITOR_IS_IN_RAM)
+#if defined(CONFIG_M5282) && (TEXT_BASE == CFG_INT_FLASH_BASE)
+	move.l	#CFG_INT_FLASH_BASE, %d0
+#else
 	move.l	#CFG_FLASH_BASE, %d0
+#endif
 	movec	%d0, %VBR
 #endif
 
-- 
cgit v1.1


From c67e12e705b204cfe914e3e3e693d69a445dcabf Mon Sep 17 00:00:00 2001
From: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
Date: Thu, 25 Oct 2007 17:12:36 -0500
Subject: ColdFire 5329: Assign correct SDRAM size and fix cache

Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
---
 cpu/mcf532x/start.S | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'cpu')

diff --git a/cpu/mcf532x/start.S b/cpu/mcf532x/start.S
index 5cc1c87..61be2ea 100644
--- a/cpu/mcf532x/start.S
+++ b/cpu/mcf532x/start.S
@@ -131,7 +131,7 @@ _start:
 	movec	%d0, %VBR
 
 	move.l	#(CFG_INIT_RAM_ADDR + CFG_INIT_RAM_CTRL), %d0
-	movec	%d0, %RAMBAR0
+	movec	%d0, %RAMBAR1
 
 	/* invalidate and disable cache */
 	move.l	#0x01000000, %d0		/* Invalidate cache cmd */
@@ -268,7 +268,7 @@ _int_handler:
 icache_enable:
 	move.l	#0x01000000, %d0		/* Invalidate cache cmd */
 	movec	%d0, %CACR			/* Invalidate cache */
-	move.l	#(CFG_SDRAM_BASE + 0xc000 + ((CFG_SDRAM_SIZE & 0x1fe0) << 11)), %d0
+	move.l	#(CFG_SDRAM_BASE + 0x1c000), %d0
 	movec	%d0, %ACR0			/* Enable cache */
 
 	move.l	#0x80000200, %d0		/* Setup cache mask */
-- 
cgit v1.1


From c9e7b9b9a1700fe009678d1f9b41e6364ac5df2d Mon Sep 17 00:00:00 2001
From: Sergej Stepanov <Sergej.Stepanov@ids.de>
Date: Wed, 17 Oct 2007 11:13:51 +0200
Subject: add ft_cpu_setup(..) on mpc8260

Add ft_cpu_setup(..)-function to adapt it for use with libfdt
based on code from mpc5xxx

Sigend-off-by: Sergej Stepanov <Sergej.Stepanov@ids.de>
--
---
 cpu/mpc8260/cpu.c | 38 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 38 insertions(+)

(limited to 'cpu')

diff --git a/cpu/mpc8260/cpu.c b/cpu/mpc8260/cpu.c
index 94651dc..c2b753d 100644
--- a/cpu/mpc8260/cpu.c
+++ b/cpu/mpc8260/cpu.c
@@ -47,6 +47,11 @@
 #include <asm/processor.h>
 #include <asm/cpm_8260.h>
 
+#if defined(CONFIG_OF_LIBFDT)
+#include <libfdt.h>
+#include <libfdt_env.h>
+#endif
+
 DECLARE_GLOBAL_DATA_PTR;
 
 #if defined(CONFIG_GET_CPU_STR_F)
@@ -294,3 +299,36 @@ void watchdog_reset (void)
 #endif /* CONFIG_WATCHDOG */
 
 /* ------------------------------------------------------------------------- */
+#if defined(CONFIG_OF_LIBFDT)
+static void do_fixup(void *fdt, const char *node, const char *prop,
+			const void *val, int len, int create)
+{
+#if defined(DEBUG)
+	int i;
+	debug("Updating property '%s/%s' = ", node, prop);
+	for (i = 0; i < len; i++)
+		debug(" %.2x", *(u8*)(val+i));
+	debug("\n");
+#endif
+	int rc = fdt_find_and_setprop(fdt, node, prop, val, len, create);
+	if (rc)
+		printf("Unable to update property %s:%s, err=%s\n",
+			node, prop, fdt_strerror(rc));
+}
+
+static void do_fixup_u32(void *fdt, const char *node, const char *prop,
+			 u32 val, int create)
+{
+	val = cpu_to_fdt32(val);
+	do_fixup(fdt, node, prop, &val, sizeof(val), create);
+}
+
+void ft_cpu_setup (void *blob, bd_t *bd)
+{
+	char * cpu_path = "/cpus/" OF_CPU;
+
+	do_fixup_u32(blob, cpu_path, "bus-frequency", bd->bi_busfreq, 1);
+	do_fixup_u32(blob, cpu_path, "timebase-frequency", OF_TBCLK, 1);
+	do_fixup_u32(blob, cpu_path, "clock-frequency", bd->bi_intfreq, 1);
+}
+#endif /* CONFIG_OF_LIBFDT */
-- 
cgit v1.1


From 59543fe00a4ce720ef9f5aa7fb387c6daf1c7d78 Mon Sep 17 00:00:00 2001
From: Guennadi Liakhovetski <lg@denx.de>
Date: Tue, 23 Oct 2007 14:35:05 +0200
Subject: Fix a typo in cpu/mpc824x/interrupts.c

Since December 2003 the timer_interrupt_cpu() function in
cpu/mpc824x/interrupts.c contains what seems to be a superfluous
parameter. Remove it.

Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
---
 cpu/mpc824x/interrupts.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'cpu')

diff --git a/cpu/mpc824x/interrupts.c b/cpu/mpc824x/interrupts.c
index acb8947..4359ecc 100644
--- a/cpu/mpc824x/interrupts.c
+++ b/cpu/mpc824x/interrupts.c
@@ -86,7 +86,7 @@ void irq_free_handler (int vec)
  vga?
  */
 
-void timer_interrupt_cpu (struct pt_regs *regs, ulong timestamp)
+void timer_interrupt_cpu (struct pt_regs *regs)
 {
 	/* nothing to do here */
 	return;
-- 
cgit v1.1


From 992742a5b09d9040adbd156fb90756af66ade310 Mon Sep 17 00:00:00 2001
From: Wolfgang Denk <wd@denx.de>
Date: Sat, 3 Nov 2007 23:09:27 +0100
Subject: Cleanup coding style; update CHANGELOG

Signed-off-by: Wolfgang Denk <wd@denx.de>
---
 cpu/mpc85xx/start.S | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'cpu')

diff --git a/cpu/mpc85xx/start.S b/cpu/mpc85xx/start.S
index ada6ea5..b769ef8 100644
--- a/cpu/mpc85xx/start.S
+++ b/cpu/mpc85xx/start.S
@@ -268,7 +268,7 @@ _start_e500:
 	 */
 	lis	r3,CFG_INIT_RAM_ADDR@h
 	ori	r3,r3,CFG_INIT_RAM_ADDR@l
-	li	r2,(CFG_DCACHE_SIZE / (2 * CFG_CACHELINE_SIZE)) 
+	li	r2,(CFG_DCACHE_SIZE / (2 * CFG_CACHELINE_SIZE))
 	mtctr	r2
 	li	r0,0
 1:
@@ -1061,7 +1061,7 @@ unlock_ram_in_cache:
 	/* invalidate the INIT_RAM section */
 	lis	r3,(CFG_INIT_RAM_ADDR & ~31)@h
 	ori	r3,r3,(CFG_INIT_RAM_ADDR & ~31)@l
-	li	r4,(CFG_DCACHE_SIZE / (2 * CFG_CACHELINE_SIZE)) 
+	li	r4,(CFG_DCACHE_SIZE / (2 * CFG_CACHELINE_SIZE))
 	mtctr	r4
 1:	icbi	r0,r3
 	dcbi	r0,r3
-- 
cgit v1.1


From d9240a5f827eb3b476a6ba2938d01f1a9e7688f4 Mon Sep 17 00:00:00 2001
From: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
Date: Wed, 7 Nov 2007 17:51:00 -0600
Subject: ColdFire: Update cpu flag for 4.2-xx compiler

Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
---
 cpu/mcf523x/config.mk  |  4 ++++
 cpu/mcf52x2/config.mk  | 29 +++++++++++++++++++++++++++++
 cpu/mcf532x/config.mk  |  4 ++++
 cpu/mcf5445x/config.mk |  4 ++++
 4 files changed, 41 insertions(+)

(limited to 'cpu')

diff --git a/cpu/mcf523x/config.mk b/cpu/mcf523x/config.mk
index ba324a8..93645a3 100644
--- a/cpu/mcf523x/config.mk
+++ b/cpu/mcf523x/config.mk
@@ -24,4 +24,8 @@
 #
 
 PLATFORM_RELFLAGS += -ffixed-d7 -msep-data
+ifeq ($(findstring 4.2,$(shell $(CC) --version)),4.2)
+PLATFORM_CPPFLAGS += -mcpu=5235 -fPIC
+else
 PLATFORM_CPPFLAGS += -m5307 -fPIC
+endif
diff --git a/cpu/mcf52x2/config.mk b/cpu/mcf52x2/config.mk
index 650db85..f97157d 100644
--- a/cpu/mcf52x2/config.mk
+++ b/cpu/mcf52x2/config.mk
@@ -24,4 +24,33 @@
 #
 
 PLATFORM_RELFLAGS += -ffixed-d7 -msep-data
+
+cfg=$(shell grep configs $(OBJTREE)/include/config.h | sed 's/.*<\(configs.*\)>/\1/')
+is5249=$(shell grep CONFIG_M5249 $(TOPDIR)/include/$(cfg))
+is5253=$(shell grep CONFIG_M5253 $(TOPDIR)/include/$(cfg))
+is5271=$(shell grep CONFIG_M5271 $(TOPDIR)/include/$(cfg))
+is5272=$(shell grep CONFIG_M5272 $(TOPDIR)/include/$(cfg))
+is5282=$(shell grep CONFIG_M5282 $(TOPDIR)/include/$(cfg))
+
+
+ifeq ($(findstring 4.2,$(shell $(CC) --version)),4.2)
+
+ifneq (,$(findstring CONFIG_M5249,$(is5249)))
+PLATFORM_CPPFLAGS += -mcpu=5249
+endif
+ifneq (,$(findstring CONFIG_M5253,$(is5253)))
+PLATFORM_CPPFLAGS += -mcpu=5253
+endif
+ifneq (,$(findstring CONFIG_M5271,$(is5271)))
+PLATFORM_CPPFLAGS += -mcpu=5271
+endif
+ifneq (,$(findstring CONFIG_M5272,$(is5272)))
+PLATFORM_CPPFLAGS += -mcpu=5272
+endif
+ifneq (,$(findstring CONFIG_M5282,$(is5282)))
+PLATFORM_CPPFLAGS += -mcpu=5282
+endif
+
+else
 PLATFORM_CPPFLAGS += -m5307
+endif
diff --git a/cpu/mcf532x/config.mk b/cpu/mcf532x/config.mk
index ba324a8..16a0bc3 100644
--- a/cpu/mcf532x/config.mk
+++ b/cpu/mcf532x/config.mk
@@ -24,4 +24,8 @@
 #
 
 PLATFORM_RELFLAGS += -ffixed-d7 -msep-data
+ifeq ($(findstring 4.2,$(shell $(CC) --version)),4.2)
+PLATFORM_CPPFLAGS += -mcpu=5329 -fPIC
+else
 PLATFORM_CPPFLAGS += -m5307 -fPIC
+endif
diff --git a/cpu/mcf5445x/config.mk b/cpu/mcf5445x/config.mk
index d0c72fb..88433f2 100644
--- a/cpu/mcf5445x/config.mk
+++ b/cpu/mcf5445x/config.mk
@@ -24,4 +24,8 @@
 #
 
 PLATFORM_RELFLAGS += -ffixed-d7 -msep-data
+ifeq ($(findstring 4.2,$(shell $(CC) --version)),4.2)
+PLATFORM_CPPFLAGS += -mcpu=54455 -fPIC
+else
 PLATFORM_CPPFLAGS += -m5407 -fPIC
+endif
-- 
cgit v1.1


From 248c7c14835f34d5d910b45e5600050e58ca6cab Mon Sep 17 00:00:00 2001
From: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
Date: Wed, 7 Nov 2007 17:56:15 -0600
Subject: ColdFire: MCF532x - Update do_reset() using core reset

Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
---
 cpu/mcf532x/cpu.c | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

(limited to 'cpu')

diff --git a/cpu/mcf532x/cpu.c b/cpu/mcf532x/cpu.c
index 2f62e95..89cc8ad 100644
--- a/cpu/mcf532x/cpu.c
+++ b/cpu/mcf532x/cpu.c
@@ -35,14 +35,10 @@ DECLARE_GLOBAL_DATA_PTR;
 
 int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
 {
-	volatile wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
+	volatile rcm_t *rcm = (rcm_t *) (MMAP_RCM);
 
-	wdp->cr = 0;
 	udelay(1000);
-
-	/* enable watchdog, set timeout to 0 and wait */
-	wdp->cr = WTM_WCR_EN;
-	while (1) ;
+	rcm->rcr |= RCM_RCR_SOFTRST;
 
 	/* we don't return! */
 	return 0;
-- 
cgit v1.1


From 225a24b5e062ad94627424508ae814f51dbe1a34 Mon Sep 17 00:00:00 2001
From: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
Date: Wed, 7 Nov 2007 18:00:54 -0600
Subject: ColdFire: MCF5445x - Update correct RAMBAR and missing linker files

Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
---
 cpu/mcf5445x/start.S | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'cpu')

diff --git a/cpu/mcf5445x/start.S b/cpu/mcf5445x/start.S
index cd989ab..423583d 100644
--- a/cpu/mcf5445x/start.S
+++ b/cpu/mcf5445x/start.S
@@ -136,7 +136,7 @@ _start:
 	movec	%d0, %VBR
 
 	move.l	#(CFG_INIT_RAM_ADDR + CFG_INIT_RAM_CTRL), %d0
-	movec	%d0, %RAMBAR0
+	movec	%d0, %RAMBAR1
 
 	/* initialize general use internal ram */
 	move.l #0, %d0
-- 
cgit v1.1


From f9d9164d9c6b5a7f0393fd8d7e246b8a0326bc19 Mon Sep 17 00:00:00 2001
From: Jason Jin <Jason.jin@freescale.com>
Date: Fri, 26 Oct 2007 18:32:00 +0800
Subject: make 8610 board use pixis reset

Signed-off-by: Jason Jin <Jason.jin@freescale.com>
---
 cpu/mpc86xx/cpu.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'cpu')

diff --git a/cpu/mpc86xx/cpu.c b/cpu/mpc86xx/cpu.c
index 9456471..d83bedd 100644
--- a/cpu/mpc86xx/cpu.c
+++ b/cpu/mpc86xx/cpu.c
@@ -120,7 +120,7 @@ checkcpu(void)
 static inline void
 soft_restart(unsigned long addr)
 {
-#ifndef CONFIG_MPC8641HPCN
+#if !defined(CONFIG_MPC8641HPCN) && !defined(CONFIG_MPC8610HPCD)
 
 	/*
 	 * SRR0 has system reset vector, SRR1 has default MSR value
@@ -148,7 +148,7 @@ soft_restart(unsigned long addr)
 void
 do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 {
-#ifndef CONFIG_MPC8641HPCN
+#if !defined(CONFIG_MPC8641HPCN) && !defined(CONFIG_MPC8610HPCD)
 
 #ifdef CFG_RESET_ADDRESS
 	ulong addr = CFG_RESET_ADDRESS;
-- 
cgit v1.1


From d08b7233bc252faad8339e7ca0ddfd62fa79903c Mon Sep 17 00:00:00 2001
From: Jon Loeliger <jdl@freescale.com>
Date: Thu, 1 Nov 2007 12:23:29 -0500
Subject: 86xx: Fix broken variable reference when #def DEBUGing.

Sometimes you can't reference the DDR2 controller variables.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
---
 cpu/mpc86xx/spd_sdram.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

(limited to 'cpu')

diff --git a/cpu/mpc86xx/spd_sdram.c b/cpu/mpc86xx/spd_sdram.c
index 059097f..d57bcdf 100644
--- a/cpu/mpc86xx/spd_sdram.c
+++ b/cpu/mpc86xx/spd_sdram.c
@@ -1270,10 +1270,12 @@ spd_sdram(void)
 		debug("\nDDR: LAWBAR8=0x%08x\n", mcm->lawbar8);
 		debug("DDR: LAWAR8=0x%08x\n", mcm->lawar8);
 	}
+
+	debug("\nMemory size of DDR2 = 0x%08lx\n", memsize_ddr2);
+
 #endif /* CONFIG_NUM_DDR_CONTROLLERS > 1 */
 
-	debug("\nMemory sizes are DDR1 = 0x%08lx, DDR2 = 0x%08lx\n",
-	      memsize_ddr1, memsize_ddr2);
+	debug("\nMemory size of DDR1 = 0x%08lx\n", memsize_ddr1);
 
 	/*
 	 * If neither DDR controller is enabled return 0.
-- 
cgit v1.1


From 1c3dd43338a077165e7e0309cb3994e65d2bdbf8 Mon Sep 17 00:00:00 2001
From: Grant Likely <grant.likely@secretlab.ca>
Date: Tue, 13 Nov 2007 22:18:33 -0700
Subject: powerpc: Backout relocation changes.

Ugh.  I *hate* to back this change out, but these compiler flags don't
work for relocation on all versions of GCC.  I've not been able to
reproduce the environment in my setup (and hence, not been able to
find a combination that *does* work), so I've got no choice but to go
back to the old gcc flags and linker script.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
---
 cpu/mpc512x/config.mk               | 2 +-
 cpu/mpc5xx/config.mk                | 2 +-
 cpu/mpc5xx/u-boot.lds               | 1 +
 cpu/mpc5xxx/config.mk               | 2 +-
 cpu/mpc5xxx/u-boot-customlayout.lds | 1 +
 cpu/mpc5xxx/u-boot.lds              | 1 +
 cpu/mpc8220/config.mk               | 2 +-
 cpu/mpc8220/u-boot.lds              | 1 +
 cpu/mpc824x/config.mk               | 2 +-
 cpu/mpc824x/u-boot.lds              | 1 +
 cpu/mpc8260/config.mk               | 2 +-
 cpu/mpc8260/u-boot.lds              | 1 +
 cpu/mpc83xx/config.mk               | 2 +-
 cpu/mpc83xx/u-boot.lds              | 1 +
 14 files changed, 14 insertions(+), 7 deletions(-)

(limited to 'cpu')

diff --git a/cpu/mpc512x/config.mk b/cpu/mpc512x/config.mk
index 3259d53..8a07c5a 100644
--- a/cpu/mpc512x/config.mk
+++ b/cpu/mpc512x/config.mk
@@ -19,7 +19,7 @@
 # Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 # MA 02111-1307 USA
 #
-PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -mrelocatable
+PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi
 
 PLATFORM_CPPFLAGS += -DCONFIG_MPC512X -DCONFIG_E300 \
 			-ffixed-r2 -ffixed-r29 -msoft-float -mcpu=603e
diff --git a/cpu/mpc5xx/config.mk b/cpu/mpc5xx/config.mk
index e95b8a1..64cd600 100644
--- a/cpu/mpc5xx/config.mk
+++ b/cpu/mpc5xx/config.mk
@@ -28,7 +28,7 @@
 #
 
 
-PLATFORM_RELFLAGS += 	-fPIC -ffixed-r14 -meabi -mrelocatable
+PLATFORM_RELFLAGS += 	-fPIC -ffixed-r14 -meabi
 
 PLATFORM_CPPFLAGS +=	-DCONFIG_5xx -ffixed-r2 -ffixed-r29 -mpowerpc -msoft-float
 
diff --git a/cpu/mpc5xx/u-boot.lds b/cpu/mpc5xx/u-boot.lds
index 10001b1..5b03fef 100644
--- a/cpu/mpc5xx/u-boot.lds
+++ b/cpu/mpc5xx/u-boot.lds
@@ -59,6 +59,7 @@ SECTIONS
     cpu/mpc5xx/start.o	(.text)
 
     *(.text)
+    *(.fixup)
     *(.got1)
   }
   _etext = .;
diff --git a/cpu/mpc5xxx/config.mk b/cpu/mpc5xxx/config.mk
index 0e861c4..0df51ba 100644
--- a/cpu/mpc5xxx/config.mk
+++ b/cpu/mpc5xxx/config.mk
@@ -21,7 +21,7 @@
 # MA 02111-1307 USA
 #
 
-PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -mrelocatable
+PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi
 
 PLATFORM_CPPFLAGS += -DCONFIG_MPC5xxx -ffixed-r2 -ffixed-r29 \
 		     -mstring -mcpu=603e -mmultiple
diff --git a/cpu/mpc5xxx/u-boot-customlayout.lds b/cpu/mpc5xxx/u-boot-customlayout.lds
index 1107943..123a14c 100644
--- a/cpu/mpc5xxx/u-boot-customlayout.lds
+++ b/cpu/mpc5xxx/u-boot-customlayout.lds
@@ -66,6 +66,7 @@ SECTIONS
     common/environment.o        (.ppcenv)
 
     *(.text)
+    *(.fixup)
     *(.got1)
     . = ALIGN(16);
     *(.rodata)
diff --git a/cpu/mpc5xxx/u-boot.lds b/cpu/mpc5xxx/u-boot.lds
index a28a3af..78818a4 100644
--- a/cpu/mpc5xxx/u-boot.lds
+++ b/cpu/mpc5xxx/u-boot.lds
@@ -55,6 +55,7 @@ SECTIONS
   {
     cpu/mpc5xxx/start.o	(.text)
     *(.text)
+    *(.fixup)
     *(.got1)
     . = ALIGN(16);
     *(.rodata)
diff --git a/cpu/mpc8220/config.mk b/cpu/mpc8220/config.mk
index c41cafe..8e3ba54 100644
--- a/cpu/mpc8220/config.mk
+++ b/cpu/mpc8220/config.mk
@@ -21,7 +21,7 @@
 # MA 02111-1307 USA
 #
 
-PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -mrelocatable
+PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi
 
 PLATFORM_CPPFLAGS += -DCONFIG_MPC8220 -ffixed-r2 -ffixed-r29 \
 		     -mstring -mcpu=603e -mmultiple
diff --git a/cpu/mpc8220/u-boot.lds b/cpu/mpc8220/u-boot.lds
index a199a64..889bc77 100644
--- a/cpu/mpc8220/u-boot.lds
+++ b/cpu/mpc8220/u-boot.lds
@@ -55,6 +55,7 @@ SECTIONS
   {
     cpu/mpc8220/start.o	(.text)
     *(.text)
+    *(.fixup)
     *(.got1)
     . = ALIGN(16);
     *(.rodata)
diff --git a/cpu/mpc824x/config.mk b/cpu/mpc824x/config.mk
index 17fdb21..66207f4 100644
--- a/cpu/mpc824x/config.mk
+++ b/cpu/mpc824x/config.mk
@@ -21,7 +21,7 @@
 # MA 02111-1307 USA
 #
 
-PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -fno-strict-aliasing -mrelocatable
+PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -fno-strict-aliasing
 
 PLATFORM_CPPFLAGS += -DCONFIG_MPC824X -ffixed-r2 -ffixed-r29 -mstring -mcpu=603e -msoft-float
 
diff --git a/cpu/mpc824x/u-boot.lds b/cpu/mpc824x/u-boot.lds
index 8cbef4a..c90d1e9 100644
--- a/cpu/mpc824x/u-boot.lds
+++ b/cpu/mpc824x/u-boot.lds
@@ -55,6 +55,7 @@ SECTIONS
   {
     cpu/mpc824x/start.o		(.text)
     *(.text)
+    *(.fixup)
     *(.got1)
     . = ALIGN(16);
     *(.rodata)
diff --git a/cpu/mpc8260/config.mk b/cpu/mpc8260/config.mk
index d401e4c..683b6fb 100644
--- a/cpu/mpc8260/config.mk
+++ b/cpu/mpc8260/config.mk
@@ -21,7 +21,7 @@
 # MA 02111-1307 USA
 #
 
-PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -mrelocatable
+PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi
 
 PLATFORM_CPPFLAGS += -DCONFIG_8260 -DCONFIG_CPM2 -ffixed-r2 -ffixed-r29 \
 		     -mstring -mcpu=603e -mmultiple
diff --git a/cpu/mpc8260/u-boot.lds b/cpu/mpc8260/u-boot.lds
index b8abc17..3e84f23 100644
--- a/cpu/mpc8260/u-boot.lds
+++ b/cpu/mpc8260/u-boot.lds
@@ -55,6 +55,7 @@ SECTIONS
   {
     cpu/mpc8260/start.o		(.text)
     *(.text)
+    *(.fixup)
     *(.got1)
     . = ALIGN(16);
     *(.rodata)
diff --git a/cpu/mpc83xx/config.mk b/cpu/mpc83xx/config.mk
index 2ec395d..ecf8a60 100644
--- a/cpu/mpc83xx/config.mk
+++ b/cpu/mpc83xx/config.mk
@@ -20,7 +20,7 @@
 # MA 02111-1307 USA
 #
 
-PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -mrelocatable
+PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi
 
 PLATFORM_CPPFLAGS += -DCONFIG_MPC83XX -DCONFIG_E300 \
 			-ffixed-r2 -ffixed-r29 -msoft-float
diff --git a/cpu/mpc83xx/u-boot.lds b/cpu/mpc83xx/u-boot.lds
index ca663bc..937c87a 100644
--- a/cpu/mpc83xx/u-boot.lds
+++ b/cpu/mpc83xx/u-boot.lds
@@ -52,6 +52,7 @@ SECTIONS
   {
     cpu/mpc83xx/start.o	(.text)
     *(.text)
+    *(.fixup)
     *(.got1)
     . = ALIGN(16);
     *(.rodata)
-- 
cgit v1.1


From f01320459736f156707425cf8112f98606301aa4 Mon Sep 17 00:00:00 2001
From: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Date: Sat, 27 Oct 2007 15:00:25 +0900
Subject: [MIPS] au1x00_eth.c: Fix au1x00_miiphy_{read,write} build error

au1x00_eth.c: In function 'au1x00_enet_initialize':
au1x00_eth.c:246: error: 'au1x00_miiphy_read' undeclared (first use in this function)
au1x00_eth.c:246: error: (Each undeclared identifier is reported only once
au1x00_eth.c:246: error: for each function it appears in.)
au1x00_eth.c:246: error: 'au1x00_miiphy_write' undeclared (first use in this function)
au1x00_eth.c: In function 'au1x00_miiphy_write':
au1x00_eth.c:298: warning: 'return' with no value, in function returning non-void
make[1]: *** [au1x00_eth.o] Error 1

Fixed by moving these two functions forward.

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
---
 cpu/mips/au1x00_eth.c | 118 +++++++++++++++++++++++++-------------------------
 1 file changed, 59 insertions(+), 59 deletions(-)

(limited to 'cpu')

diff --git a/cpu/mips/au1x00_eth.c b/cpu/mips/au1x00_eth.c
index b69741a..23f2f94 100644
--- a/cpu/mips/au1x00_eth.c
+++ b/cpu/mips/au1x00_eth.c
@@ -90,6 +90,65 @@ mac_fifo_t mac_fifo[NO_OF_FIFOS];
 
 #define MAX_WAIT 1000
 
+#if defined(CONFIG_CMD_MII)
+int  au1x00_miiphy_read(char *devname, unsigned char addr,
+		unsigned char reg, unsigned short * value)
+{
+	volatile u32 *mii_control_reg = (volatile u32*)(ETH0_BASE+MAC_MII_CNTRL);
+	volatile u32 *mii_data_reg = (volatile u32*)(ETH0_BASE+MAC_MII_DATA);
+	u32 mii_control;
+	unsigned int timedout = 20;
+
+	while (*mii_control_reg & MAC_MII_BUSY) {
+		udelay(1000);
+		if (--timedout == 0) {
+			printf("au1x00_eth: miiphy_read busy timeout!!\n");
+			return -1;
+		}
+	}
+
+	mii_control = MAC_SET_MII_SELECT_REG(reg) |
+		MAC_SET_MII_SELECT_PHY(addr) | MAC_MII_READ;
+
+	*mii_control_reg = mii_control;
+
+	timedout = 20;
+	while (*mii_control_reg & MAC_MII_BUSY) {
+		udelay(1000);
+		if (--timedout == 0) {
+			printf("au1x00_eth: miiphy_read busy timeout!!\n");
+			return -1;
+		}
+	}
+	*value = *mii_data_reg;
+	return 0;
+}
+
+int  au1x00_miiphy_write(char *devname, unsigned char addr,
+		unsigned char reg, unsigned short value)
+{
+	volatile u32 *mii_control_reg = (volatile u32*)(ETH0_BASE+MAC_MII_CNTRL);
+	volatile u32 *mii_data_reg = (volatile u32*)(ETH0_BASE+MAC_MII_DATA);
+	u32 mii_control;
+	unsigned int timedout = 20;
+
+	while (*mii_control_reg & MAC_MII_BUSY) {
+		udelay(1000);
+		if (--timedout == 0) {
+			printf("au1x00_eth: miiphy_write busy timeout!!\n");
+			return;
+		}
+	}
+
+	mii_control = MAC_SET_MII_SELECT_REG(reg) |
+		MAC_SET_MII_SELECT_PHY(addr) | MAC_MII_WRITE;
+
+	*mii_data_reg = value;
+	*mii_control_reg = mii_control;
+	return 0;
+}
+#endif
+
 static int au1x00_send(struct eth_device* dev, volatile void *packet, int length){
 	volatile mac_fifo_t *fifo_tx =
 		(volatile mac_fifo_t*)(MAC0_TX_DMA_ADDR+MAC_TX_BUFF0_STATUS);
@@ -249,63 +308,4 @@ int au1x00_enet_initialize(bd_t *bis){
 	return 1;
 }
 
-#if defined(CONFIG_CMD_MII)
-int  au1x00_miiphy_read(char *devname, unsigned char addr,
-		unsigned char reg, unsigned short * value)
-{
-	volatile u32 *mii_control_reg = (volatile u32*)(ETH0_BASE+MAC_MII_CNTRL);
-	volatile u32 *mii_data_reg = (volatile u32*)(ETH0_BASE+MAC_MII_DATA);
-	u32 mii_control;
-	unsigned int timedout = 20;
-
-	while (*mii_control_reg & MAC_MII_BUSY) {
-		udelay(1000);
-		if (--timedout == 0) {
-			printf("au1x00_eth: miiphy_read busy timeout!!\n");
-			return -1;
-		}
-	}
-
-	mii_control = MAC_SET_MII_SELECT_REG(reg) |
-		MAC_SET_MII_SELECT_PHY(addr) | MAC_MII_READ;
-
-	*mii_control_reg = mii_control;
-
-	timedout = 20;
-	while (*mii_control_reg & MAC_MII_BUSY) {
-		udelay(1000);
-		if (--timedout == 0) {
-			printf("au1x00_eth: miiphy_read busy timeout!!\n");
-			return -1;
-		}
-	}
-	*value = *mii_data_reg;
-	return 0;
-}
-
-int  au1x00_miiphy_write(char *devname, unsigned char addr,
-		unsigned char reg, unsigned short value)
-{
-	volatile u32 *mii_control_reg = (volatile u32*)(ETH0_BASE+MAC_MII_CNTRL);
-	volatile u32 *mii_data_reg = (volatile u32*)(ETH0_BASE+MAC_MII_DATA);
-	u32 mii_control;
-	unsigned int timedout = 20;
-
-	while (*mii_control_reg & MAC_MII_BUSY) {
-		udelay(1000);
-		if (--timedout == 0) {
-			printf("au1x00_eth: miiphy_write busy timeout!!\n");
-			return;
-		}
-	}
-
-	mii_control = MAC_SET_MII_SELECT_REG(reg) |
-		MAC_SET_MII_SELECT_PHY(addr) | MAC_MII_WRITE;
-
-	*mii_data_reg = value;
-	*mii_control_reg = mii_control;
-	return 0;
-}
-#endif
-
 #endif /* CONFIG_AU1X00 */
-- 
cgit v1.1


From 4fbd0741b2b6441da10be93e10267122581b7079 Mon Sep 17 00:00:00 2001
From: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Date: Sat, 27 Oct 2007 15:22:33 +0900
Subject: [MIPS] au1x00_eth.c: Fixed a warning on pb1000 build.

au1x00_eth.c: In function 'au1x00_miiphy_write':
au1x00_eth.c:139: warning: 'return' with no value, in function returning non-void

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
---
 cpu/mips/au1x00_eth.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'cpu')

diff --git a/cpu/mips/au1x00_eth.c b/cpu/mips/au1x00_eth.c
index 23f2f94..d70c5fe 100644
--- a/cpu/mips/au1x00_eth.c
+++ b/cpu/mips/au1x00_eth.c
@@ -136,7 +136,7 @@ int  au1x00_miiphy_write(char *devname, unsigned char addr,
 		udelay(1000);
 		if (--timedout == 0) {
 			printf("au1x00_eth: miiphy_write busy timeout!!\n");
-			return;
+			return -1;
 		}
 	}
 
-- 
cgit v1.1


From 03c031d5660ea946c39af6e2e16267da857c609f Mon Sep 17 00:00:00 2001
From: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Date: Sat, 27 Oct 2007 15:27:06 +0900
Subject: [MIPS] MIPS 4K core: Coding style cleanups

No logical changes.

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
---
 cpu/mips/cache.S | 30 +++++++++++++-----------------
 cpu/mips/cpu.c   |  6 +++---
 cpu/mips/start.S | 50 +++++++++++++++++++++++---------------------------
 3 files changed, 39 insertions(+), 47 deletions(-)

(limited to 'cpu')

diff --git a/cpu/mips/cache.S b/cpu/mips/cache.S
index aad76e0..443240e 100644
--- a/cpu/mips/cache.S
+++ b/cpu/mips/cache.S
@@ -22,7 +22,6 @@
  * MA 02111-1307 USA
  */
 
-
 #include <config.h>
 #include <version.h>
 #include <asm/regdef.h>
@@ -30,13 +29,11 @@
 #include <asm/addrspace.h>
 #include <asm/cacheops.h>
 
-
 	/* 16KB is the maximum size of instruction and data caches on
 	 * MIPS 4K.
 	 */
 #define MIPS_MAX_CACHE_SIZE	0x4000
 
-
 /*
  * cacheop macro to automate cache operations
  * first some helpers...
@@ -131,7 +128,6 @@ mips_cache_reset:
 	li	t4, CFG_CACHELINE_SIZE
 	move	t5, t4
 
-
 	li	v0, MIPS_MAX_CACHE_SIZE
 
 	/* Now clear that much memory starting from zero.
@@ -139,8 +135,8 @@ mips_cache_reset:
 
 	li	a0, KSEG1
 	addu	a1, a0, v0
-
-2:	sw	zero, 0(a0)
+2:
+	sw	zero, 0(a0)
 	sw	zero, 4(a0)
 	sw	zero, 8(a0)
 	sw	zero, 12(a0)
@@ -156,11 +152,11 @@ mips_cache_reset:
 
 	mtc0	zero, CP0_TAGLO
 
-   /*
-    * The caches are probably in an indeterminate state,
-    * so we force good parity into them by doing an
-    * invalidate, load/fill, invalidate for each line.
-    */
+	/*
+	 * The caches are probably in an indeterminate state,
+	 * so we force good parity into them by doing an
+	 * invalidate, load/fill, invalidate for each line.
+	 */
 
 	/* Assume bottom of RAM will generate good parity for the cache.
 	 */
@@ -201,9 +197,9 @@ mips_cache_reset:
 	move	a1, a2
 	icacheop(a0,a1,a2,a3,Index_Store_Tag_D)
 
-	j  ra
-	.end  mips_cache_reset
+	j	ra
 
+	.end	mips_cache_reset
 
 /*******************************************************************************
 *
@@ -220,7 +216,7 @@ dcache_status:
 	andi	v0, v0, 1
 	j	ra
 
-	.end  dcache_status
+	.end	dcache_status
 
 /*******************************************************************************
 *
@@ -237,11 +233,10 @@ dcache_disable:
 	li	t1, -8
 	and	t0, t0, t1
 	ori	t0, t0, CONF_CM_UNCACHED
-	mtc0    t0, CP0_CONFIG
+	mtc0	t0, CP0_CONFIG
 	j	ra
 
-	.end  dcache_disable
-
+	.end	dcache_disable
 
 /*******************************************************************************
 *
@@ -266,4 +261,5 @@ mips_cache_lock:
 	icacheop(a0,a1,a2,a3,0x1d)
 
 	j	ra
+
 	.end	mips_cache_lock
diff --git a/cpu/mips/cpu.c b/cpu/mips/cpu.c
index f48675e..7559ac6 100644
--- a/cpu/mips/cpu.c
+++ b/cpu/mips/cpu.c
@@ -39,12 +39,12 @@ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	return 0;
 }
 
-void flush_cache (ulong start_addr, ulong size)
+void flush_cache(ulong start_addr, ulong size)
 {
-
 }
 
-void write_one_tlb( int index, u32 pagemask, u32 hi, u32 low0, u32 low1 ){
+void write_one_tlb(int index, u32 pagemask, u32 hi, u32 low0, u32 low1)
+{
 	write_32bit_cp0_register(CP0_ENTRYLO0, low0);
 	write_32bit_cp0_register(CP0_PAGEMASK, pagemask);
 	write_32bit_cp0_register(CP0_ENTRYLO1, low1);
diff --git a/cpu/mips/start.S b/cpu/mips/start.S
index 074d01d..5a278b6 100644
--- a/cpu/mips/start.S
+++ b/cpu/mips/start.S
@@ -22,13 +22,11 @@
  * MA 02111-1307 USA
  */
 
-
 #include <config.h>
 #include <version.h>
 #include <asm/regdef.h>
 #include <asm/mipsregs.h>
 
-
 #define RVECENT(f,n) \
    b f; nop
 #define XVECENT(f,bev) \
@@ -192,7 +190,7 @@ _start:
 	.word	0x00000000
 	.word	0x03e00008
 	.word	0x00000000
-	.word   0x00000000
+	.word	0x00000000
 /* 0xbfc00428 */
 	.word	0xdc870000
 	.word	0xfca70000
@@ -203,7 +201,7 @@ _start:
 	.word	0x00000000
 	.word	0x03e00008
 	.word	0x00000000
-	.word   0x00000000
+	.word	0x00000000
 #endif /* CONFIG_PURPLE */
 	.align 4
 reset:
@@ -235,33 +233,33 @@ reset:
 	mtc0	t0, CP0_CONFIG
 
 	/* Initialize $gp.
-	*/
-	bal     1f
+	 */
+	bal	1f
 	nop
 	.word	_gp
-	1:
-	move    gp, ra
-	lw      t1, 0(ra)
+1:
+	move	gp, ra
+	lw	t1, 0(ra)
 	move	gp, t1
 
 #ifdef CONFIG_INCA_IP
 	/* Disable INCA-IP Watchdog.
 	 */
-	la      t9, disable_incaip_wdt
-	jalr    t9
+	la	t9, disable_incaip_wdt
+	jalr	t9
 	nop
 #endif
 
 	/* Initialize any external memory.
 	 */
-	la      t9, lowlevel_init
-	jalr    t9
+	la	t9, lowlevel_init
+	jalr	t9
 	nop
 
 	/* Initialize caches...
 	 */
-	la      t9, mips_cache_reset
-	jalr    t9
+	la	t9, mips_cache_reset
+	jalr	t9
 	nop
 
 	/* ... and enable them.
@@ -269,12 +267,11 @@ reset:
 	li	t0, CONF_CM_CACHABLE_NONCOHERENT
 	mtc0	t0, CP0_CONFIG
 
-
 	/* Set up temporary stack.
 	 */
 	li	a0, CFG_INIT_SP_OFFSET
-	la      t9, mips_cache_lock
-	jalr    t9
+	la	t9, mips_cache_lock
+	jalr	t9
 	nop
 
 	li	t0, CFG_SDRAM_BASE + CFG_INIT_SP_OFFSET
@@ -284,7 +281,6 @@ reset:
 	j	t9
 	nop
 
-
 /*
  * void relocate_code (addr_sp, gd, addr_moni)
  *
@@ -298,7 +294,7 @@ reset:
 	.globl	relocate_code
 	.ent	relocate_code
 relocate_code:
-	move	sp, a0		/* Set new stack pointer		*/
+	move	sp, a0		/* Set new stack pointer	*/
 
 	li	t0, CFG_MONITOR_BASE
 	la	t3, in_ram
@@ -312,8 +308,8 @@ relocate_code:
 	 */
 	move	t6, gp
 	sub	gp, CFG_MONITOR_BASE
-	add	gp, a2			/* gp now adjusted		*/
-	sub	t6, gp, t6		/* t6 <-- relocation offset	*/
+	add	gp, a2		/* gp now adjusted		*/
+	sub	t6, gp, t6	/* t6 <-- relocation offset	*/
 
 	/*
 	 * t0 = source address
@@ -329,7 +325,7 @@ relocate_code:
 	sw	t3, 0(t1)
 	addu	t0, 4
 	ble	t0, t2, 1b
-	addu	t1, 4			/* delay slot			*/
+	addu	t1, 4		/* delay slot			*/
 #endif
 
 	/* If caches were enabled, we would have to flush them here.
@@ -376,7 +372,8 @@ in_ram:
 	add	t2, t6
 
 	sub	t1, 4
-1:	addi	t1, 4
+1:
+	addi	t1, 4
 	bltl	t1, t2, 1b
 	sw	zero, 0(t1)	/* delay slot			*/
 
@@ -387,11 +384,10 @@ in_ram:
 
 	.end	relocate_code
 
-
 	/* Exception handlers.
 	 */
 romReserved:
-	b romReserved
+	b	romReserved
 
 romExcHandle:
-	b romExcHandle
+	b	romExcHandle
-- 
cgit v1.1


From 16664f72850846e645616da1c0fa5afcd6d15f15 Mon Sep 17 00:00:00 2001
From: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Date: Sat, 17 Nov 2007 20:05:26 +0900
Subject: [MIPS] Remove useless instructions for initializing $gp.

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
---
 cpu/mips/start.S | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

(limited to 'cpu')

diff --git a/cpu/mips/start.S b/cpu/mips/start.S
index 5a278b6..c92b162 100644
--- a/cpu/mips/start.S
+++ b/cpu/mips/start.S
@@ -238,9 +238,7 @@ reset:
 	nop
 	.word	_gp
 1:
-	move	gp, ra
-	lw	t1, 0(ra)
-	move	gp, t1
+	lw	gp, 0(ra)
 
 #ifdef CONFIG_INCA_IP
 	/* Disable INCA-IP Watchdog.
-- 
cgit v1.1


From 7e1d884b7cb602007329c517ec1c453e3a6a5d9c Mon Sep 17 00:00:00 2001
From: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Date: Sat, 17 Nov 2007 20:05:26 +0900
Subject: [MIPS] cpu/mips/config.mk: Fix GNU assembler minor version picker

Current trick to pick up GNU assembler minor version does not work with the
latest binutils (2007-03-01 or later) due to ${PKGVERSION} now default to
"(GNU Binutils) ".

  $ sde-as --version |grep "GNU assembler"
  GNU assembler 2.15.94 mipssde-6.02.02-20050602
  $ sde-as --version |grep "GNU assembler" |awk '{print $3}'
  2.15.94
  $ sde-as --version |grep "GNU assembler" |awk '{print $3}' |awk -F. '{print $2}'
  15
  $

  $ mips-linux-as --version |grep "GNU assembler"
  GNU assembler (GNU Binutils) 2.18
  $ mips-linux-as --version |grep "GNU assembler" |awk '{print $3}'
  (GNU
  $ mips-linux-as --version |grep "GNU assembler" |awk '{print $3}' |awk -F. '{print $2}'
  (no output)
  $

As a result of above, you'll see many noises with such binutils:

  make -C cpu/mips/
  /bin/sh: line 0: [: : integer expression expected
  /bin/sh: line 0: [: : integer expression expected
  make[1]: Entering directory `/home/skuribay/devel/u-boot.git/cpu/mips'
  mips-linux-gcc  -D__ASSEMBLY__ -g  -Os   -D__KERNEL__ -DTEXT_BASE=0xB0000000  -I/home/skuribay/devel/u-boot.git/include -fno-builtin -ffreestanding -nostdinc -isystem /home/skuribay/devel/buildroot/build_mips/staging_dir/usr/bin/../lib/gcc/mips-linux-uclibc/4.2.1/include -pipe  -DCONFIG_MIPS -D__MIPS__ -G 0 -mabicalls -fpic -pipe -msoft-float -march=4kc -mtune=4kc -EB -c -o incaip_wdt.o incaip_wdt.S
  /bin/sh: line 0: [: : integer expression expected
  mips-linux-gcc  -D__ASSEMBLY__ -g  -Os   -D__KERNEL__ -DTEXT_BASE=0xB0000000  -I/home/skuribay/devel/u-boot.git/include -fno-builtin -ffreestanding -nostdinc -isystem /home/skuribay/devel/buildroot/build_mips/staging_dir/usr/bin/../lib/gcc/mips-linux-uclibc/4.2.1/include -pipe  -DCONFIG_MIPS -D__MIPS__ -G 0 -mabicalls -fpic -pipe -msoft-float -march=4kc -mtune=4kc -EB -c -o cache.o cache.S
  /bin/sh: line 0: [: : integer expression expected
  mips-linux-gcc -g  -Os   -D__KERNEL__ -DTEXT_BASE=0xB0000000  -I/home/skuribay/devel/u-boot.git/include -fno-builtin -ffreestanding -nostdinc -isystem /home/skuribay/devel/buildroot/build_mips/staging_dir/usr/bin/../lib/gcc/mips-linux-uclibc/4.2.1/include -pipe  -DCONFIG_MIPS -D__MIPS__ -G 0 -mabicalls -fpic -pipe -msoft-float -march=4kc -mtune=4kc -EB -Wall -Wstrict-prototypes -c -o asc_serial.o asc_serial.c
  /bin/sh: line 0: [: : integer expression expected

This patch simplifies the trick and makes it work with both versions of gas.
I also replace an expensive `awk (or gawk)' with `cut'.

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
---
 cpu/mips/config.mk | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

(limited to 'cpu')

diff --git a/cpu/mips/config.mk b/cpu/mips/config.mk
index 487c4eb..ad03bd6 100644
--- a/cpu/mips/config.mk
+++ b/cpu/mips/config.mk
@@ -20,8 +20,7 @@
 # Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 # MA 02111-1307 USA
 #
-v=$(shell \
-$(CROSS_COMPILE)as --version|grep "GNU assembler"|awk '{print $$3}'|awk -F . '{print $$2}')
+v=$(shell $(AS) --version |grep "GNU assembler" |cut -d. -f2)
 MIPSFLAGS=$(shell \
 if [ "$v" -lt "14" ]; then \
 	echo "-mcpu=4kc"; \
-- 
cgit v1.1


From 409ecdc0bb47dd28b0af6c25ffd658d22cc36b37 Mon Sep 17 00:00:00 2001
From: Wolfgang Denk <wd@denx.de>
Date: Sun, 18 Nov 2007 16:36:27 +0100
Subject: Fix compiler warnings for PPC systems. Update CHANGELOG.

Signed-off-by: Wolfgang Denk <wd@denx.de>
---
 cpu/mpc86xx/spd_sdram.c | 4 +++-
 cpu/mpc86xx/speed.c     | 3 +++
 2 files changed, 6 insertions(+), 1 deletion(-)

(limited to 'cpu')

diff --git a/cpu/mpc86xx/spd_sdram.c b/cpu/mpc86xx/spd_sdram.c
index d57bcdf..265e033 100644
--- a/cpu/mpc86xx/spd_sdram.c
+++ b/cpu/mpc86xx/spd_sdram.c
@@ -1114,8 +1114,10 @@ spd_sdram(void)
 	int memsize_ddr1 = 0;
 	unsigned int law_size_ddr1;
 	volatile immap_t *immap = (immap_t *)CFG_IMMR;
-	volatile ccsr_ddr_t *ddr1 = &immap->im_ddr1;
 	volatile ccsr_local_mcm_t *mcm = &immap->im_local_mcm;
+#ifdef CONFIG_DDR_INTERLEAVE
+	volatile ccsr_ddr_t *ddr1 = &immap->im_ddr1;
+#endif
 
 #if (CONFIG_NUM_DDR_CONTROLLERS > 1)
 	int memsize_ddr2_dimm1 = 0;
diff --git a/cpu/mpc86xx/speed.c b/cpu/mpc86xx/speed.c
index 23161ca..4f7e8f1 100644
--- a/cpu/mpc86xx/speed.c
+++ b/cpu/mpc86xx/speed.c
@@ -31,6 +31,9 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+/* used in some defintiions of CONFIG_SYS_CLK_FREQ */
+extern unsigned long get_board_sys_clk(unsigned long dummy);
+
 void get_sys_info(sys_info_t *sysInfo)
 {
 	volatile immap_t *immap = (immap_t *) CFG_IMMR;
-- 
cgit v1.1


From 8412d814ce8bf5570a2b747f1e7fd321097fe987 Mon Sep 17 00:00:00 2001
From: Wolfgang Denk <wd@denx.de>
Date: Sun, 18 Nov 2007 17:11:09 +0100
Subject: Fix compiler warnings for ARM systems.

Signed-off-by: Wolfgang Denk <wd@denx.de>
---
 cpu/pxa/i2c.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'cpu')

diff --git a/cpu/pxa/i2c.c b/cpu/pxa/i2c.c
index 722d949..92dd19f 100644
--- a/cpu/pxa/i2c.c
+++ b/cpu/pxa/i2c.c
@@ -457,7 +457,7 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
 
 uchar i2c_reg_read (uchar chip, uchar reg)
 {
-	char buf;
+	uchar buf;
 
 	PRINTD(("i2c_reg_read(chip=0x%02x, reg=0x%02x)\n",chip,reg));
 	i2c_read(chip, reg, 1, &buf, 1);
-- 
cgit v1.1


From 6bf4c686afca1e86e1c384d59218f914605713bf Mon Sep 17 00:00:00 2001
From: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Date: Sun, 18 Nov 2007 18:36:11 +0100
Subject: s3c24x0: Fix usb_ohci.c missing in Makefile and usb_ohci.c warning
 differ in signedness

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
---
 cpu/arm920t/s3c24x0/Makefile   |  2 +-
 cpu/arm920t/s3c24x0/usb_ohci.c | 14 +++++++-------
 2 files changed, 8 insertions(+), 8 deletions(-)

(limited to 'cpu')

diff --git a/cpu/arm920t/s3c24x0/Makefile b/cpu/arm920t/s3c24x0/Makefile
index 0ff36c5..1ed9bf3 100644
--- a/cpu/arm920t/s3c24x0/Makefile
+++ b/cpu/arm920t/s3c24x0/Makefile
@@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk
 LIB	= $(obj)lib$(SOC).a
 
 COBJS	= i2c.o interrupts.o serial.o speed.o \
-	  usb.o
+	  usb.o usb_ohci.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
diff --git a/cpu/arm920t/s3c24x0/usb_ohci.c b/cpu/arm920t/s3c24x0/usb_ohci.c
index 869ca79..4075f2e 100644
--- a/cpu/arm920t/s3c24x0/usb_ohci.c
+++ b/cpu/arm920t/s3c24x0/usb_ohci.c
@@ -498,7 +498,7 @@ static int ep_link (ohci_t *ohci, ed_t *edi)
 		if (ohci->ed_controltail == NULL) {
 			writel (ed, &ohci->regs->ed_controlhead);
 		} else {
-			ohci->ed_controltail->hwNextED = m32_swap (ed);
+			ohci->ed_controltail->hwNextED = (__u32)m32_swap (ed);
 		}
 		ed->ed_prev = ohci->ed_controltail;
 		if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
@@ -514,7 +514,7 @@ static int ep_link (ohci_t *ohci, ed_t *edi)
 		if (ohci->ed_bulktail == NULL) {
 			writel (ed, &ohci->regs->ed_bulkhead);
 		} else {
-			ohci->ed_bulktail->hwNextED = m32_swap (ed);
+			ohci->ed_bulktail->hwNextED = (__u32)m32_swap (ed);
 		}
 		ed->ed_prev = ohci->ed_bulktail;
 		if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
@@ -606,7 +606,7 @@ static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe)
 		ed->hwINFO = m32_swap (OHCI_ED_SKIP); /* skip ed */
 		/* dummy td; end of td list for ed */
 		td = td_alloc (usb_dev);
-		ed->hwTailP = m32_swap (td);
+		ed->hwTailP = (__u32)m32_swap (td);
 		ed->hwHeadP = ed->hwTailP;
 		ed->state = ED_UNLINK;
 		ed->type = usb_pipetype (pipe);
@@ -663,13 +663,13 @@ static void td_fill (ohci_t *ohci, unsigned int info,
 	if (!len)
 		data = 0;
 
-	td->hwINFO = m32_swap (info);
-	td->hwCBP = m32_swap (data);
+	td->hwINFO = (__u32)m32_swap (info);
+	td->hwCBP = (__u32)m32_swap (data);
 	if (data)
-		td->hwBE = m32_swap (data + len - 1);
+		td->hwBE = (__u32)m32_swap (data + len - 1);
 	else
 		td->hwBE = 0;
-	td->hwNextTD = m32_swap (td_pt);
+	td->hwNextTD = (__u32)m32_swap (td_pt);
 
 	/* append to queue */
 	td->ed->hwTailP = td->hwNextTD;
-- 
cgit v1.1