From 6876609446980c3055bbd32c195a63330e21d8e6 Mon Sep 17 00:00:00 2001 From: wdenk Date: Thu, 29 Jan 2004 09:22:58 +0000 Subject: * Implement adaptive SDRAM timing configuration based on actual CPU clock frequency for INCA-IP; fix problem with board hanging when switching from 150MHz to 100MHz * Add PCMCIA CS support for BMS2003 board --- cpu/mips/incaip_clock.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'cpu') diff --git a/cpu/mips/incaip_clock.c b/cpu/mips/incaip_clock.c index 9f32759..65ee847 100644 --- a/cpu/mips/incaip_clock.c +++ b/cpu/mips/incaip_clock.c @@ -101,13 +101,15 @@ int incaip_set_cpuclk (void) { extern void ebu_init(long); extern void cgu_init(long); + extern void sdram_init(long); uchar tmp[64]; ulong cpuclk; if (getenv_r ("cpuclk", tmp, sizeof (tmp)) > 0) { cpuclk = simple_strtoul (tmp, NULL, 10) * 1000000; - ebu_init (cpuclk); cgu_init (cpuclk); + ebu_init (cpuclk); + sdram_init (cpuclk); } return 0; -- cgit v1.1