From 4a5517094dd30bb1f271403b62e23053301668e6 Mon Sep 17 00:00:00 2001 From: wdenk Date: Wed, 8 Oct 2003 23:26:14 +0000 Subject: * Patch by Scott McNutt, 04 Oct 2003: - add support for Altera Nios-32 CPU - add support for Nios Cyclone Development Kit (DK-1C20) * Patch by Steven Scholz, 29 Sep 2003: - A second parameter for bootm overwrites the load address for "Standalone Application" images. - bootm sets environment variable "filesize" to the resulting (uncompressed) data length for "Standalone Application" images when autostart is set to "no". Now you can do something like if bootm $fpgadata $some_free_ram ; then fpga load 0 $some_free_ram $filesize fi * Patch by Denis Peter, 25 Sept 2003: add support for the MIP405 Rev. C board --- cpu/nios/Makefile | 44 ++++ cpu/nios/config.mk | 25 +++ cpu/nios/cpu.c | 78 +++++++ cpu/nios/interrupts.c | 184 +++++++++++++++++ cpu/nios/serial.c | 86 ++++++++ cpu/nios/start.S | 186 +++++++++++++++++ cpu/nios/traps.S | 559 ++++++++++++++++++++++++++++++++++++++++++++++++++ 7 files changed, 1162 insertions(+) create mode 100644 cpu/nios/Makefile create mode 100644 cpu/nios/config.mk create mode 100644 cpu/nios/cpu.c create mode 100644 cpu/nios/interrupts.c create mode 100644 cpu/nios/serial.c create mode 100644 cpu/nios/start.S create mode 100644 cpu/nios/traps.S (limited to 'cpu') diff --git a/cpu/nios/Makefile b/cpu/nios/Makefile new file mode 100644 index 0000000..baf752f --- /dev/null +++ b/cpu/nios/Makefile @@ -0,0 +1,44 @@ +# +# (C) Copyright 2000 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = lib$(CPU).a + +START = start.o +AOBJS = traps.o +OBJS = cpu.o interrupts.o serial.o + +all: .depend $(START) $(LIB) + +$(LIB): $(OBJS) $(AOBJS) + $(AR) crv $@ $(OBJS) $(AOBJS) + +######################################################################### + +.depend: Makefile $(START:.o=.S) $(OBJS:.o=.c) $(AOBJS:.o=.S) + $(CC) -M $(CFLAGS) $(START:.o=.S) $(OBJS:.o=.c) $(AOBJS:.o=.S) > $@ + +sinclude .depend + +######################################################################### diff --git a/cpu/nios/config.mk b/cpu/nios/config.mk new file mode 100644 index 0000000..9e95a0c --- /dev/null +++ b/cpu/nios/config.mk @@ -0,0 +1,25 @@ +# +# (C) Copyright 2000 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +PLATFORM_RELFLAGS += + diff --git a/cpu/nios/cpu.c b/cpu/nios/cpu.c new file mode 100644 index 0000000..5cf1883 --- /dev/null +++ b/cpu/nios/cpu.c @@ -0,0 +1,78 @@ +/* + * (C) Copyright 2003, Psyent Corporation + * Scott McNutt + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include + + +int checkcpu (void) +{ + unsigned val; + unsigned rev_major; + unsigned rev_minor; + short nregs, hi_limit, lo_limit; + + /* Get cpu version info */ + val = rdctl (CTL_CPU_ID); + printf ("CPU: "); + printf ("%s", (val & 0x00008000) ? "Nios-16 " : "Nios-32 "); + rev_major = (val>>12) & 0x07; + rev_minor = val & 0x0f; + printf ("Rev. %d.%02d (0x%04x)", rev_major, rev_minor, + val & 0xffff); + if (rev_major == 0x08) + printf (" [OpenCore (R) Plus]"); + printf ("\n"); + + /* Check register file */ + val = rdctl (CTL_WVALID); + lo_limit = val & 0x01f; + hi_limit = (val>>5) & 0x1f; + nregs = (hi_limit + 2) * 16; + printf ("Reg file size: %d LO_LIMIT/HI_LIMIT: %d/%d\n", + nregs, lo_limit, hi_limit); + + return (0); +} + + +int do_reset (void) +{ + /* trap 0 does the trick ... at least with the OCI debug + * present -- haven't tested without it yet (stm). + */ + disable_interrupts (); + ipri (1); + asm volatile ("trap 0\n"); + + /* No return ;-) */ + + return(0); +} + + +#if defined(CONFIG_WATCHDOG) +void watchdog_reset (void) +{ +} +#endif /* CONFIG_WATCHDOG */ diff --git a/cpu/nios/interrupts.c b/cpu/nios/interrupts.c new file mode 100644 index 0000000..981b8f7 --- /dev/null +++ b/cpu/nios/interrupts.c @@ -0,0 +1,184 @@ +/* + * (C) Copyright 2000-2002 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * (C) Copyright 2003, Psyent Corporation + * Scott McNutt + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + + +#include +#include +#include +#include +#include + +/****************************************************************************/ + +struct irq_action { + interrupt_handler_t *handler; + void *arg; + int count; +}; + +static struct irq_action irq_vecs[64]; + +/*************************************************************************/ +volatile ulong timestamp = 0; + +void reset_timer (void) +{ + timestamp = 0; +} + +ulong get_timer (ulong base) +{ + return (timestamp - base); +} + +void set_timer (ulong t) +{ + timestamp = t; +} + + +/* The board must handle this interrupt if a timer is not + * provided. + */ +#if defined(CFG_NIOS_TMRBASE) +void timer_interrupt (struct pt_regs *regs) +{ + /* Interrupt is cleared by writing anything to the + * status register. + */ + nios_timer_t *tmr = (nios_timer_t *)CFG_NIOS_TMRBASE; + tmr->status = 0; + timestamp += CFG_NIOS_TMRMS; +} +#endif + +/*************************************************************************/ +int disable_interrupts (void) +{ + int val = 0; + + /* Writing anything to CLR_IE disables interrupts */ + val = rdctl (CTL_STATUS); + wrctl (CTL_CLR_IE, 0); + return (val & STATUS_IE); +} + +void enable_interrupts( void ) +{ + /* Writing anything SET_IE enables interrupts */ + wrctl (CTL_SET_IE, 0); +} + +void external_interrupt (struct pt_regs *regs) +{ + unsigned vec; + + vec = (regs->status & STATUS_IPRI) >> 9; /* ipri */ + + irq_vecs[vec].count++; + if (irq_vecs[vec].handler != NULL) { + (*irq_vecs[vec].handler)(irq_vecs[vec].arg); + } else { + /* A sad side-effect of masking a bogus interrupt is + * that lower priority interrupts will also be disabled. + * This is probably not what we want ... so hang insted. + */ + printf ("Unhandled interrupt: 0x%x\n", vec); + disable_interrupts (); + hang (); + } +} + +/*************************************************************************/ +int interrupt_init (void) +{ + int vec; + +#if defined(CFG_NIOS_TMRBASE) + nios_timer_t *tmr = (nios_timer_t *)CFG_NIOS_TMRBASE; + + tmr->control &= ~NIOS_TIMER_ITO; + tmr->control |= NIOS_TIMER_STOP; +#endif + + for (vec=0; vec<64; vec++ ) { + irq_vecs[vec].handler = NULL; + irq_vecs[vec].arg = NULL; + irq_vecs[vec].count = 0; + } + + /* Need timus interruptus -- start the lopri timer */ +#if defined(CFG_NIOS_TMRBASE) + tmr->control |= ( NIOS_TIMER_ITO | + NIOS_TIMER_CONT | + NIOS_TIMER_START ); + ipri (CFG_NIOS_TMRIRQ + 1); +#endif + enable_interrupts (); + return (0); +} + +void irq_install_handler (int vec, interrupt_handler_t *handler, void *arg) +{ + struct irq_action *irqa = irq_vecs; + int i = vec; + int flag; + + if (irqa[i].handler != NULL) { + printf ("Interrupt vector %d: handler 0x%x " + "replacing 0x%x\n", + vec, (uint)handler, (uint)irqa[i].handler); + } + + flag = disable_interrupts (); + irqa[i].handler = handler; + irqa[i].arg = arg; + if (flag ) + enable_interrupts (); +} + +/*************************************************************************/ +#if (CONFIG_COMMANDS & CFG_CMD_IRQ) +int do_irqinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + int vec; + + printf ("\nInterrupt-Information:\n"); + printf ("Nr Routine Arg CouIt's ok to cnt\n"); + + for (vec=0; vec<64; vec++) { + if (irq_vecs[vec].handler != NULL) { + printf ("%02d %08lx %08lx %d\n", + vec, + (ulong)irq_vecs[vec].handler<<1, + (ulong)irq_vecs[vec].arg, + irq_vecs[vec].count); + } + } + + return (0); +} +#endif /* CONFIG_COMMANDS & CFG_CMD_IRQ */ diff --git a/cpu/nios/serial.c b/cpu/nios/serial.c new file mode 100644 index 0000000..61b26ab --- /dev/null +++ b/cpu/nios/serial.c @@ -0,0 +1,86 @@ +/* + * (C) Copyright 2003, Psyent Corporation + * Scott McNutt + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + + +#include +#include + + +static nios_uart_t *uart = (nios_uart_t *)CFG_NIOS_CONSOLE; + +#if defined(CFG_NIOS_FIXEDBAUD) + +/* Everything's already setup for fixed-baud PTF + * assignment + */ +void serial_setbrg( void ){ return; } +int serial_init( void ) { return(0);} + +#else + +void serial_setbrg( void ) +{ + DECLARE_GLOBAL_DATA_PTR; + unsigned div; + + div = (CONFIG_SYS_CLK_FREQ/gd->baudrate)-1; + uart->divisor = div; + return; +} + +int serial_init( void ) +{ + serial_setbrg(); + return(0); +} + +#endif /* CFG_NIOS_FIXEDBAUD */ + + +void serial_putc( char c ) +{ + if (c == '\n') + serial_putc('\r'); + while( (uart->status & NIOS_UART_TRDY) == 0 ) + ; + uart->txdata = (unsigned char)c; +} + +void serial_puts( const char *s ) +{ + while( *s != 0 ) { + serial_putc( *s++ ); + } +} + +int serial_tstc( void ) +{ + return( uart->status & NIOS_UART_RRDY); +} + +int serial_getc( void ) +{ + while( serial_tstc() == 0 ) + ; + return( uart->rxdata & 0x00ff ); +} diff --git a/cpu/nios/start.S b/cpu/nios/start.S new file mode 100644 index 0000000..7cbd1a7 --- /dev/null +++ b/cpu/nios/start.S @@ -0,0 +1,186 @@ +/* + * (C) Copyright 2003, Psyent Corporation + * Scott McNutt + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + + +#include +#include + +#if !defined(CONFIG_IDENT_STRING) +#define CONFIG_IDENT_STRING "" +#endif + +#define STATUS_INIT 0x8600 /* IE=1, IPRI=2 */ + +/************************************************************************* + * RESTART + ************************************************************************/ + + .text + .global _start + +_start: + bsr 0f + nop + .long _start + + /* GERMS -- The "standard-32" configuration GERMS monitor looks + * for the string "Nios" at flash_base + 0xc (actually it only + * tests for 'N', 'i'). You can leave support for this in place + * as it's only a few words. + */ + . = _start + 0x000c + .string "Nios" + + .align 4 +0: + /* + * Early setup -- set cwp = HI_LIMIT, IPRI = 2, IE = 1 to + * enable underflow exceptions. Disable cache. + * NOTE: %o7 has return addr -- save in %g7 use later. + */ + mov %g7, %o7 + + pfx 2 /* WVALID */ + rdctl %g0 + lsri %g0, 1 + pfx %hi(STATUS_INIT) + or %g0, %lo(STATUS_INIT) + wrctl %g0 /* update status */ + nop + + /* + * STACK + */ + pfx %hi(CFG_INIT_SP) + movi %sp, %lo(CFG_INIT_SP) + pfx %xhi(CFG_INIT_SP) + movhi %sp, %xlo(CFG_INIT_SP) + mov %fp, %sp + + pfx %hi(4*16) + subi %sp, %lo(4*16) /* Space for reg window mgmt */ + + /* + * RELOCATE -- %g7 has return addr from bsr at _start. + */ + pfx %hi(__u_boot_cmd_end) + movi %g5, %lo(__u_boot_cmd_end) + pfx %xhi(__u_boot_cmd_end) + movhi %g5, %xlo(__u_boot_cmd_end) /* %g5 <- end address */ + + lsli %g7, 1 /* mem = retaddr << 1 */ + mov %g6, %g7 + subi %g6, 4 /* %g6 <- src addr */ + ld %g7, [%g7] /* %g7 <- dst addr */ + +1: cmp %g7, %g5 + skps cc_nz + br 2f + nop /* delay slot */ + + ld %g0, [%g6] + addi %g6, 4 /* src++ */ + st [%g7], %g0 + addi %g7, 4 /* dst++ */ + br 1b + nop /* delay slot */ +2: + + /* + * Jump to relocation address + */ + pfx %hi(reloc@h) + movi %g0, %lo(reloc@h) + pfx %xhi(reloc@h) + movhi %g0, %xlo(reloc@h) + jmp %g0 +reloc: + + /* + * CLEAR BSS + */ + pfx %hi(__bss_end) + movi %g5, %lo(__bss_end) + pfx %xhi(__bss_end) + movhi %g5, %xlo(__bss_end) /* %g5 <- end address */ + pfx %hi(__bss_start) + movi %g7, %lo(__bss_start) + pfx %xhi(__bss_start) + movhi %g7, %xlo(__bss_start) /* %g7 <- end address */ + + movi %g0, 0 +3: cmp %g7, %g5 + skps cc_nz + br 4f + nop /* delay slot */ + + st [%g7], %g0 + addi %g7, 4 /* (delay slot) dst++ */ + br 3b + nop /* delay slot */ +4: + + /* + * Call board_init -- never returns + */ + pfx %hi(board_init@h) + movi %g1, %lo(board_init@h) + pfx %xhi(board_init@h) + movhi %g1, %xlo(board_init@h) + call %g1 + nop /* Delaly slot */ + /* NEVER RETURNS */ + +/* + * dly_clks -- Nios doesn't have a time/clk reference for simple + * delay loops, so we do our best by counting instruction cycles. + * A control register that counts system clock cycles would be + * a handy feature -- hint for Altera ;-) + */ + .globl dly_clks + /* Each loop is 4 instructions as delay slot is always + * executed. Each instruction is approximately 4 clocks + * (according to some lame info from Altera). So ... + * ... each loop is about 16 clocks. + */ + +dly_clks: + lsri %o0, 4 /* cnt/16 */ + +8: skprnz %o0 + br 9f + subi %o0, 1 /* cnt--, Delay slot */ + br 8b + nop + +9: lret + nop /* Delay slot */ + + + .data + .globl version_string + +version_string: + .ascii U_BOOT_VERSION + .ascii " (", __DATE__, " - ", __TIME__, ")" + .ascii CONFIG_IDENT_STRING, "\0" diff --git a/cpu/nios/traps.S b/cpu/nios/traps.S new file mode 100644 index 0000000..655fc63 --- /dev/null +++ b/cpu/nios/traps.S @@ -0,0 +1,559 @@ +/* + * (C) Copyright 2003, Psyent Corporation + * Scott McNutt + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include + +/************************************************************************* + * Register window underflow + * + * The register window underflow exception occurs whenever the lowest + * valid register window is in use (CWP=LO_LIMIT) and a save instruction + * is issued. The save moves CWP below LO_LIMIT, %sp is set as normal, + * then the exception is generated prior to executing the instruction + * after the save. + ************************************************************************/ + .text + .global _cwp_lolimit + .align 4 + +_cwp_lolimit: + + /* Sixteen words are always allocated by the compiler in every + * procedure's stack frame, always starting at %sp, for saving + * 'in' and 'local' registers on a window overflow. + * + * Save the 'global' and 'in' regs on stack. They are restored + * at cwp = HI_LIMIT. The 'local' regs aren't in-use at this point. + */ + sts [%sp,0], %g0 /* Save 'global' regs*/ + sts [%sp,1], %g1 + sts [%sp,2], %g2 + sts [%sp,3], %g3 + sts [%sp,4], %g4 + sts [%sp,5], %g5 + sts [%sp,6], %g6 + sts [%sp,7], %g7 + + sts [%sp,8], %i0 /* Save 'in' regs */ + sts [%sp,9], %i1 + sts [%sp,10], %i2 + sts [%sp,11], %i3 + sts [%sp,12], %i4 + sts [%sp,13], %i5 + sts [%sp,14], %i6 + sts [%sp,15], %i7 + + /* Save current %sp and return address in a global so they are + * available at cwp = HI_LIMIT ... where the 'global'/'in' regs + * are restored. NOTE: %sp changes with cwp. + */ + mov %g7, %o7 + mov %g6, %sp + + /* Get LO_LIMIT/HI_LIMIT to know where to start & stop. Note: in + * the underflow exception, cwp is __NOT__ guaranteed to be zero. + * If the OCI debug module is enabled the reset value for LO_LIMIT + * is 2, not 1 -- so cwp can be 1 or 0. + */ + pfx 2 /* WVALID */ + rdctl %g1 + mov %g2, %g1 + pfx 0 + and %g1, 0x1f /* g1 <- LO_LIMIT */ + lsri %g2, 5 + pfx 0 + and %g2,0x1f /* g2 <- HI_LIMIT */ + + /* Set istatus so cwp = HI_LIMIT after tret + */ + movi %g5, 0x1f + lsli %g5, 4 + not %g5 /* mask to clr cwp */ + pfx 1 /* istatus */ + rdctl %g0 + and %g0, %g5 /* clear cwp field */ + + mov %g4, %g2 + lsli %g4, 4 + or %g0, %g4 /* cwp = HI_LIMIT */ + pfx 1 + wrctl %g0 /* update istatus */ + + /* Now move up the register file, saving as we go. When loop + * is first entered, %g1 is at LO_LIMIT. + */ +0: + restore /* cwp++ */ + sts [%sp,0], %l0 /* Save "local" regs*/ + sts [%sp,1], %l1 + sts [%sp,2], %l2 + sts [%sp,3], %l3 + sts [%sp,4], %l4 + sts [%sp,5], %l5 + sts [%sp,6], %l6 + sts [%sp,7], %l7 + + sts [%sp,8], %i0 /* Save 'in' regs */ + sts [%sp,9], %i1 + sts [%sp,10], %i2 + sts [%sp,11], %i3 + sts [%sp,12], %i4 + sts [%sp,13], %i5 + sts [%sp,14], %i6 + sts [%sp,15], %i7 + + cmp %g1, %g2 /* cwp == HI_LIMIT ? */ + skps cc_ne /* if so, we're done */ + br 1f + nop /* delay slot */ + + inc %g1 /* g1 <- cwp++ */ + br 0b + nop /* delay slot */ + + /* At this point cwp = HI_LIMIT, so the global/in regs that were + * in place when the underflow occurred must be restored using + * the original stack pointer (saved in g6). + */ +1: + mov %o7, %g7 /* restore return addr */ + mov %sp, %g6 /* Restore original sp */ + + lds %g0, [%sp,0] /* Restore 'global' regs*/ + lds %g1, [%sp,1] + lds %g2, [%sp,2] + lds %g3, [%sp,3] + lds %g4, [%sp,4] + lds %g5, [%sp,5] + lds %g6, [%sp,6] + lds %g7, [%sp,7] + + lds %i0, [%sp,8] /* Restore 'in' regs*/ + lds %i1, [%sp,9] + lds %i2, [%sp,10] + lds %i3, [%sp,11] + lds %i4, [%sp,12] + lds %i5, [%sp,13] + lds %i6, [%sp,14] + lds %i7, [%sp,15] + + tret %o7 /* All done */ + +/************************************************************************* + * Register window overflow + * + * The register window overflow exception occurs whenever the highest + * valid register window is in use (cwp = HI_LIMIT) and a restore + * instruction is issued. Control is transferred to the overflow handler + * before the instruction following restore is executed. + * + * When a register window overflow exception is taken, the exception + * handler sees cwp at HI_LIMIT. + ************************************************************************/ + .text + .global _cwp_hilimit + .align 4 + +_cwp_hilimit: + + /* Save 'global'/'in' regs on the stack -- will restore when cwp + * is at LO_LIMIT. Locals don't need saving as they are going away. + */ + sts [%sp,0], %g0 /* Save "global" regs*/ + sts [%sp,1], %g1 + sts [%sp,2], %g2 + sts [%sp,3], %g3 + sts [%sp,4], %g4 + sts [%sp,5], %g5 + sts [%sp,6], %g6 + sts [%sp,7], %g7 + + sts [%sp,8], %i0 /* Save 'in' regs */ + sts [%sp,9], %i1 + sts [%sp,10], %i2 + sts [%sp,11], %i3 + sts [%sp,12], %i4 + sts [%sp,13], %i5 + sts [%sp,14], %i6 + sts [%sp,15], %i7 + + /* The current %sp must be available in global to restore regs + * saved on stack. Need return addr as well ;-) + */ + mov %g7, %o7 + mov %g6, %sp + + /* Get HI_LIMIT & LO_LIMIT + */ + pfx 2 /* WVALID */ + rdctl %g1 + mov %g2, %g1 + pfx 0 + and %g1, 0x1f /* g1 <- LO_LIMIT */ + lsri %g2, 5 + pfx 0 + and %g2,0x1f /* g2 <- HI_LIMIT */ + + /* Set istatus so cwp = LO_LIMIT after tret + */ + movi %g5, 0x1f + lsli %g5, 4 + not %g5 /* mask to clr cwp */ + pfx 1 /* istatus */ + rdctl %g0 + and %g0, %g5 /* clear cwp field */ + + mov %g4, %g1 /* g4 <- LO_LIMIT */ + lsli %g4, 4 + or %g0, %g4 /* cwp = LO_LIMIT */ + pfx 1 + wrctl %g0 /* update istatus */ + + /* Move to cwp = LO_LIMIT-1 and restore 'in' regs. + */ + subi %g4,(1 << 4) /* g4 <- LO_LIMIT - 1 */ + rdctl %g0 + and %g0, %g5 /* clear cwp field */ + or %g0, %g4 /* cwp = LO_LIMIT - 1 */ + wrctl %g0 /* update status */ + nop + + mov %sp, %g6 /* Restore sp */ + lds %i0, [%sp,8] /* Restore 'in' regs */ + lds %i1, [%sp,9] + lds %i2, [%sp,10] + lds %i3, [%sp,11] + lds %i4, [%sp,12] + lds %i5, [%sp,13] + lds %i6, [%sp,14] /* sp in next window */ + lds %i7, [%sp,15] + + /* Starting at LO_LIMIT-1, move up the register file, restoring + * along the way. + */ +0: + restore /* cwp++ */ + lds %l0, [%sp,0] /* Restore 'local' regs*/ + lds %l1, [%sp,1] + lds %l2, [%sp,2] + lds %l3, [%sp,3] + lds %l4, [%sp,4] + lds %l5, [%sp,5] + lds %l6, [%sp,6] + lds %l7, [%sp,7] + + lds %i0, [%sp,8] /* Restore 'in' regs */ + lds %i1, [%sp,9] + lds %i2, [%sp,10] + lds %i3, [%sp,11] + lds %i4, [%sp,12] + lds %i5, [%sp,13] + lds %i6, [%sp,14] /* sp in next window */ + lds %i7, [%sp,15] + + cmp %g1, %g2 /* cwp == HI_LIMIT ? */ + skps cc_ne /* if so, we're done */ + br 1f + nop /* delay slot */ + + inc %g1 /* cwp++ */ + br 0b + nop /* delay slot */ + + /* All windows have been updated at this point, but the globals + * still need to be restored. Go to cwp = LO_LIMIT-1 to get + * some registers to use. + */ +1: + rdctl %g0 + and %g0, %g5 /* clear cwp field */ + or %g0, %g4 /* cwp = LO_LIMIT - 1 */ + wrctl %g0 /* update status */ + nop + + /* Now there are some registers available to use in restoring + * the globals. + */ + mov %sp, %g6 + mov %o7, %g7 + + lds %g0, [%sp,0] /* Restore "global" regs*/ + lds %g1, [%sp,1] + lds %g2, [%sp,2] + lds %g3, [%sp,3] + lds %g4, [%sp,4] + lds %g5, [%sp,5] + lds %g6, [%sp,6] + lds %g7, [%sp,7] + + /* The tret moves istatus -> status. istatus was already set for + * cwp = LO_LIMIT. + */ + + tret %o7 /* done */ + +/************************************************************************* + * Default exception handler + * + * The default handler passes control to external_interrupt(). So trap + * or hardware interrupt hanlders can be installed using the familiar + * irq_install_handler(). + * + * Here, the stack is fixed-up and cwp is incremented prior to calling + * external_interrupt(). This lets the underflow and overflow handlers + * operate normally during the exception. + ************************************************************************/ + .text + .global _def_xhandler + .align 4 + +_def_xhandler: + + /* Allocate some stack space: 16 words at %sp to accomodate + * a reg window underflow, 8 words to save interrupted task's + * 'out' regs (which are now the 'in' regs), 8 words to preserve + * the 'global' regs and 3 words to save the return address, + * status and istatus. istatus must be saved in the event an + * underflow occurs in a dispatched handler. status is saved so + * a handler can access it on stack. + */ + pfx %hi((16+16+3) * 4) + subi %fp, %lo((16+16+3) * 4) + mov %sp, %fp + + /* Save the 'global' regs and the interrupted task's 'out' regs + * (our 'in' regs) along with the return addr, status & istatus. + * First 16 words are for underflow exception. + */ + rdctl %l0 /* status */ + pfx 1 /* istatus */ + rdctl %l1 + + sts [%sp,16+0], %g0 /* Save 'global' regs*/ + sts [%sp,16+1], %g1 + sts [%sp,16+2], %g2 + sts [%sp,16+3], %g3 + sts [%sp,16+4], %g4 + sts [%sp,16+5], %g5 + sts [%sp,16+6], %g6 + sts [%sp,16+7], %g7 + + sts [%sp,16+8], %i0 /* Save 'in' regs */ + sts [%sp,16+9], %i1 + sts [%sp,16+10], %i2 + sts [%sp,16+11], %i3 + sts [%sp,16+12], %i4 + sts [%sp,16+13], %i5 + sts [%sp,16+14], %i6 + sts [%sp,16+15], %i7 + + sts [%sp,16+16], %l0 /* status */ + sts [%sp,16+17], %l1 /* istatus */ + sts [%sp,16+18], %o7 /* return addr */ + + /* Move to cwp+1 ... this guarantees cwp is at or above LO_LIMIT. + * Need to set IPRI=3 and IE=1 to enable underflow exceptions. + * NOTE: only the 'out' regs have been saved ... can't touch + * the 'in' or 'local' here. + */ + restore /* cwp++ */ + rdctl %o0 /* o0 <- status */ + + pfx %hi(0x7e00) + movi %o1, %lo(0x7e00) + not %o1 + and %o0, %o1 /* clear IPRI */ + + pfx %hi(0x8600) + movi %o1, %lo(0x8600) + or %o0, %o1 /* IPRI=3, IE=1 */ + + wrctl %o0 /* o0 -> status */ + nop + + /* It's ok to call a C routine now since cwp >= LO_LIMIT, + * interrupt task's registers are/will be preserved, and + * underflow exceptions can be handled. + */ + pfx %hi(external_interrupt@h) + movi %o1, %lo(external_interrupt@h) + pfx %xhi(external_interrupt@h) + movhi %o1, %xlo(external_interrupt@h) + bgen %o0, 4+2 /* 16 * 4 */ + add %o0, %sp /* Ptr to regs */ + call %o1 + nop + + /* Move back to the exception register window, restore the 'out' + * registers, then return from exception. + */ + rdctl %o0 /* o0 <- status */ + subi %o0, 16 + wrctl %o0 /* cwp-- */ + nop + + mov %sp, %fp + lds %g0, [%sp,16+0] /* Restore 'global' regs*/ + lds %g1, [%sp,16+1] + lds %g2, [%sp,16+2] + lds %g3, [%sp,16+3] + lds %g4, [%sp,16+4] + lds %g5, [%sp,16+5] + lds %g6, [%sp,16+6] + lds %g7, [%sp,16+7] + + lds %i0, [%sp,16+8] /* Restore 'in' regs*/ + lds %i1, [%sp,16+9] + lds %i2, [%sp,16+10] + lds %i3, [%sp,16+11] + lds %i4, [%sp,16+12] + lds %i5, [%sp,16+13] + lds %i6, [%sp,16+14] + lds %i7, [%sp,16+15] + + lds %l0, [%sp,16+16] /* status */ + lds %l1, [%sp,16+17] /* istatus */ + lds %o7, [%sp,16+18] /* return addr */ + + pfx 1 + wrctl %l1 /* restore istatus */ + + pfx %hi((16+16+3) * 4) + addi %sp, %lo((16+16+3) * 4) + mov %fp, %sp + + tret %o7 /* Done */ + + +/************************************************************************* + * Timebase Timer Interrupt -- This has identical structure to above, + * but calls timer_interrupt(). Doing it this way keeps things similar + * to other architectures (e.g. ppc). + ************************************************************************/ + .text + .global _timebase_int + .align 4 + +_timebase_int: + + /* Allocate stack space. + */ + pfx %hi((16+16+3) * 4) + subi %fp, %lo((16+16+3) * 4) + mov %sp, %fp + + /* Save the 'global' regs & 'out' regs (our 'in' regs) + */ + rdctl %l0 /* status */ + pfx 1 /* istatus */ + rdctl %l1 + + sts [%sp,16+0], %g0 /* Save 'global' regs*/ + sts [%sp,16+1], %g1 + sts [%sp,16+2], %g2 + sts [%sp,16+3], %g3 + sts [%sp,16+4], %g4 + sts [%sp,16+5], %g5 + sts [%sp,16+6], %g6 + sts [%sp,16+7], %g7 + + sts [%sp,16+8], %i0 /* Save 'in' regs */ + sts [%sp,16+9], %i1 + sts [%sp,16+10], %i2 + sts [%sp,16+11], %i3 + sts [%sp,16+12], %i4 + sts [%sp,16+13], %i5 + sts [%sp,16+14], %i6 + sts [%sp,16+15], %i7 + + sts [%sp,16+16], %l0 /* status */ + sts [%sp,16+17], %l1 /* istatus */ + sts [%sp,16+18], %o7 /* return addr */ + + /* Move to cwp+1. + */ + restore /* cwp++ */ + rdctl %o0 /* o0 <- status */ + + pfx %hi(0x7e00) + movi %o1, %lo(0x7e00) + not %o1 + and %o0, %o1 /* clear IPRI */ + + pfx %hi(0x8600) + movi %o1, %lo(0x8600) + or %o0, %o1 /* IPRI=3, IE=1 */ + + wrctl %o0 /* o0 -> status */ + nop + + /* Call timer_interrupt() + */ + pfx %hi(timer_interrupt@h) + movi %o1, %lo(timer_interrupt@h) + pfx %xhi(timer_interrupt@h) + movhi %o1, %xlo(timer_interrupt@h) + bgen %o0, 4+2 /* 16 * 4 */ + add %o0, %sp /* Ptr to regs */ + call %o1 + nop + + /* Move back to the exception register window, restore the 'out' + * registers, then return from exception. + */ + rdctl %o0 /* o0 <- status */ + subi %o0, 16 + wrctl %o0 /* cwp-- */ + nop + + mov %sp, %fp + lds %g0, [%sp,16+0] /* Restore 'global' regs*/ + lds %g1, [%sp,16+1] + lds %g2, [%sp,16+2] + lds %g3, [%sp,16+3] + lds %g4, [%sp,16+4] + lds %g5, [%sp,16+5] + lds %g6, [%sp,16+6] + lds %g7, [%sp,16+7] + + lds %i0, [%sp,16+8] /* Restore 'in' regs*/ + lds %i1, [%sp,16+9] + lds %i2, [%sp,16+10] + lds %i3, [%sp,16+11] + lds %i4, [%sp,16+12] + lds %i5, [%sp,16+13] + lds %i6, [%sp,16+14] + lds %i7, [%sp,16+15] + + lds %l0, [%sp,16+16] /* status */ + lds %l1, [%sp,16+17] /* istatus */ + lds %o7, [%sp,16+18] /* return addr */ + + pfx 1 + wrctl %l1 /* restore istatus */ + + pfx %hi((16+16+3) * 4) + addi %sp, %lo((16+16+3) * 4) + mov %fp, %sp + + tret %o7 /* Done */ -- cgit v1.1