From 511d0c72b82aab9b807efde50fc9e390365f5ca1 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Mon, 9 Oct 2006 00:42:01 +0200 Subject: Coding style cleanup --- cpu/ppc4xx/ndfc.c | 24 ++++++++++++------------ cpu/ppc4xx/start.S | 6 +++--- 2 files changed, 15 insertions(+), 15 deletions(-) (limited to 'cpu/ppc4xx') diff --git a/cpu/ppc4xx/ndfc.c b/cpu/ppc4xx/ndfc.c index c255f93..183ab5e 100644 --- a/cpu/ppc4xx/ndfc.c +++ b/cpu/ppc4xx/ndfc.c @@ -65,8 +65,8 @@ static void ndfc_hwcontrol(struct mtd_info *mtdinfo, int cmd) static void ndfc_write_byte(struct mtd_info *mtdinfo, u_char byte) { - struct nand_chip *this = mtdinfo->priv; - ulong base = (ulong) this->IO_ADDR_W; + struct nand_chip *this = mtdinfo->priv; + ulong base = (ulong) this->IO_ADDR_W; if (hwctl & 0x1) out8(base + NDFC_CMD, byte); @@ -78,16 +78,16 @@ static void ndfc_write_byte(struct mtd_info *mtdinfo, u_char byte) static u_char ndfc_read_byte(struct mtd_info *mtdinfo) { - struct nand_chip *this = mtdinfo->priv; - ulong base = (ulong) this->IO_ADDR_W; + struct nand_chip *this = mtdinfo->priv; + ulong base = (ulong) this->IO_ADDR_W; return (in8(base + NDFC_DATA)); } static int ndfc_dev_ready(struct mtd_info *mtdinfo) { - struct nand_chip *this = mtdinfo->priv; - ulong base = (ulong) this->IO_ADDR_W; + struct nand_chip *this = mtdinfo->priv; + ulong base = (ulong) this->IO_ADDR_W; while (!(in32(base + NDFC_STAT) & NDFC_STAT_IS_READY)) ; @@ -110,8 +110,8 @@ static int ndfc_dev_ready(struct mtd_info *mtdinfo) */ static void ndfc_read_buf(struct mtd_info *mtdinfo, uint8_t *buf, int len) { - struct nand_chip *this = mtdinfo->priv; - ulong base = (ulong) this->IO_ADDR_W; + struct nand_chip *this = mtdinfo->priv; + ulong base = (ulong) this->IO_ADDR_W; uint32_t *p = (uint32_t *) buf; for(;len > 0; len -= 4) @@ -120,8 +120,8 @@ static void ndfc_read_buf(struct mtd_info *mtdinfo, uint8_t *buf, int len) static void ndfc_write_buf(struct mtd_info *mtdinfo, const uint8_t *buf, int len) { - struct nand_chip *this = mtdinfo->priv; - ulong base = (ulong) this->IO_ADDR_W; + struct nand_chip *this = mtdinfo->priv; + ulong base = (ulong) this->IO_ADDR_W; uint32_t *p = (uint32_t *) buf; for(; len > 0; len -= 4) @@ -130,8 +130,8 @@ static void ndfc_write_buf(struct mtd_info *mtdinfo, const uint8_t *buf, int len static int ndfc_verify_buf(struct mtd_info *mtdinfo, const uint8_t *buf, int len) { - struct nand_chip *this = mtdinfo->priv; - ulong base = (ulong) this->IO_ADDR_W; + struct nand_chip *this = mtdinfo->priv; + ulong base = (ulong) this->IO_ADDR_W; uint32_t *p = (uint32_t *) buf; for(; len > 0; len -= 4) diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S index 5a1ab38..3f29314 100644 --- a/cpu/ppc4xx/start.S +++ b/cpu/ppc4xx/start.S @@ -173,9 +173,9 @@ /**************************************************************************/ _start_440: - /*--------------------------------------------------------------------+ - | 440EPX BUP Change - Hardware team request - +--------------------------------------------------------------------*/ + /*--------------------------------------------------------------------+ + | 440EPX BUP Change - Hardware team request + +--------------------------------------------------------------------*/ #if defined(CONFIG_440EPX) || defined(CONFIG_440GRX) sync nop -- cgit v1.1 From 2b208f5308ae0c72a6840180e59ed1ab4f9b69fc Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Mon, 9 Oct 2006 01:02:05 +0200 Subject: Move "ar" flags to config.mk to allow for silent "make -s" Based on patch by Mike Frysinger, 20 Jun 2006 --- cpu/ppc4xx/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'cpu/ppc4xx') diff --git a/cpu/ppc4xx/Makefile b/cpu/ppc4xx/Makefile index 16dc8d6..baecf70 100644 --- a/cpu/ppc4xx/Makefile +++ b/cpu/ppc4xx/Makefile @@ -41,7 +41,7 @@ START := $(addprefix $(obj),$(START)) all: $(obj).depend $(START) $(LIB) $(LIB): $(OBJS) - $(AR) crv $@ $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) ######################################################################### -- cgit v1.1 From e0a46554c3459dc7cabf149c135e79e8df70ae14 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Thu, 12 Oct 2006 19:43:29 +0200 Subject: * PPC405EP: Add CFG_GPIO0_OR, CFG_GPIO0_ODR to setup GPIO completely. - Add configuration of Open Drain GPIO Output selection - Add configuration of initial value of GPIO output pins Patch by Tolunay Orkun, 07 Apr 2006 --- cpu/ppc4xx/cpu_init.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) (limited to 'cpu/ppc4xx') diff --git a/cpu/ppc4xx/cpu_init.c b/cpu/ppc4xx/cpu_init.c index b27567f..def46f1 100644 --- a/cpu/ppc4xx/cpu_init.c +++ b/cpu/ppc4xx/cpu_init.c @@ -226,13 +226,19 @@ cpu_init_f (void) /* * GPIO0 setup (select GPIO or alternate function) */ - out32(GPIO0_OSRH, CFG_GPIO0_OSRH); /* output select */ +#if defined(CFG_GPIO0_OR) + out32(GPIO0_OR, CFG_GPIO0_OR); /* set initial state of output pins */ +#endif +#if defined(CFG_GPIO0_ODR) + out32(GPIO0_ODR, CFG_GPIO0_ODR); /* open-drain select */ +#endif + out32(GPIO0_OSRH, CFG_GPIO0_OSRH); /* output select */ out32(GPIO0_OSRL, CFG_GPIO0_OSRL); - out32(GPIO0_ISR1H, CFG_GPIO0_ISR1H); /* input select */ + out32(GPIO0_ISR1H, CFG_GPIO0_ISR1H); /* input select */ out32(GPIO0_ISR1L, CFG_GPIO0_ISR1L); - out32(GPIO0_TSRH, CFG_GPIO0_TSRH); /* three-state select */ + out32(GPIO0_TSRH, CFG_GPIO0_TSRH); /* three-state select */ out32(GPIO0_TSRL, CFG_GPIO0_TSRL); - out32(GPIO0_TCR, CFG_GPIO0_TCR); /* enable output driver for outputs */ + out32(GPIO0_TCR, CFG_GPIO0_TCR); /* enable output driver for outputs */ /* * Set EMAC noise filter bits -- cgit v1.1 From d7762337cbc8293b259218b4a804dc626e257a4a Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Thu, 12 Oct 2006 19:50:17 +0200 Subject: * PPC405EP: Add support for board configuration of CPC0_PCI register This is needed to be able to configure PerWE*/PCI_INT* pin as PerWE* Patch by Tolunay Orkun, 07 Apr 2006 --- cpu/ppc4xx/start.S | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'cpu/ppc4xx') diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S index 3f29314..3fe13da 100644 --- a/cpu/ppc4xx/start.S +++ b/cpu/ppc4xx/start.S @@ -1697,7 +1697,8 @@ ppc405ep_init: mtdcr ebccfgd,r3 #endif - addi r3,0,CPC0_PCI_HOST_CFG_EN +#ifndef CFG_CPC0_PCI + li r3,CPC0_PCI_HOST_CFG_EN #ifdef CONFIG_BUBINGA /* !----------------------------------------------------------------------- @@ -1712,6 +1713,9 @@ ppc405ep_init: beq ..pci_cfg_set /* if not set, then bypass reg write*/ #endif ori r3,r3,CPC0_PCI_ARBIT_EN +#else /* CFG_CPC0_PCI */ + li r3,CFG_CPC0_PCI +#endif /* CFG_CPC0_PCI */ ..pci_cfg_set: mtdcr CPC0_PCI, r3 /* Enable internal arbiter*/ -- cgit v1.1 From edf0b5433872eb9f468d7460667445b0492dc7e0 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Wed, 18 Oct 2006 15:59:35 +0200 Subject: Make 4xx bootup message shorter on 440EPx/GRx platforms Patch by Stefan Roese, 18 Oct 2006 --- cpu/ppc4xx/cpu.c | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) (limited to 'cpu/ppc4xx') diff --git a/cpu/ppc4xx/cpu.c b/cpu/ppc4xx/cpu.c index 94478db..6badfb1 100644 --- a/cpu/ppc4xx/cpu.c +++ b/cpu/ppc4xx/cpu.c @@ -190,6 +190,7 @@ int checkcpu (void) uint pvr = get_pvr(); ulong clock = gd->cpu_clk; char buf[32]; + char addstr[64] = ""; #if !defined(CONFIG_IOP480) sys_info_t sys_info; @@ -308,19 +309,23 @@ int checkcpu (void) #endif /* CONFIG_440 */ case PVR_440EPX1_RA: - puts("EPx Rev. A - Security/Kasumi support"); + puts("EPx Rev. A"); + strcpy(addstr, "Security/Kasumi support"); break; case PVR_440EPX2_RA: - puts("EPx Rev. A - No Security/Kasumi support"); + puts("EPx Rev. A"); + strcpy(addstr, "No Security/Kasumi support"); break; case PVR_440GRX1_RA: - puts("GRx Rev. A - Security/Kasumi support"); + puts("GRx Rev. A"); + strcpy(addstr, "Security/Kasumi support"); break; case PVR_440GRX2_RA: - puts("GRx Rev. A - No Security/Kasumi support"); + puts("GRx Rev. A"); + strcpy(addstr, "No Security/Kasumi support"); break; case PVR_440SP_RA: @@ -349,6 +354,9 @@ int checkcpu (void) sys_info.freqPLB / sys_info.pllOpbDiv / 1000000, FREQ_EBC / 1000000); + if (addstr[0] != 0) + printf(" %s\n", addstr); + #if defined(I2C_BOOTROM) printf (" I2C boot EEPROM %sabled\n", i2c_bootrom_enabled() ? "en" : "dis"); #if defined(SDR0_PINSTP_SHIFT) -- cgit v1.1 From 43a2b0e76a56995f17e1b7628c192ebafe6051ee Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Fri, 20 Oct 2006 14:28:52 +0200 Subject: Add board/cpu specific NAND chip select function to 440 NDFC Based on idea and implementation from Jeff Mann Patch by Stefan Roese, 20 Oct 2006 --- cpu/ppc4xx/ndfc.c | 39 ++++++++++++++++++++++++++------------- 1 file changed, 26 insertions(+), 13 deletions(-) (limited to 'cpu/ppc4xx') diff --git a/cpu/ppc4xx/ndfc.c b/cpu/ppc4xx/ndfc.c index 183ab5e..2c44111 100644 --- a/cpu/ppc4xx/ndfc.c +++ b/cpu/ppc4xx/ndfc.c @@ -66,7 +66,7 @@ static void ndfc_hwcontrol(struct mtd_info *mtdinfo, int cmd) static void ndfc_write_byte(struct mtd_info *mtdinfo, u_char byte) { struct nand_chip *this = mtdinfo->priv; - ulong base = (ulong) this->IO_ADDR_W; + ulong base = (ulong) this->IO_ADDR_W & 0xfffffffc; if (hwctl & 0x1) out8(base + NDFC_CMD, byte); @@ -79,7 +79,7 @@ static void ndfc_write_byte(struct mtd_info *mtdinfo, u_char byte) static u_char ndfc_read_byte(struct mtd_info *mtdinfo) { struct nand_chip *this = mtdinfo->priv; - ulong base = (ulong) this->IO_ADDR_W; + ulong base = (ulong) this->IO_ADDR_W & 0xfffffffc; return (in8(base + NDFC_DATA)); } @@ -87,7 +87,7 @@ static u_char ndfc_read_byte(struct mtd_info *mtdinfo) static int ndfc_dev_ready(struct mtd_info *mtdinfo) { struct nand_chip *this = mtdinfo->priv; - ulong base = (ulong) this->IO_ADDR_W; + ulong base = (ulong) this->IO_ADDR_W & 0xfffffffc; while (!(in32(base + NDFC_STAT) & NDFC_STAT_IS_READY)) ; @@ -111,30 +111,30 @@ static int ndfc_dev_ready(struct mtd_info *mtdinfo) static void ndfc_read_buf(struct mtd_info *mtdinfo, uint8_t *buf, int len) { struct nand_chip *this = mtdinfo->priv; - ulong base = (ulong) this->IO_ADDR_W; + ulong base = (ulong) this->IO_ADDR_W & 0xfffffffc; uint32_t *p = (uint32_t *) buf; - for(;len > 0; len -= 4) + for (;len > 0; len -= 4) *p++ = in32(base + NDFC_DATA); } static void ndfc_write_buf(struct mtd_info *mtdinfo, const uint8_t *buf, int len) { struct nand_chip *this = mtdinfo->priv; - ulong base = (ulong) this->IO_ADDR_W; + ulong base = (ulong) this->IO_ADDR_W & 0xfffffffc; uint32_t *p = (uint32_t *) buf; - for(; len > 0; len -= 4) + for (; len > 0; len -= 4) out32(base + NDFC_DATA, *p++); } static int ndfc_verify_buf(struct mtd_info *mtdinfo, const uint8_t *buf, int len) { struct nand_chip *this = mtdinfo->priv; - ulong base = (ulong) this->IO_ADDR_W; + ulong base = (ulong) this->IO_ADDR_W & 0xfffffffc; uint32_t *p = (uint32_t *) buf; - for(; len > 0; len -= 4) + for (; len > 0; len -= 4) if (*p++ != in32(base + NDFC_DATA)) return -1; @@ -142,8 +142,20 @@ static int ndfc_verify_buf(struct mtd_info *mtdinfo, const uint8_t *buf, int len } #endif /* #ifndef CONFIG_NAND_SPL */ +void board_nand_select_device(struct nand_chip *nand, int chip) +{ + ulong base = (ulong)nand->IO_ADDR_W & 0xfffffffc; + + /* Set NandFlash Core Configuration Register */ + /* 1col x 2 rows */ + out32(base + NDFC_CCR, 0x00000000 | (chip << 24)); +} + void board_nand_init(struct nand_chip *nand) { + int chip = (ulong)nand->IO_ADDR_W & 0x00000003; + ulong base = (ulong)nand->IO_ADDR_W & 0xfffffffc; + nand->eccmode = NAND_ECC_SOFT; nand->hwcontrol = ndfc_hwcontrol; @@ -166,10 +178,11 @@ void board_nand_init(struct nand_chip *nand) mtebc(pb0ap, CFG_EBC_PB0AP); #endif - /* Set NandFlash Core Configuration Register */ - /* Chip select 3, 1col x 2 rows */ - out32(CFG_NAND_BASE + NDFC_CCR, 0x00000000 | (CFG_NAND_CS << 24)); - out32(CFG_NAND_BASE + NDFC_BCFG0 + (CFG_NAND_CS << 2), 0x80002222); + /* + * Select required NAND chip in NDFC + */ + board_nand_select_device(nand, chip); + out32(base + NDFC_BCFG0 + (chip << 2), 0x80002222); } #endif -- cgit v1.1 From ba999c531ed16ec749b2b6f4b0133cee38842b91 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Fri, 20 Oct 2006 17:54:33 +0200 Subject: Cleanup compile warnings. Prepare for release 1.1.5 --- cpu/ppc4xx/cpu.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'cpu/ppc4xx') diff --git a/cpu/ppc4xx/cpu.c b/cpu/ppc4xx/cpu.c index 6badfb1..f4a7208 100644 --- a/cpu/ppc4xx/cpu.c +++ b/cpu/ppc4xx/cpu.c @@ -190,9 +190,9 @@ int checkcpu (void) uint pvr = get_pvr(); ulong clock = gd->cpu_clk; char buf[32]; - char addstr[64] = ""; #if !defined(CONFIG_IOP480) + char addstr[64] = ""; sys_info_t sys_info; puts ("CPU: "); @@ -362,8 +362,8 @@ int checkcpu (void) #if defined(SDR0_PINSTP_SHIFT) printf (" Bootstrap Option %c - ", (char)bootstrap_option() + 'A'); printf ("Boot ROM Location %s\n", bootstrap_str[bootstrap_option()]); -#endif -#endif +#endif /* SDR0_PINSTP_SHIFT */ +#endif /* I2C_BOOTROM */ #if defined(CONFIG_PCI) printf (" Internal PCI arbiter %sabled", pci_arbiter_enabled() ? "en" : "dis"); -- cgit v1.1 From 7ade0c634a979c32fa91a74e8f5775f24651fbe6 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Tue, 24 Oct 2006 18:06:48 +0200 Subject: Fix bug in PPC440 NAND driver cpu/ppc4xx/ndfc.c Patch by Stefan Roese, 24 Oct 2006 --- cpu/ppc4xx/ndfc.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) (limited to 'cpu/ppc4xx') diff --git a/cpu/ppc4xx/ndfc.c b/cpu/ppc4xx/ndfc.c index 2c44111..3521731 100644 --- a/cpu/ppc4xx/ndfc.c +++ b/cpu/ppc4xx/ndfc.c @@ -144,16 +144,21 @@ static int ndfc_verify_buf(struct mtd_info *mtdinfo, const uint8_t *buf, int len void board_nand_select_device(struct nand_chip *nand, int chip) { + /* + * Don't use "chip" to address the NAND device, + * generate the cs from the address where it is encoded. + */ + int cs = (ulong)nand->IO_ADDR_W & 0x00000003; ulong base = (ulong)nand->IO_ADDR_W & 0xfffffffc; /* Set NandFlash Core Configuration Register */ /* 1col x 2 rows */ - out32(base + NDFC_CCR, 0x00000000 | (chip << 24)); + out32(base + NDFC_CCR, 0x00000000 | (cs << 24)); } void board_nand_init(struct nand_chip *nand) { - int chip = (ulong)nand->IO_ADDR_W & 0x00000003; + int cs = (ulong)nand->IO_ADDR_W & 0x00000003; ulong base = (ulong)nand->IO_ADDR_W & 0xfffffffc; nand->eccmode = NAND_ECC_SOFT; @@ -181,8 +186,8 @@ void board_nand_init(struct nand_chip *nand) /* * Select required NAND chip in NDFC */ - board_nand_select_device(nand, chip); - out32(base + NDFC_BCFG0 + (chip << 2), 0x80002222); + board_nand_select_device(nand, cs); + out32(base + NDFC_BCFG0 + (cs << 2), 0x80002222); } #endif -- cgit v1.1