From 8bde7f776c77b343aca29b8c7b58464d915ac245 Mon Sep 17 00:00:00 2001 From: wdenk Date: Fri, 27 Jun 2003 21:31:46 +0000 Subject: * Code cleanup: - remove trailing white space, trailing empty lines, C++ comments, etc. - split cmd_boot.c (separate cmd_bdinfo.c and cmd_load.c) * Patches by Kenneth Johansson, 25 Jun 2003: - major rework of command structure (work done mostly by Michal Cendrowski and Joakim Kristiansen) --- cpu/mpc8xx/bedbug_860.c | 6 ++---- cpu/mpc8xx/cpu.c | 3 +-- cpu/mpc8xx/fec.c | 1 - cpu/mpc8xx/i2c.c | 2 +- cpu/mpc8xx/lcd.c | 10 +++++----- cpu/mpc8xx/scc.c | 11 +++++------ cpu/mpc8xx/serial.c | 20 ++++++++++---------- cpu/mpc8xx/speed.c | 30 +++++++++++++++--------------- cpu/mpc8xx/spi.c | 12 ++++++------ cpu/mpc8xx/start.S | 7 +++---- cpu/mpc8xx/upatch.c | 4 ++-- cpu/mpc8xx/video.c | 16 +++++++--------- 12 files changed, 57 insertions(+), 65 deletions(-) (limited to 'cpu/mpc8xx') diff --git a/cpu/mpc8xx/bedbug_860.c b/cpu/mpc8xx/bedbug_860.c index b90782e..e91a100 100644 --- a/cpu/mpc8xx/bedbug_860.c +++ b/cpu/mpc8xx/bedbug_860.c @@ -5,11 +5,10 @@ #include #include #include - -#include #include #include #include +#include #if (CONFIG_COMMANDS & CFG_CMD_BEDBUG) && defined(CONFIG_8xx) @@ -64,7 +63,7 @@ void bedbug860_init( void ) * ====================================================================== */ void bedbug860_do_break (cmd_tbl_t *cmdtp, int flag, int argc, - char *argv[]) + char *argv[]) { long addr = 0; /* Address to break at */ int which_bp; /* Breakpoint number */ @@ -315,4 +314,3 @@ int bedbug860_clear( int which_bp ) /* ====================================================================== */ #endif - diff --git a/cpu/mpc8xx/cpu.c b/cpu/mpc8xx/cpu.c index cc73305..4e23228 100644 --- a/cpu/mpc8xx/cpu.c +++ b/cpu/mpc8xx/cpu.c @@ -411,8 +411,7 @@ void upmconfig (uint upm, uint * table, uint size) /* ------------------------------------------------------------------------- */ -int do_reset (cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, - char *argv[]) +int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { ulong msr, addr; diff --git a/cpu/mpc8xx/fec.c b/cpu/mpc8xx/fec.c index d2e8408..85ba6b2 100644 --- a/cpu/mpc8xx/fec.c +++ b/cpu/mpc8xx/fec.c @@ -411,7 +411,6 @@ static int fec_init(struct eth_device* dev, bd_t * bd) } - static void fec_halt(struct eth_device* dev) { #if 0 diff --git a/cpu/mpc8xx/i2c.c b/cpu/mpc8xx/i2c.c index 9e8b8c7..baa3552 100644 --- a/cpu/mpc8xx/i2c.c +++ b/cpu/mpc8xx/i2c.c @@ -215,7 +215,7 @@ i2c_init(int speed, int slaveaddr) volatile I2C_BD *rxbd, *txbd; uint dpaddr; -#ifdef CFG_I2C_INIT_BOARD +#ifdef CFG_I2C_INIT_BOARD /* call board specific i2c bus reset routine before accessing the */ /* environment, which might be in a chip on that bus. For details */ /* about this problem see doc/I2C_Edge_Conditions. */ diff --git a/cpu/mpc8xx/lcd.c b/cpu/mpc8xx/lcd.c index fad383f..9f4b210 100644 --- a/cpu/mpc8xx/lcd.c +++ b/cpu/mpc8xx/lcd.c @@ -890,7 +890,7 @@ static void lcd_ctrl_init (void *lcdbase) * 4-bit wide passive dual scan LCD at 4/8 Bit color. */ lchcr_hpc_tmp = - (panel_info.vl_col * + (panel_info.vl_col * (panel_info.vl_tft ? 8 : (((2 - panel_info.vl_lbw) << /* 4 bit=2, 8-bit = 1 */ /* use << to mult by: single scan = 1, dual scan = 2 */ @@ -955,7 +955,7 @@ lcd_setcolreg (ushort regno, ushort red, ushort green, ushort blue) debug ("setcolreg: reg %2d @ %p: R=%02X G=%02X B=%02X => %02X%02X\n", regno, &(cp->lcd_cmap[regno * 2]), red, green, blue, - cp->lcd_cmap[ regno * 2 ], cp->lcd_cmap[(regno * 2) + 1]); + cp->lcd_cmap[ regno * 2 ], cp->lcd_cmap[(regno * 2) + 1]); } #endif /* LCD_COLOR8 */ @@ -1031,9 +1031,9 @@ static void lcd_enable (void) #if defined(CONFIG_LWMON) { uchar c = pic_read (0x60); #if defined(CONFIG_LCD) && defined(CONFIG_LWMON) && (CONFIG_POST & CFG_POST_SYSMON) - c |= 0x04; /* Chip Enable LCD */ + c |= 0x04; /* Chip Enable LCD */ #else - c |= 0x07; /* Power on CCFL, Enable CCFL, Chip Enable LCD */ + c |= 0x07; /* Power on CCFL, Enable CCFL, Chip Enable LCD */ #endif pic_write (0x60, c); } @@ -1069,7 +1069,7 @@ void lcd_disable (void) #if defined(CONFIG_LWMON) { uchar c = pic_read (0x60); - c &= ~0x07; /* Power off CCFL, Disable CCFL, Chip Disable LCD */ + c &= ~0x07; /* Power off CCFL, Disable CCFL, Chip Disable LCD */ pic_write (0x60, c); } #elif defined(CONFIG_R360MPI) diff --git a/cpu/mpc8xx/scc.c b/cpu/mpc8xx/scc.c index f98aad4..d711a63 100644 --- a/cpu/mpc8xx/scc.c +++ b/cpu/mpc8xx/scc.c @@ -168,10 +168,10 @@ static int scc_recv(struct eth_device* dev) /* wrap around buffer index when necessary */ if ((rxIdx + 1) >= PKTBUFSRX) { - rtx->rxbd[PKTBUFSRX - 1].cbd_sc = (BD_ENET_RX_WRAP | BD_ENET_RX_EMPTY); + rtx->rxbd[PKTBUFSRX - 1].cbd_sc = (BD_ENET_RX_WRAP | BD_ENET_RX_EMPTY); rxIdx = 0; } else { - rtx->rxbd[rxIdx].cbd_sc = BD_ENET_RX_EMPTY; + rtx->rxbd[rxIdx].cbd_sc = BD_ENET_RX_EMPTY; rxIdx++; } } @@ -212,7 +212,7 @@ static int scc_init(struct eth_device* dev, bd_t *bis) #ifdef CFG_ALLOC_DPRAM rtx = (RTXBD *) (immr->im_cpm.cp_dpmem + - dpram_alloc_align(sizeof(RTXBD), 8)); + dpram_alloc_align(sizeof(RTXBD), 8)); #else rtx = (RTXBD *) (immr->im_cpm.cp_dpmem + CPM_SCC_BASE); #endif /* 0 */ @@ -406,7 +406,7 @@ static int scc_init(struct eth_device* dev, bd_t *bis) */ immr->im_cpm.cp_scc[SCC_ENET].scc_gsmrl = ( SCC_GSMRL_TCI | \ - SCC_GSMRL_TPL_48 | \ + SCC_GSMRL_TPL_48 | \ SCC_GSMRL_TPP_10 | \ SCC_GSMRL_MODE_ENET); @@ -471,7 +471,7 @@ static int scc_init(struct eth_device* dev, bd_t *bis) * Port B is used to control the PHY,MC68160. */ immr->im_cpm.cp_pbdir |= - (PB_ENET_ETHLOOP | PB_ENET_TPFLDL | PB_ENET_TPSQEL); + (PB_ENET_ETHLOOP | PB_ENET_TPFLDL | PB_ENET_TPSQEL); immr->im_cpm.cp_pbdat |= PB_ENET_TPFLDL; immr->im_cpm.cp_pbdat &= ~(PB_ENET_ETHLOOP | PB_ENET_TPSQEL); @@ -532,7 +532,6 @@ static int scc_init(struct eth_device* dev, bd_t *bis) } - static void scc_halt(struct eth_device* dev) { volatile immap_t *immr = (immap_t *)CFG_IMMR; diff --git a/cpu/mpc8xx/serial.c b/cpu/mpc8xx/serial.c index 4e5b408..81c0279 100644 --- a/cpu/mpc8xx/serial.c +++ b/cpu/mpc8xx/serial.c @@ -77,7 +77,7 @@ int serial_init (void) { - volatile immap_t *im = (immap_t *)CFG_IMMR; + volatile immap_t *im = (immap_t *)CFG_IMMR; volatile smc_t *sp; volatile smc_uart_t *up; volatile cbd_t *tbdf, *rbdf; @@ -231,7 +231,7 @@ serial_setbrg (void) { DECLARE_GLOBAL_DATA_PTR; - volatile immap_t *im = (immap_t *)CFG_IMMR; + volatile immap_t *im = (immap_t *)CFG_IMMR; volatile cpm8xx_t *cp = &(im->im_cpm); /* Set up the baud rate generator. @@ -266,7 +266,7 @@ serial_putc(const char c) volatile cbd_t *tbdf; volatile char *buf; volatile smc_uart_t *up; - volatile immap_t *im = (immap_t *)CFG_IMMR; + volatile immap_t *im = (immap_t *)CFG_IMMR; volatile cpm8xx_t *cpmp = &(im->im_cpm); #ifdef CONFIG_MODEM_SUPPORT @@ -305,7 +305,7 @@ serial_getc(void) volatile cbd_t *rbdf; volatile unsigned char *buf; volatile smc_uart_t *up; - volatile immap_t *im = (immap_t *)CFG_IMMR; + volatile immap_t *im = (immap_t *)CFG_IMMR; volatile cpm8xx_t *cpmp = &(im->im_cpm); unsigned char c; @@ -331,7 +331,7 @@ serial_tstc() { volatile cbd_t *rbdf; volatile smc_uart_t *up; - volatile immap_t *im = (immap_t *)CFG_IMMR; + volatile immap_t *im = (immap_t *)CFG_IMMR; volatile cpm8xx_t *cpmp = &(im->im_cpm); up = (smc_uart_t *)&cpmp->cp_dparam[PROFF_SMC]; @@ -345,7 +345,7 @@ serial_tstc() int serial_init (void) { - volatile immap_t *im = (immap_t *)CFG_IMMR; + volatile immap_t *im = (immap_t *)CFG_IMMR; volatile scc_t *sp; volatile scc_uart_t *up; volatile cbd_t *tbdf, *rbdf; @@ -508,7 +508,7 @@ serial_setbrg (void) { DECLARE_GLOBAL_DATA_PTR; - volatile immap_t *im = (immap_t *)CFG_IMMR; + volatile immap_t *im = (immap_t *)CFG_IMMR; volatile cpm8xx_t *cp = &(im->im_cpm); /* Set up the baud rate generator. @@ -530,7 +530,7 @@ serial_putc(const char c) volatile cbd_t *tbdf; volatile char *buf; volatile scc_uart_t *up; - volatile immap_t *im = (immap_t *)CFG_IMMR; + volatile immap_t *im = (immap_t *)CFG_IMMR; volatile cpm8xx_t *cpmp = &(im->im_cpm); if (c == '\n') @@ -562,7 +562,7 @@ serial_getc(void) volatile cbd_t *rbdf; volatile unsigned char *buf; volatile scc_uart_t *up; - volatile immap_t *im = (immap_t *)CFG_IMMR; + volatile immap_t *im = (immap_t *)CFG_IMMR; volatile cpm8xx_t *cpmp = &(im->im_cpm); unsigned char c; @@ -588,7 +588,7 @@ serial_tstc() { volatile cbd_t *rbdf; volatile scc_uart_t *up; - volatile immap_t *im = (immap_t *)CFG_IMMR; + volatile immap_t *im = (immap_t *)CFG_IMMR; volatile cpm8xx_t *cpmp = &(im->im_cpm); up = (scc_uart_t *)&cpmp->cp_dparam[PROFF_SCC]; diff --git a/cpu/mpc8xx/speed.c b/cpu/mpc8xx/speed.c index ef32371..e1c3400 100644 --- a/cpu/mpc8xx/speed.c +++ b/cpu/mpc8xx/speed.c @@ -114,18 +114,18 @@ int get_clocks (void) /* * PIT setup: * - * We want to time for SPEED_PITC_COUNTS counts (of 8192 Hz), - * so the count value would be SPEED_PITC_COUNTS - 1. - * But there would be an uncertainty in the start time of 1/4 - * count since when we enable the PIT the count is not - * synchronized to the 32768 Hz oscillator. The trick here is - * to start the count higher and wait until the PIT count - * changes to the required value before starting timer 2. + * We want to time for SPEED_PITC_COUNTS counts (of 8192 Hz), + * so the count value would be SPEED_PITC_COUNTS - 1. + * But there would be an uncertainty in the start time of 1/4 + * count since when we enable the PIT the count is not + * synchronized to the 32768 Hz oscillator. The trick here is + * to start the count higher and wait until the PIT count + * changes to the required value before starting timer 2. * - * One count high should be enough, but occasionally the start - * is off by 1 or 2 counts of 32768 Hz. With the start value - * set two counts high it seems very reliable. - */ + * One count high should be enough, but occasionally the start + * is off by 1 or 2 counts of 32768 Hz. With the start value + * set two counts high it seems very reliable. + */ immr->im_sitk.sitk_pitck = KAPWR_KEY; /* PIT initialization */ immr->im_sit.sit_pitc = SPEED_PITC_INIT; @@ -163,10 +163,10 @@ int get_clocks (void) #else /* CONFIG_8xx_GCLK_FREQ */ /* - * If for some reason measuring the gclk frequency won't - * work, we return the hardwired value. - * (For example, the cogent CMA286-60 CPU module has no - * separate oscillator for PITRTCLK) + * If for some reason measuring the gclk frequency won't + * work, we return the hardwired value. + * (For example, the cogent CMA286-60 CPU module has no + * separate oscillator for PITRTCLK) */ gd->cpu_clk = CONFIG_8xx_GCLK_FREQ; diff --git a/cpu/mpc8xx/spi.c b/cpu/mpc8xx/spi.c index f04d88e..16b3f3a 100644 --- a/cpu/mpc8xx/spi.c +++ b/cpu/mpc8xx/spi.c @@ -223,12 +223,12 @@ void spi_init_f (void) /***********IMPORTANT******************/ - /* - * Setting transmit and receive buffer descriptor pointers - * initially to rbase and tbase. Only the microcode patches - * documentation talks about initializing this pointer. This - * is missing from the sample I2C driver. If you dont - * initialize these pointers, the kernel hangs. + /* + * Setting transmit and receive buffer descriptor pointers + * initially to rbase and tbase. Only the microcode patches + * documentation talks about initializing this pointer. This + * is missing from the sample I2C driver. If you dont + * initialize these pointers, the kernel hangs. */ spi->spi_rbptr = spi->spi_rbase; spi->spi_tbptr = spi->spi_tbase; diff --git a/cpu/mpc8xx/start.S b/cpu/mpc8xx/start.S index 3cc4ecb..81a4dc0 100644 --- a/cpu/mpc8xx/start.S +++ b/cpu/mpc8xx/start.S @@ -209,7 +209,6 @@ in_flash: bl board_init_f /* run 1st part of board init code (from Flash) */ - .globl _start_of_vectors _start_of_vectors: @@ -650,8 +649,8 @@ in_ram: /* * Relocation Function, r14 point to got2+0x8000 * - * Adjust got2 pointers, no need to check for 0, this code - * already puts a few entries in the table. + * Adjust got2 pointers, no need to check for 0, this code + * already puts a few entries in the table. */ li r0,__got2_entries@sectoff@l la r3,GOT(_GOT2_TABLE_) @@ -665,7 +664,7 @@ in_ram: bdnz 1b /* - * Now adjust the fixups and the pointers to the fixups + * Now adjust the fixups and the pointers to the fixups * in case we need to move ourselves again. */ 2: li r0,__fixup_entries@sectoff@l diff --git a/cpu/mpc8xx/upatch.c b/cpu/mpc8xx/upatch.c index 99bdf53..eccff64 100644 --- a/cpu/mpc8xx/upatch.c +++ b/cpu/mpc8xx/upatch.c @@ -33,8 +33,8 @@ void cpm_load_patch (volatile immap_t *immr) #endif /* - * Enable DPRAM microcode to execute from the first 512 bytes - * and a 256 byte extension of DPRAM. + * Enable DPRAM microcode to execute from the first 512 bytes + * and a 256 byte extension of DPRAM. */ immr->im_cpm.cp_rccr |= 0x0001; } diff --git a/cpu/mpc8xx/video.c b/cpu/mpc8xx/video.c index 9db69e1..40e65d3 100644 --- a/cpu/mpc8xx/video.c +++ b/cpu/mpc8xx/video.c @@ -855,13 +855,13 @@ static void video_ctrl_init (void *memptr) debug ("[VIDEO CTRL] Blanking the screen...\n"); video_fill (VIDEO_BG_COL); - /* - * Turns on Aggressive Mode. Normally, turning on the caches - * will cause the screen to flicker when the caches try to - * fill. This gives the FIFO's for the Video Controller - * higher priority and prevents flickering because of - * underrun. This may still be an issue when using FLASH, - * since accessing data from Flash is so slow. + /* + * Turns on Aggressive Mode. Normally, turning on the caches + * will cause the screen to flicker when the caches try to + * fill. This gives the FIFO's for the Video Controller + * higher priority and prevents flickering because of + * underrun. This may still be an issue when using FLASH, + * since accessing data from Flash is so slow. */ debug ("[VIDEO CTRL] Turning on aggressive mode...\n"); immap->im_siu_conf.sc_sdcr = 0x40; @@ -1252,6 +1252,4 @@ ulong video_setmem (ulong addr) return (addr); } - - #endif -- cgit v1.1