From ccea800346cbf4f5217dbd37256bf7ae21162473 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Fri, 11 Sep 2009 11:27:00 -0500 Subject: ppc/85xx: Introduce low level write_tlb function Factor out the code we use to actually write a tlb entry. set_tlb is a logical view of the TLB while write_tlb is a low level matching the MAS registers. Signed-off-by: Kumar Gala --- cpu/mpc85xx/tlb.c | 16 +++------------- 1 file changed, 3 insertions(+), 13 deletions(-) (limited to 'cpu/mpc85xx/tlb.c') diff --git a/cpu/mpc85xx/tlb.c b/cpu/mpc85xx/tlb.c index 03c2449..d39712a 100644 --- a/cpu/mpc85xx/tlb.c +++ b/cpu/mpc85xx/tlb.c @@ -1,5 +1,5 @@ /* - * Copyright 2008 Freescale Semiconductor, Inc. + * Copyright 2008-2009 Freescale Semiconductor, Inc. * * (C) Copyright 2000 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. @@ -42,19 +42,9 @@ void set_tlb(u8 tlb, u32 epn, u64 rpn, _mas1 = FSL_BOOKE_MAS1(1, iprot, 0, ts, tsize); _mas2 = FSL_BOOKE_MAS2(epn, wimge); _mas3 = FSL_BOOKE_MAS3(rpn, 0, perms); - _mas7 = rpn >> 32; + _mas7 = FSL_BOOKE_MAS7(rpn); - mtspr(MAS0, _mas0); - mtspr(MAS1, _mas1); - mtspr(MAS2, _mas2); - mtspr(MAS3, _mas3); -#ifdef CONFIG_ENABLE_36BIT_PHYS - mtspr(MAS7, _mas7); -#endif -#ifdef CONFIG_SYS_BOOK3E_HV - mtspr(MAS8, 0); -#endif - asm volatile("isync;msync;tlbwe;isync"); + write_tlb(_mas0, _mas1, _mas2, _mas3, _mas7); #ifdef CONFIG_ADDR_MAP if ((tlb == 1) && (gd->flags & GD_FLG_RELOC)) -- cgit v1.1