From 75b9d4ae0d69f214eab641caf12ce8af83a39a42 Mon Sep 17 00:00:00 2001 From: Andy Fleming Date: Sun, 31 Aug 2008 16:33:26 -0500 Subject: Pass in tsec_info struct through tsec_initialize The tsec driver contains a hard-coded array of configuration information for the tsec ethernet controllers. We create a default function that works for most tsecs, and allow that to be overridden by board code. It creates an array of tsec_info structures, which are then parsed by the corresponding driver instance to determine configuration. Also, add regs, miiregs, and devname fields to the tsec_info structure, so that we don't need the kludgy "index" parameter. Signed-off-by: Andy Fleming Signed-off-by: Ben Warren --- cpu/mpc85xx/cpu.c | 33 ++++++++++----------------------- 1 file changed, 10 insertions(+), 23 deletions(-) (limited to 'cpu/mpc85xx/cpu.c') diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c index 2fe3cea..7976cac 100644 --- a/cpu/mpc85xx/cpu.c +++ b/cpu/mpc85xx/cpu.c @@ -25,9 +25,11 @@ * MA 02111-1307 USA */ +#include #include #include #include +#include #include #include @@ -294,6 +296,7 @@ int dma_xfer(void *dest, uint count, void *src) { return dma_check(); } #endif + /* * Configures a UPM. Currently, the loop fields in MxMR (RLF, WLF and TLF) * are hardcoded as "1"."size" is the number or entries, not a sizeof. @@ -360,32 +363,16 @@ void upmconfig (uint upm, uint * table, uint size) out_be32(mxmr, loopval); /* OP_NORMAL */ } -#if defined(CONFIG_TSEC_ENET) || defined(CONFIGMPC85XX_FEC) -/* Default initializations for TSEC controllers. To override, - * create a board-specific function called: - * int board_eth_init(bd_t *bis) - */ - -extern int tsec_initialize(bd_t * bis, int index, char *devname); +/* + * Initializes on-chip ethernet controllers. + * to override, implement board_eth_init() + */ int cpu_eth_init(bd_t *bis) { -#if defined(CONFIG_TSEC1) - tsec_initialize(bis, 0, CONFIG_TSEC1_NAME); -#endif -#if defined(CONFIG_TSEC2) - tsec_initialize(bis, 1, CONFIG_TSEC2_NAME); -#endif -#if defined(CONFIG_MPC85XX_FEC) - tsec_initialize(bis, 2, CONFIG_MPC85XX_FEC_NAME); -#else -#if defined(CONFIG_TSEC3) - tsec_initialize(bis, 2, CONFIG_TSEC3_NAME); -#endif -#if defined(CONFIG_TSEC4) - tsec_initialize(bis, 3, CONFIG_TSEC4_NAME); -#endif +#if defined(CONFIG_TSEC_ENET) || defined(CONFIG_MPC85xx_FEC) + tsec_standard_init(bis); #endif + return 0; } -#endif -- cgit v1.1 From 59f630588e3fdbd698a0a2798e52a8924e899563 Mon Sep 17 00:00:00 2001 From: Sergei Poselenov Date: Fri, 15 Aug 2008 15:42:11 +0200 Subject: Removed hardcoded MxMR loop value from upmconfig() for MPC85xx. Signed-off-by: Sergei Poselenov --- cpu/mpc85xx/cpu.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) (limited to 'cpu/mpc85xx/cpu.c') diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c index 7976cac..67e81c0 100644 --- a/cpu/mpc85xx/cpu.c +++ b/cpu/mpc85xx/cpu.c @@ -298,15 +298,14 @@ int dma_xfer(void *dest, uint count, void *src) { #endif /* - * Configures a UPM. Currently, the loop fields in MxMR (RLF, WLF and TLF) - * are hardcoded as "1"."size" is the number or entries, not a sizeof. + * Configures a UPM. The function requires the respective MxMR to be set + * before calling this function. "size" is the number or entries, not a sizeof. */ void upmconfig (uint upm, uint * table, uint size) { int i, mdr, mad, old_mad = 0; volatile u32 *mxmr; volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR); - int loopval = 0x00004440; volatile u32 *brp,*orp; volatile u8* dummy = NULL; int upmmask; @@ -334,8 +333,8 @@ void upmconfig (uint upm, uint * table, uint size) i++, brp += 2, orp += 2) { /* Look for a valid BR with selected UPM */ - if ((in_be32(brp) & (BR_V | upmmask)) == (BR_V | upmmask)) { - dummy = (volatile u8*)(in_be32(brp) >> BR_BA_SHIFT); + if ((in_be32(brp) & (BR_V | BR_MSEL)) == (BR_V | upmmask)) { + dummy = (volatile u8*)(in_be32(brp) & BR_BA); break; } } @@ -347,7 +346,7 @@ void upmconfig (uint upm, uint * table, uint size) for (i = 0; i < size; i++) { /* 1 */ - out_be32(mxmr, loopval | 0x10000000 | i); /* OP_WRITE */ + out_be32(mxmr, (in_be32(mxmr) & 0x4fffffc0) | MxMR_OP_WARR | i); /* 2 */ out_be32(&lbc->mdr, table[i]); /* 3 */ @@ -356,11 +355,11 @@ void upmconfig (uint upm, uint * table, uint size) *(volatile u8 *)dummy = 0; /* 5 */ do { - mad = in_be32(mxmr) & 0x3f; + mad = in_be32(mxmr) & MxMR_MAD_MSK; } while (mad <= old_mad && !(!mad && i == (size-1))); old_mad = mad; } - out_be32(mxmr, loopval); /* OP_NORMAL */ + out_be32(mxmr, (in_be32(mxmr) & 0x4fffffc0) | MxMR_OP_NORM); } -- cgit v1.1 From c0391111c33c22fabeddf8f4ca801ec7645b4f5c Mon Sep 17 00:00:00 2001 From: Jason Jin Date: Sat, 27 Sep 2008 14:40:57 +0800 Subject: Fix the incorrect DDR clk freq reporting on 8536DS On 8536DS board, When the DDR clk is set async mode(SW3[6:8] != 111), The display is still sync mode DDR freq. This patch try to fix this. The display DDR freq is now the actual freq in both sync and async mode. Signed-off-by: Jason Jin --- cpu/mpc85xx/cpu.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'cpu/mpc85xx/cpu.c') diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c index 67e81c0..f15b0a8 100644 --- a/cpu/mpc85xx/cpu.c +++ b/cpu/mpc85xx/cpu.c @@ -85,7 +85,8 @@ int checkcpu (void) struct cpu_type *cpu; #ifdef CONFIG_DDR_CLK_FREQ volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR); - u32 ddr_ratio = ((gur->porpllsr) & 0x00003e00) >> 9; + u32 ddr_ratio = ((gur->porpllsr) & MPC85xx_PORPLLSR_DDR_RATIO) + >> MPC85xx_PORPLLSR_DDR_RATIO_SHIFT; #else u32 ddr_ratio = 0; #endif -- cgit v1.1 From 6d0f6bcf337c5261c08fabe12982178c2c489d76 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Thu, 16 Oct 2008 15:01:15 +0200 Subject: rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- cpu/mpc85xx/cpu.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) (limited to 'cpu/mpc85xx/cpu.c') diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c index f15b0a8..61162a8 100644 --- a/cpu/mpc85xx/cpu.c +++ b/cpu/mpc85xx/cpu.c @@ -84,7 +84,7 @@ int checkcpu (void) uint major, minor; struct cpu_type *cpu; #ifdef CONFIG_DDR_CLK_FREQ - volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR); + volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); u32 ddr_ratio = ((gur->porpllsr) & MPC85xx_PORPLLSR_DDR_RATIO) >> MPC85xx_PORPLLSR_DDR_RATIO_SHIFT; #else @@ -151,11 +151,11 @@ int checkcpu (void) break; } -#if defined(CFG_LBC_LCRR) - lcrr = CFG_LBC_LCRR; +#if defined(CONFIG_SYS_LBC_LCRR) + lcrr = CONFIG_SYS_LBC_LCRR; #else { - volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR); + volatile ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR); lcrr = lbc->lcrr; } @@ -200,7 +200,7 @@ int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) if (ver & 1){ /* e500 v2 core has reset control register */ volatile unsigned int * rstcr; - rstcr = (volatile unsigned int *)(CFG_IMMR + 0xE00B0); + rstcr = (volatile unsigned int *)(CONFIG_SYS_IMMR + 0xE00B0); *rstcr = 0x2; /* HRESET_REQ */ udelay(100); } @@ -256,7 +256,7 @@ reset_85xx_watchdog(void) #if defined(CONFIG_DDR_ECC) void dma_init(void) { - volatile ccsr_dma_t *dma = (void *)(CFG_MPC85xx_DMA_ADDR); + volatile ccsr_dma_t *dma = (void *)(CONFIG_SYS_MPC85xx_DMA_ADDR); dma->satr0 = 0x02c40000; dma->datr0 = 0x02c40000; @@ -266,7 +266,7 @@ void dma_init(void) { } uint dma_check(void) { - volatile ccsr_dma_t *dma = (void *)(CFG_MPC85xx_DMA_ADDR); + volatile ccsr_dma_t *dma = (void *)(CONFIG_SYS_MPC85xx_DMA_ADDR); volatile uint status = dma->sr0; /* While the channel is busy, spin */ @@ -285,7 +285,7 @@ uint dma_check(void) { } int dma_xfer(void *dest, uint count, void *src) { - volatile ccsr_dma_t *dma = (void *)(CFG_MPC85xx_DMA_ADDR); + volatile ccsr_dma_t *dma = (void *)(CONFIG_SYS_MPC85xx_DMA_ADDR); dma->dar0 = (uint) dest; dma->sar0 = (uint) src; @@ -306,7 +306,7 @@ void upmconfig (uint upm, uint * table, uint size) { int i, mdr, mad, old_mad = 0; volatile u32 *mxmr; - volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR); + volatile ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR); volatile u32 *brp,*orp; volatile u8* dummy = NULL; int upmmask; -- cgit v1.1 From 6856b3d0221a838580e6bb06f61425fd7529ba93 Mon Sep 17 00:00:00 2001 From: Ed Swarthout Date: Wed, 8 Oct 2008 23:37:59 -0500 Subject: 85xx if NUM_CPUS>1, print cpu number Signed-off-by: Ed Swarthout --- cpu/mpc85xx/cpu.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'cpu/mpc85xx/cpu.c') diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c index 61162a8..9c4f214 100644 --- a/cpu/mpc85xx/cpu.c +++ b/cpu/mpc85xx/cpu.c @@ -99,7 +99,12 @@ int checkcpu (void) #endif minor = SVR_MIN(svr); +#if (CONFIG_NUM_CPUS > 1) + volatile ccsr_pic_t *pic = (void *)(CONFIG_SYS_MPC85xx_PIC_ADDR); + printf("CPU%d: ", pic->whoami); +#else puts("CPU: "); +#endif cpu = identify_cpu(ver); if (cpu) { -- cgit v1.1 From 08ef89ecd174969b3544f3f0c7cd1de3c57f737b Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Sun, 19 Oct 2008 02:35:49 +0200 Subject: Use strmhz() to format clock frequencies Signed-off-by: Wolfgang Denk --- cpu/mpc85xx/cpu.c | 26 +++++++++++++++----------- 1 file changed, 15 insertions(+), 11 deletions(-) (limited to 'cpu/mpc85xx/cpu.c') diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c index 9c4f214..b8f9125 100644 --- a/cpu/mpc85xx/cpu.c +++ b/cpu/mpc85xx/cpu.c @@ -83,6 +83,7 @@ int checkcpu (void) uint ver; uint major, minor; struct cpu_type *cpu; + char buf1[32], buf2[32]; #ifdef CONFIG_DDR_CLK_FREQ volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); u32 ddr_ratio = ((gur->porpllsr) & MPC85xx_PORPLLSR_DDR_RATIO) @@ -138,21 +139,24 @@ int checkcpu (void) get_sys_info(&sysinfo); puts("Clock Configuration:\n"); - printf(" CPU:%4lu MHz, ", DIV_ROUND_UP(sysinfo.freqProcessor,1000000)); - printf("CCB:%4lu MHz,\n", DIV_ROUND_UP(sysinfo.freqSystemBus,1000000)); + printf(" CPU:%-4s MHz, ", strmhz(buf1, sysinfo.freqProcessor)); + printf("CCB:%-4s MHz,\n", strmhz(buf1, sysinfo.freqSystemBus)); switch (ddr_ratio) { case 0x0: - printf(" DDR:%4lu MHz (%lu MT/s data rate), ", - DIV_ROUND_UP(sysinfo.freqDDRBus,2000000), DIV_ROUND_UP(sysinfo.freqDDRBus,1000000)); + printf(" DDR:%-4s MHz (%s MT/s data rate), ", + strmhz(buf1, sysinfo.freqDDRBus/2), + strmhz(buf2, sysinfo.freqDDRBus)); break; case 0x7: - printf(" DDR:%4lu MHz (%lu MT/s data rate) (Synchronous), ", - DIV_ROUND_UP(sysinfo.freqDDRBus, 2000000), DIV_ROUND_UP(sysinfo.freqDDRBus, 1000000)); + printf(" DDR:%-4s MHz (%s MT/s data rate) (Synchronous), ", + strmhz(buf1, sysinfo.freqDDRBus/2), + strmhz(buf2, sysinfo.freqDDRBus)); break; default: - printf(" DDR:%4lu MHz (%lu MT/s data rate) (Asynchronous), ", - DIV_ROUND_UP(sysinfo.freqDDRBus, 2000000), DIV_ROUND_UP(sysinfo.freqDDRBus,1000000)); + printf(" DDR:%-4s MHz (%s MT/s data rate) (Asynchronous), ", + strmhz(buf1, sysinfo.freqDDRBus/2), + strmhz(buf2, sysinfo.freqDDRBus)); break; } @@ -175,14 +179,14 @@ int checkcpu (void) */ clkdiv *= 2; #endif - printf("LBC:%4lu MHz\n", - DIV_ROUND_UP(sysinfo.freqSystemBus, 1000000) / clkdiv); + printf("LBC:%-4s MHz\n", + strmhz(buf1, sysinfo.freqSystemBus / clkdiv)); } else { printf("LBC: unknown (lcrr: 0x%08x)\n", lcrr); } #ifdef CONFIG_CPM2 - printf("CPM: %lu Mhz\n", sysinfo.freqSystemBus / 1000000); + printf("CPM: %s MHz\n", strmhz(buf1, sysinfo.freqSystemBus)); #endif puts("L1: D-cache 32 kB enabled\n I-cache 32 kB enabled\n"); -- cgit v1.1 From 0f060c3bf82832331a509f2e5d2442539e7aad09 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Thu, 23 Oct 2008 01:47:38 -0500 Subject: 85xx: Add basic e500mc core support Introduce CONFIG_E500MC to deal with the minor differences between e500v2 and e500mc. * Certain fields of HID0/1 don't exist anymore on e500mc * Cache line size is 64-bytes on e500mc * reset value of PIR is different Signed-off-by: Kumar Gala --- cpu/mpc85xx/cpu.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'cpu/mpc85xx/cpu.c') diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c index b8f9125..c780687 100644 --- a/cpu/mpc85xx/cpu.c +++ b/cpu/mpc85xx/cpu.c @@ -134,6 +134,10 @@ int checkcpu (void) puts("Unknown"); break; } + + if (PVR_MEM(pvr) == 0x03) + puts("MC"); + printf(", Version: %d.%d, (0x%08x)\n", major, minor, pvr); get_sys_info(&sysinfo); -- cgit v1.1 From 62e15b497f5c6334c059512678c8db7940ae4c61 Mon Sep 17 00:00:00 2001 From: Ben Warren Date: Thu, 30 Oct 2008 22:15:35 -0700 Subject: Fix typo in cpu/mpc85xx/cpu.c CONFIG_MPC85xx_FEC -> CONFIG_MPC85XX_FEC Signed-off-by: Ben Warren --- cpu/mpc85xx/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'cpu/mpc85xx/cpu.c') diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c index c780687..b90871d 100644 --- a/cpu/mpc85xx/cpu.c +++ b/cpu/mpc85xx/cpu.c @@ -383,7 +383,7 @@ void upmconfig (uint upm, uint * table, uint size) */ int cpu_eth_init(bd_t *bis) { -#if defined(CONFIG_TSEC_ENET) || defined(CONFIG_MPC85xx_FEC) +#if defined(CONFIG_TSEC_ENET) || defined(CONFIG_MPC85XX_FEC) tsec_standard_init(bis); #endif -- cgit v1.1 From 3456a148276d5494b53ee40242efb6462d163504 Mon Sep 17 00:00:00 2001 From: Ben Warren Date: Wed, 22 Oct 2008 23:20:29 -0700 Subject: Moved initialization of FCC Ethernet controller to cpu_eth_init Affected boards: Several MPC8xx boards Several MPC8260/MPC8272 boards Several MPC85xx boards Removed initialization of the driver from net/eth.c Signed-off-by: Ben Warren --- cpu/mpc85xx/cpu.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'cpu/mpc85xx/cpu.c') diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c index b90871d..fc6bd2d 100644 --- a/cpu/mpc85xx/cpu.c +++ b/cpu/mpc85xx/cpu.c @@ -30,6 +30,7 @@ #include #include #include +#include #include #include @@ -383,9 +384,11 @@ void upmconfig (uint upm, uint * table, uint size) */ int cpu_eth_init(bd_t *bis) { +#if defined(CONFIG_ETHER_ON_FCC) + fec_initialize(bis); +#endif #if defined(CONFIG_TSEC_ENET) || defined(CONFIG_MPC85XX_FEC) tsec_standard_init(bis); #endif - return 0; } -- cgit v1.1 From 0e8454e990385a58f708c2fc26d31ac041c7a6c5 Mon Sep 17 00:00:00 2001 From: Ben Warren Date: Wed, 22 Oct 2008 23:32:48 -0700 Subject: Moved initialization of QE Ethernet controller to cpu_eth_init() Removed initialization of the driver from net/eth.c Signed-off-by: Ben Warren --- cpu/mpc85xx/cpu.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'cpu/mpc85xx/cpu.c') diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c index fc6bd2d..943602f 100644 --- a/cpu/mpc85xx/cpu.c +++ b/cpu/mpc85xx/cpu.c @@ -387,6 +387,24 @@ int cpu_eth_init(bd_t *bis) #if defined(CONFIG_ETHER_ON_FCC) fec_initialize(bis); #endif +#if defined(CONFIG_UEC_ETH1) + uec_initialize(0); +#endif +#if defined(CONFIG_UEC_ETH2) + uec_initialize(1); +#endif +#if defined(CONFIG_UEC_ETH3) + uec_initialize(2); +#endif +#if defined(CONFIG_UEC_ETH4) + uec_initialize(3); +#endif +#if defined(CONFIG_UEC_ETH5) + uec_initialize(4); +#endif +#if defined(CONFIG_UEC_ETH6) + uec_initialize(5); +#endif #if defined(CONFIG_TSEC_ENET) || defined(CONFIG_MPC85XX_FEC) tsec_standard_init(bis); #endif -- cgit v1.1