From 30ce5ab043db0b34838ad2d294561992bdb5236a Mon Sep 17 00:00:00 2001 From: wdenk Date: Sun, 9 Jan 2005 18:12:51 +0000 Subject: * Patch by Gleb Natapov, 07 Sep 2004: mpc824x: set PCI latency timer to a sane value (is 0 after reset). * Patch by Kurt Stremerch, 03 Sep 2004: Add bitstream configuration option for fpga command (Xilinx only). --- cpu/mpc824x/cpu_init.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'cpu/mpc824x') diff --git a/cpu/mpc824x/cpu_init.c b/cpu/mpc824x/cpu_init.c index d0c7a3b..965f4fd 100644 --- a/cpu/mpc824x/cpu_init.c +++ b/cpu/mpc824x/cpu_init.c @@ -90,7 +90,7 @@ cpu_init_f (void) #endif CONFIG_WRITE_BYTE(PCLSR, 0x8); /* set PCI cache line size */ - + CONFIG_WRITE_BYTE (PLTR, 0x40); /* set PCI latency timer */ /* * Note that although this bit is cleared after a hard reset, it * must be explicitly set and then cleared by software during -- cgit v1.1