From 6d0f6bcf337c5261c08fabe12982178c2c489d76 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Thu, 16 Oct 2008 15:01:15 +0200 Subject: rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- cpu/mpc512x/cpu.c | 6 +++--- cpu/mpc512x/cpu_init.c | 10 ++++----- cpu/mpc512x/i2c.c | 4 ++-- cpu/mpc512x/interrupts.c | 2 +- cpu/mpc512x/iopin.c | 2 +- cpu/mpc512x/serial.c | 18 ++++++++-------- cpu/mpc512x/speed.c | 4 ++-- cpu/mpc512x/start.S | 56 ++++++++++++++++++++++++------------------------ 8 files changed, 51 insertions(+), 51 deletions(-) (limited to 'cpu/mpc512x') diff --git a/cpu/mpc512x/cpu.c b/cpu/mpc512x/cpu.c index d432d99..9b59738 100644 --- a/cpu/mpc512x/cpu.c +++ b/cpu/mpc512x/cpu.c @@ -41,7 +41,7 @@ DECLARE_GLOBAL_DATA_PTR; int checkcpu (void) { - volatile immap_t *immr = (immap_t *) CFG_IMMR; + volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR; ulong clock = gd->cpu_clk; u32 pvr = get_pvr (); u32 spridr = immr->sysconf.spridr; @@ -75,7 +75,7 @@ int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) { ulong msr; - volatile immap_t *immap = (immap_t *) CFG_IMMR; + volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; /* Interrupts and MMU off */ __asm__ __volatile__ ("mfmsr %0":"=r" (msr):); @@ -122,7 +122,7 @@ void watchdog_reset (void) int re_enable = disable_interrupts (); /* Reset watchdog */ - volatile immap_t *immr = (immap_t *) CFG_IMMR; + volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR; immr->wdt.swsrr = 0x556c; immr->wdt.swsrr = 0xaa39; diff --git a/cpu/mpc512x/cpu_init.c b/cpu/mpc512x/cpu_init.c index d6949f6..fa753c8 100644 --- a/cpu/mpc512x/cpu_init.c +++ b/cpu/mpc512x/cpu_init.c @@ -37,23 +37,23 @@ void cpu_init_f (volatile immap_t * im) u32 ips_div; /* Pointer is writable since we allocated a register for it */ - gd = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET); + gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET); /* Clear initial global data */ memset ((void *) gd, 0, sizeof (gd_t)); /* system performance tweaking */ -#ifdef CFG_ACR_PIPE_DEP +#ifdef CONFIG_SYS_ACR_PIPE_DEP /* Arbiter pipeline depth */ im->arbiter.acr = (im->arbiter.acr & ~ACR_PIPE_DEP) | - (CFG_ACR_PIPE_DEP << ACR_PIPE_DEP_SHIFT); + (CONFIG_SYS_ACR_PIPE_DEP << ACR_PIPE_DEP_SHIFT); #endif -#ifdef CFG_ACR_RPTCNT +#ifdef CONFIG_SYS_ACR_RPTCNT /* Arbiter repeat count */ im->arbiter.acr = ((im->arbiter.acr & ~(ACR_RPTCNT)) | - (CFG_ACR_RPTCNT << ACR_RPTCNT_SHIFT)); + (CONFIG_SYS_ACR_RPTCNT << ACR_RPTCNT_SHIFT)); #endif /* RSR - Reset Status Register - clear all status */ diff --git a/cpu/mpc512x/i2c.c b/cpu/mpc512x/i2c.c index 56ba443..77a6f0d 100644 --- a/cpu/mpc512x/i2c.c +++ b/cpu/mpc512x/i2c.c @@ -32,7 +32,7 @@ DECLARE_GLOBAL_DATA_PTR; #include #include -#define immr ((immap_t *)CFG_IMMR) +#define immr ((immap_t *)CONFIG_SYS_IMMR) /* by default set I2C bus 0 active */ static unsigned int bus_num = 0; @@ -422,7 +422,7 @@ unsigned int i2c_get_bus_speed (void) int i2c_set_bus_speed (unsigned int speed) { - if (speed != CFG_I2C_SPEED) + if (speed != CONFIG_SYS_I2C_SPEED) return -1; return 0; diff --git a/cpu/mpc512x/interrupts.c b/cpu/mpc512x/interrupts.c index 8cc241c..ef7c773 100644 --- a/cpu/mpc512x/interrupts.c +++ b/cpu/mpc512x/interrupts.c @@ -37,7 +37,7 @@ struct irq_action { int interrupt_init_cpu (unsigned *decrementer_count) { - *decrementer_count = get_tbclk () / CFG_HZ; + *decrementer_count = get_tbclk () / CONFIG_SYS_HZ; return 0; } diff --git a/cpu/mpc512x/iopin.c b/cpu/mpc512x/iopin.c index 3d7042d..78f4fa1e 100644 --- a/cpu/mpc512x/iopin.c +++ b/cpu/mpc512x/iopin.c @@ -29,7 +29,7 @@ void iopin_initialize(iopin_t *ioregs_init, int len) { short i, j, p; u_long *reg; - immap_t *im = (immap_t *)CFG_IMMR; + immap_t *im = (immap_t *)CONFIG_SYS_IMMR; reg = (u_long *)&(im->io_ctrl.regs[0]); diff --git a/cpu/mpc512x/serial.c b/cpu/mpc512x/serial.c index 8a21404..7db87a8 100644 --- a/cpu/mpc512x/serial.c +++ b/cpu/mpc512x/serial.c @@ -37,7 +37,7 @@ DECLARE_GLOBAL_DATA_PTR; static void fifo_init (volatile psc512x_t *psc) { - volatile immap_t *im = (immap_t *) CFG_IMMR; + volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; /* reset Rx & Tx fifo slice */ psc->rfcmd = PSC_FIFO_RESET_SLICE; @@ -60,7 +60,7 @@ static void fifo_init (volatile psc512x_t *psc) int serial_init(void) { - volatile immap_t *im = (immap_t *) CFG_IMMR; + volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE]; unsigned long baseclk; int div; @@ -106,7 +106,7 @@ int serial_init(void) void serial_putc (const char c) { - volatile immap_t *im = (immap_t *)CFG_IMMR; + volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE]; if (c == '\n') @@ -121,7 +121,7 @@ void serial_putc (const char c) void serial_putc_raw (const char c) { - volatile immap_t *im = (immap_t *) CFG_IMMR; + volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE]; /* Wait for last character to go. */ @@ -141,7 +141,7 @@ void serial_puts (const char *s) int serial_getc (void) { - volatile immap_t *im = (immap_t *) CFG_IMMR; + volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE]; /* Wait for a character to arrive. */ @@ -153,7 +153,7 @@ int serial_getc (void) int serial_tstc (void) { - volatile immap_t *im = (immap_t *) CFG_IMMR; + volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE]; return !(psc->rfstat & PSC_FIFO_EMPTY); @@ -161,7 +161,7 @@ int serial_tstc (void) void serial_setbrg (void) { - volatile immap_t *im = (immap_t *) CFG_IMMR; + volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE]; unsigned long baseclk, div; @@ -174,7 +174,7 @@ void serial_setbrg (void) void serial_setrts(int s) { - volatile immap_t *im = (immap_t *) CFG_IMMR; + volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE]; if (s) { @@ -189,7 +189,7 @@ void serial_setrts(int s) int serial_getcts(void) { - volatile immap_t *im = (immap_t *) CFG_IMMR; + volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE]; return (psc->ip & 0x1) ? 0 : 1; diff --git a/cpu/mpc512x/speed.c b/cpu/mpc512x/speed.c index e62477b..baf6215 100644 --- a/cpu/mpc512x/speed.c +++ b/cpu/mpc512x/speed.c @@ -62,13 +62,13 @@ static int sys_dividors[][2] = { int get_clocks (void) { - volatile immap_t *im = (immap_t *) CFG_IMMR; + volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; u8 spmf; u8 cpmf; u8 sys_div; u8 ips_div; u8 pci_div; - u32 ref_clk = CFG_MPC512X_CLKIN; + u32 ref_clk = CONFIG_SYS_MPC512X_CLKIN; u32 spll; u32 sys_clk; u32 core_clk; diff --git a/cpu/mpc512x/start.S b/cpu/mpc512x/start.S index fb8acb5..26f3c52 100644 --- a/cpu/mpc512x/start.S +++ b/cpu/mpc512x/start.S @@ -192,8 +192,8 @@ boot_cold: /* Set IMMR area to our preferred location */ lis r4, CONFIG_DEFAULT_IMMR@h - lis r3, CFG_IMMR@h - ori r3, r3, CFG_IMMR@l + lis r3, CONFIG_SYS_IMMR@h + ori r3, r3, CONFIG_SYS_IMMR@l stw r3, IMMRBAR(r4) mtspr MBAR, r3 /* IMMRBAR is mirrored into the MBAR SPR (311) */ @@ -208,18 +208,18 @@ boot_cold: */ /* Boot CS/CS0 window range */ - lis r3, CFG_IMMR@h - ori r3, r3, CFG_IMMR@l + lis r3, CONFIG_SYS_IMMR@h + ori r3, r3, CONFIG_SYS_IMMR@l - lis r4, START_REG(CFG_FLASH_BASE) - ori r4, r4, STOP_REG(CFG_FLASH_BASE, CFG_FLASH_SIZE) + lis r4, START_REG(CONFIG_SYS_FLASH_BASE) + ori r4, r4, STOP_REG(CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_SIZE) stw r4, LPCS0AW(r3) /* * The SRAM window has a fixed size (256K), so only the start address * is necessary */ - lis r4, START_REG(CFG_SRAM_BASE) & 0xff00 + lis r4, START_REG(CONFIG_SYS_SRAM_BASE) & 0xff00 stw r4, SRAMBAR(r3) /* @@ -234,11 +234,11 @@ boot_cold: * Set configuration of the Boot/CS0, the SRAM window does not have a * config register so no params can be set for it */ - lis r3, (CFG_IMMR + LPC_OFFSET)@h - ori r3, r3, (CFG_IMMR + LPC_OFFSET)@l + lis r3, (CONFIG_SYS_IMMR + LPC_OFFSET)@h + ori r3, r3, (CONFIG_SYS_IMMR + LPC_OFFSET)@l - lis r4, CFG_CS0_CFG@h - ori r4, r4, CFG_CS0_CFG@l + lis r4, CONFIG_SYS_CS0_CFG@h + ori r4, r4, CONFIG_SYS_CS0_CFG@l stw r4, CS0_CONFIG(r3) /* Master enable all CS's */ @@ -246,15 +246,15 @@ boot_cold: ori r4, r4, CS_CTRL_ME@l stw r4, CS_CTRL(r3) - lis r4, (CFG_MONITOR_BASE)@h - ori r4, r4, (CFG_MONITOR_BASE)@l + lis r4, (CONFIG_SYS_MONITOR_BASE)@h + ori r4, r4, (CONFIG_SYS_MONITOR_BASE)@l addi r5, r4, in_flash - _start + EXC_OFF_SYS_RESET mtlr r5 blr in_flash: - lis r1, (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET)@h - ori r1, r1, (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET)@l + lis r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@h + ori r1, r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@l li r0, 0 /* Make room for stack frame header and */ stwu r0, -4(r1) /* clear final stack frame so that */ @@ -268,7 +268,7 @@ in_flash: GET_GOT /* initialize GOT access */ /* r3: IMMR */ - lis r3, CFG_IMMR@h + lis r3, CONFIG_SYS_IMMR@h /* run low-level CPU init code (in Flash) */ bl cpu_init_f @@ -353,12 +353,12 @@ cpu_early_init: SYNC mtspr SRR1, r3 /* Mirror current MSR state in SRR1 */ - lis r3, CFG_IMMR@h + lis r3, CONFIG_SYS_IMMR@h #if defined(CONFIG_WATCHDOG) /* Initialise the watchdog and reset it */ /*--------------------------------------*/ - lis r4, CFG_WATCHDOG_VALUE + lis r4, CONFIG_SYS_WATCHDOG_VALUE ori r4, r4, (SWCRR_SWEN | SWCRR_SWRI | SWCRR_SWPR) stw r4, SWCRR(r3) @@ -386,18 +386,18 @@ cpu_early_init: /* Initialize the Hardware Implementation-dependent Registers */ /* HID0 also contains cache control */ /*------------------------------------------------------*/ - lis r3, CFG_HID0_INIT@h - ori r3, r3, CFG_HID0_INIT@l + lis r3, CONFIG_SYS_HID0_INIT@h + ori r3, r3, CONFIG_SYS_HID0_INIT@l SYNC mtspr HID0, r3 - lis r3, CFG_HID0_FINAL@h - ori r3, r3, CFG_HID0_FINAL@l + lis r3, CONFIG_SYS_HID0_FINAL@h + ori r3, r3, CONFIG_SYS_HID0_FINAL@l SYNC mtspr HID0, r3 - lis r3, CFG_HID2@h - ori r3, r3, CFG_HID2@l + lis r3, CONFIG_SYS_HID2@h + ori r3, r3, CONFIG_SYS_HID2@l SYNC mtspr HID2, r3 sync @@ -499,16 +499,16 @@ relocate_code: mr r10, r5 /* Save copy of Destination Address */ mr r3, r5 /* Destination Address */ - lis r4, CFG_MONITOR_BASE@h /* Source Address */ - ori r4, r4, CFG_MONITOR_BASE@l + lis r4, CONFIG_SYS_MONITOR_BASE@h /* Source Address */ + ori r4, r4, CONFIG_SYS_MONITOR_BASE@l lwz r5, GOT(__init_end) sub r5, r5, r4 - li r6, CFG_CACHELINE_SIZE /* Cache Line Size */ + li r6, CONFIG_SYS_CACHELINE_SIZE /* Cache Line Size */ /* * Fix GOT pointer: * - * New GOT-PTR = (old GOT-PTR - CFG_MONITOR_BASE) + * New GOT-PTR = (old GOT-PTR - CONFIG_SYS_MONITOR_BASE) * + Destination Address * * Offset: -- cgit v1.1