From 8993e54b6f397973794f3d6f47d3b3c0c98dd4f6 Mon Sep 17 00:00:00 2001 From: Rafal Jaworowski Date: Fri, 27 Jul 2007 14:43:59 +0200 Subject: [ADS5121] Support for the ADS5121 board The following MPC5121e subsystems are supported: - low-level CPU init - NOR Boot Flash (common CFI driver) - DDR SDRAM - FEC - I2C - Watchdog Signed-off-by: Grzegorz Bernacki Signed-off-by: Rafal Jaworowski Signed-off-by: Jan Wrobel --- cpu/mpc512x/cpu.c | 127 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 127 insertions(+) create mode 100644 cpu/mpc512x/cpu.c (limited to 'cpu/mpc512x/cpu.c') diff --git a/cpu/mpc512x/cpu.c b/cpu/mpc512x/cpu.c new file mode 100644 index 0000000..3be565a --- /dev/null +++ b/cpu/mpc512x/cpu.c @@ -0,0 +1,127 @@ +/* + * Copyright (C) 2004-2006 Freescale Semiconductor, Inc. + * (C) Copyright 2007 DENX Software Engineering + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * CPU specific code for the MPC512x family. + * + * Derived from the MPC83xx code. + */ + +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +int checkcpu (void) +{ + volatile immap_t *immr = (immap_t *) CFG_IMMR; + ulong clock = gd->cpu_clk; + u32 pvr = get_pvr (); + u32 spridr = immr->sysconf.spridr; + char buf[32]; + + puts("CPU: "); + + switch (spridr & 0xffff0000) { + case SPR_5121E: + puts ("MPC5121e "); + break; + default: + printf ("Unknown part ID %08x ", spridr & 0xffff0000); + } + printf ("rev. %d.%d, Core ", SVR_MJREV (spridr), SVR_MNREV (spridr)); + + switch (pvr & 0xffff0000) { + case PVR_E300C4: + puts ("e300c4 "); + break; + default: + puts ("unknown "); + } + printf ("at %s MHz, CSB at %3d MHz\n", strmhz(buf, clock), + gd->csb_clk / 1000000); + return 0; +} + + +int +do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) +{ + ulong msr; + volatile immap_t *immap = (immap_t *) CFG_IMMR; + + /* Interrupts and MMU off */ + __asm__ __volatile__ ("mfmsr %0":"=r" (msr):); + + msr &= ~( MSR_EE | MSR_IR | MSR_DR); + __asm__ __volatile__ ("mtmsr %0"::"r" (msr)); + + /* + * Enable Reset Control Reg - "RSTE" is the magic word that let us go + */ + immap->reset.rpr = 0x52535445; + + /* Verify Reset Control Reg is enabled */ + while (!((immap->reset.rcer) & RCER_CRE)) + ; + + printf ("Resetting the board.\n"); + udelay(200); + + /* Perform reset */ + immap->reset.rcr = RCR_SWHR; + + /* Unreached... */ + return 1; +} + + +/* + * Get timebase clock frequency (like cpu_clk in Hz) + */ +unsigned long get_tbclk (void) +{ + ulong tbclk; + + tbclk = (gd->bus_clk + 3L) / 4L; + + return tbclk; +} + + +#if defined(CONFIG_WATCHDOG) +void watchdog_reset (void) +{ + int re_enable = disable_interrupts (); + + /* Reset watchdog */ + volatile immap_t *immr = (immap_t *) CFG_IMMR; + immr->wdt.swsrr = 0x556c; + immr->wdt.swsrr = 0xaa39; + + if (re_enable) + enable_interrupts (); +} +#endif -- cgit v1.1 From 6b309f22a724fad8418e811751a0741b893419cf Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Sun, 12 Aug 2007 20:35:49 +0200 Subject: Minor alignment of output Signed-off-by: Wolfgang Denk --- cpu/mpc512x/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'cpu/mpc512x/cpu.c') diff --git a/cpu/mpc512x/cpu.c b/cpu/mpc512x/cpu.c index 3be565a..3f2e3ad 100644 --- a/cpu/mpc512x/cpu.c +++ b/cpu/mpc512x/cpu.c @@ -42,7 +42,7 @@ int checkcpu (void) u32 spridr = immr->sysconf.spridr; char buf[32]; - puts("CPU: "); + puts("CPU: "); switch (spridr & 0xffff0000) { case SPR_5121E: -- cgit v1.1 From 77d19a8bf3b0b1e401cb9f23c81e2ef419705c1a Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Sun, 12 Aug 2007 21:34:34 +0200 Subject: Minor alignment of output, 2nd try. Also update CHANGELOG Signed-off-by: Wolfgang Denk --- cpu/mpc512x/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'cpu/mpc512x/cpu.c') diff --git a/cpu/mpc512x/cpu.c b/cpu/mpc512x/cpu.c index 3f2e3ad..accae6e 100644 --- a/cpu/mpc512x/cpu.c +++ b/cpu/mpc512x/cpu.c @@ -42,7 +42,7 @@ int checkcpu (void) u32 spridr = immr->sysconf.spridr; char buf[32]; - puts("CPU: "); + puts ("CPU: "); switch (spridr & 0xffff0000) { case SPR_5121E: -- cgit v1.1