From ff36fd8591776405eeb3a086ba1136bf1ece2ffb Mon Sep 17 00:00:00 2001
From: wdenk <wdenk>
Date: Sun, 9 Jan 2005 22:28:56 +0000
Subject: * Patch by Leif Lindholm, 23 Sep 2004:   add support for the AMD
 db1550 board

* Patch by Travis Sawyer, 15 Sep 2004:
  Add CONFIG_SERIAL_MULTI support for ppc4xx,
  update README.serial_multi
---
 cpu/mips/au1x00_eth.c    | 5 +++++
 cpu/mips/au1x00_serial.c | 4 ++--
 2 files changed, 7 insertions(+), 2 deletions(-)

(limited to 'cpu/mips')

diff --git a/cpu/mips/au1x00_eth.c b/cpu/mips/au1x00_eth.c
index 4f68a9b..b8219bf 100644
--- a/cpu/mips/au1x00_eth.c
+++ b/cpu/mips/au1x00_eth.c
@@ -46,10 +46,15 @@
 #define ETH0_BASE AU1500_ETH0_BASE
 #define MAC0_ENABLE AU1500_MAC0_ENABLE
 #else
+#ifdef CONFIG_AU1550
+#define ETH0_BASE AU1550_ETH0_BASE
+#define MAC0_ENABLE AU1550_MAC0_ENABLE
+#else
 #error "No valid cpu set"
 #endif
 #endif
 #endif
+#endif
 
 #include <common.h>
 #include <malloc.h>
diff --git a/cpu/mips/au1x00_serial.c b/cpu/mips/au1x00_serial.c
index 99e2489..ac75da5 100644
--- a/cpu/mips/au1x00_serial.c
+++ b/cpu/mips/au1x00_serial.c
@@ -71,8 +71,8 @@ void serial_setbrg (void)
 	volatile u32 *uart_clk = (volatile u32*)(UART0_ADDR+UART_CLK);
 	volatile u32 *uart_lcr = (volatile u32*)(UART0_ADDR+UART_LCR);
 
-	/* Set baudrate to 115200 */
-	*uart_clk = 0x36;
+	/* Set baudrate - FIXME for bus speeds != CPU/2 */
+	*uart_clk = ((CFG_HZ/(CONFIG_BAUDRATE * 64)));
 
 	/* Set parity, stop bits and word length to 8N1 */
 	*uart_lcr = UART_LCR_WLEN8;
-- 
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