From f01320459736f156707425cf8112f98606301aa4 Mon Sep 17 00:00:00 2001 From: Shinya Kuribayashi Date: Sat, 27 Oct 2007 15:00:25 +0900 Subject: [MIPS] au1x00_eth.c: Fix au1x00_miiphy_{read,write} build error au1x00_eth.c: In function 'au1x00_enet_initialize': au1x00_eth.c:246: error: 'au1x00_miiphy_read' undeclared (first use in this function) au1x00_eth.c:246: error: (Each undeclared identifier is reported only once au1x00_eth.c:246: error: for each function it appears in.) au1x00_eth.c:246: error: 'au1x00_miiphy_write' undeclared (first use in this function) au1x00_eth.c: In function 'au1x00_miiphy_write': au1x00_eth.c:298: warning: 'return' with no value, in function returning non-void make[1]: *** [au1x00_eth.o] Error 1 Fixed by moving these two functions forward. Signed-off-by: Shinya Kuribayashi --- cpu/mips/au1x00_eth.c | 118 +++++++++++++++++++++++++------------------------- 1 file changed, 59 insertions(+), 59 deletions(-) (limited to 'cpu/mips') diff --git a/cpu/mips/au1x00_eth.c b/cpu/mips/au1x00_eth.c index b69741a..23f2f94 100644 --- a/cpu/mips/au1x00_eth.c +++ b/cpu/mips/au1x00_eth.c @@ -90,6 +90,65 @@ mac_fifo_t mac_fifo[NO_OF_FIFOS]; #define MAX_WAIT 1000 +#if defined(CONFIG_CMD_MII) +int au1x00_miiphy_read(char *devname, unsigned char addr, + unsigned char reg, unsigned short * value) +{ + volatile u32 *mii_control_reg = (volatile u32*)(ETH0_BASE+MAC_MII_CNTRL); + volatile u32 *mii_data_reg = (volatile u32*)(ETH0_BASE+MAC_MII_DATA); + u32 mii_control; + unsigned int timedout = 20; + + while (*mii_control_reg & MAC_MII_BUSY) { + udelay(1000); + if (--timedout == 0) { + printf("au1x00_eth: miiphy_read busy timeout!!\n"); + return -1; + } + } + + mii_control = MAC_SET_MII_SELECT_REG(reg) | + MAC_SET_MII_SELECT_PHY(addr) | MAC_MII_READ; + + *mii_control_reg = mii_control; + + timedout = 20; + while (*mii_control_reg & MAC_MII_BUSY) { + udelay(1000); + if (--timedout == 0) { + printf("au1x00_eth: miiphy_read busy timeout!!\n"); + return -1; + } + } + *value = *mii_data_reg; + return 0; +} + +int au1x00_miiphy_write(char *devname, unsigned char addr, + unsigned char reg, unsigned short value) +{ + volatile u32 *mii_control_reg = (volatile u32*)(ETH0_BASE+MAC_MII_CNTRL); + volatile u32 *mii_data_reg = (volatile u32*)(ETH0_BASE+MAC_MII_DATA); + u32 mii_control; + unsigned int timedout = 20; + + while (*mii_control_reg & MAC_MII_BUSY) { + udelay(1000); + if (--timedout == 0) { + printf("au1x00_eth: miiphy_write busy timeout!!\n"); + return; + } + } + + mii_control = MAC_SET_MII_SELECT_REG(reg) | + MAC_SET_MII_SELECT_PHY(addr) | MAC_MII_WRITE; + + *mii_data_reg = value; + *mii_control_reg = mii_control; + return 0; +} +#endif + static int au1x00_send(struct eth_device* dev, volatile void *packet, int length){ volatile mac_fifo_t *fifo_tx = (volatile mac_fifo_t*)(MAC0_TX_DMA_ADDR+MAC_TX_BUFF0_STATUS); @@ -249,63 +308,4 @@ int au1x00_enet_initialize(bd_t *bis){ return 1; } -#if defined(CONFIG_CMD_MII) -int au1x00_miiphy_read(char *devname, unsigned char addr, - unsigned char reg, unsigned short * value) -{ - volatile u32 *mii_control_reg = (volatile u32*)(ETH0_BASE+MAC_MII_CNTRL); - volatile u32 *mii_data_reg = (volatile u32*)(ETH0_BASE+MAC_MII_DATA); - u32 mii_control; - unsigned int timedout = 20; - - while (*mii_control_reg & MAC_MII_BUSY) { - udelay(1000); - if (--timedout == 0) { - printf("au1x00_eth: miiphy_read busy timeout!!\n"); - return -1; - } - } - - mii_control = MAC_SET_MII_SELECT_REG(reg) | - MAC_SET_MII_SELECT_PHY(addr) | MAC_MII_READ; - - *mii_control_reg = mii_control; - - timedout = 20; - while (*mii_control_reg & MAC_MII_BUSY) { - udelay(1000); - if (--timedout == 0) { - printf("au1x00_eth: miiphy_read busy timeout!!\n"); - return -1; - } - } - *value = *mii_data_reg; - return 0; -} - -int au1x00_miiphy_write(char *devname, unsigned char addr, - unsigned char reg, unsigned short value) -{ - volatile u32 *mii_control_reg = (volatile u32*)(ETH0_BASE+MAC_MII_CNTRL); - volatile u32 *mii_data_reg = (volatile u32*)(ETH0_BASE+MAC_MII_DATA); - u32 mii_control; - unsigned int timedout = 20; - - while (*mii_control_reg & MAC_MII_BUSY) { - udelay(1000); - if (--timedout == 0) { - printf("au1x00_eth: miiphy_write busy timeout!!\n"); - return; - } - } - - mii_control = MAC_SET_MII_SELECT_REG(reg) | - MAC_SET_MII_SELECT_PHY(addr) | MAC_MII_WRITE; - - *mii_data_reg = value; - *mii_control_reg = mii_control; - return 0; -} -#endif - #endif /* CONFIG_AU1X00 */ -- cgit v1.1 From 4fbd0741b2b6441da10be93e10267122581b7079 Mon Sep 17 00:00:00 2001 From: Shinya Kuribayashi Date: Sat, 27 Oct 2007 15:22:33 +0900 Subject: [MIPS] au1x00_eth.c: Fixed a warning on pb1000 build. au1x00_eth.c: In function 'au1x00_miiphy_write': au1x00_eth.c:139: warning: 'return' with no value, in function returning non-void Signed-off-by: Shinya Kuribayashi --- cpu/mips/au1x00_eth.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'cpu/mips') diff --git a/cpu/mips/au1x00_eth.c b/cpu/mips/au1x00_eth.c index 23f2f94..d70c5fe 100644 --- a/cpu/mips/au1x00_eth.c +++ b/cpu/mips/au1x00_eth.c @@ -136,7 +136,7 @@ int au1x00_miiphy_write(char *devname, unsigned char addr, udelay(1000); if (--timedout == 0) { printf("au1x00_eth: miiphy_write busy timeout!!\n"); - return; + return -1; } } -- cgit v1.1 From 03c031d5660ea946c39af6e2e16267da857c609f Mon Sep 17 00:00:00 2001 From: Shinya Kuribayashi Date: Sat, 27 Oct 2007 15:27:06 +0900 Subject: [MIPS] MIPS 4K core: Coding style cleanups No logical changes. Signed-off-by: Shinya Kuribayashi --- cpu/mips/cache.S | 30 +++++++++++++----------------- cpu/mips/cpu.c | 6 +++--- cpu/mips/start.S | 50 +++++++++++++++++++++++--------------------------- 3 files changed, 39 insertions(+), 47 deletions(-) (limited to 'cpu/mips') diff --git a/cpu/mips/cache.S b/cpu/mips/cache.S index aad76e0..443240e 100644 --- a/cpu/mips/cache.S +++ b/cpu/mips/cache.S @@ -22,7 +22,6 @@ * MA 02111-1307 USA */ - #include #include #include @@ -30,13 +29,11 @@ #include #include - /* 16KB is the maximum size of instruction and data caches on * MIPS 4K. */ #define MIPS_MAX_CACHE_SIZE 0x4000 - /* * cacheop macro to automate cache operations * first some helpers... @@ -131,7 +128,6 @@ mips_cache_reset: li t4, CFG_CACHELINE_SIZE move t5, t4 - li v0, MIPS_MAX_CACHE_SIZE /* Now clear that much memory starting from zero. @@ -139,8 +135,8 @@ mips_cache_reset: li a0, KSEG1 addu a1, a0, v0 - -2: sw zero, 0(a0) +2: + sw zero, 0(a0) sw zero, 4(a0) sw zero, 8(a0) sw zero, 12(a0) @@ -156,11 +152,11 @@ mips_cache_reset: mtc0 zero, CP0_TAGLO - /* - * The caches are probably in an indeterminate state, - * so we force good parity into them by doing an - * invalidate, load/fill, invalidate for each line. - */ + /* + * The caches are probably in an indeterminate state, + * so we force good parity into them by doing an + * invalidate, load/fill, invalidate for each line. + */ /* Assume bottom of RAM will generate good parity for the cache. */ @@ -201,9 +197,9 @@ mips_cache_reset: move a1, a2 icacheop(a0,a1,a2,a3,Index_Store_Tag_D) - j ra - .end mips_cache_reset + j ra + .end mips_cache_reset /******************************************************************************* * @@ -220,7 +216,7 @@ dcache_status: andi v0, v0, 1 j ra - .end dcache_status + .end dcache_status /******************************************************************************* * @@ -237,11 +233,10 @@ dcache_disable: li t1, -8 and t0, t0, t1 ori t0, t0, CONF_CM_UNCACHED - mtc0 t0, CP0_CONFIG + mtc0 t0, CP0_CONFIG j ra - .end dcache_disable - + .end dcache_disable /******************************************************************************* * @@ -266,4 +261,5 @@ mips_cache_lock: icacheop(a0,a1,a2,a3,0x1d) j ra + .end mips_cache_lock diff --git a/cpu/mips/cpu.c b/cpu/mips/cpu.c index f48675e..7559ac6 100644 --- a/cpu/mips/cpu.c +++ b/cpu/mips/cpu.c @@ -39,12 +39,12 @@ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) return 0; } -void flush_cache (ulong start_addr, ulong size) +void flush_cache(ulong start_addr, ulong size) { - } -void write_one_tlb( int index, u32 pagemask, u32 hi, u32 low0, u32 low1 ){ +void write_one_tlb(int index, u32 pagemask, u32 hi, u32 low0, u32 low1) +{ write_32bit_cp0_register(CP0_ENTRYLO0, low0); write_32bit_cp0_register(CP0_PAGEMASK, pagemask); write_32bit_cp0_register(CP0_ENTRYLO1, low1); diff --git a/cpu/mips/start.S b/cpu/mips/start.S index 074d01d..5a278b6 100644 --- a/cpu/mips/start.S +++ b/cpu/mips/start.S @@ -22,13 +22,11 @@ * MA 02111-1307 USA */ - #include #include #include #include - #define RVECENT(f,n) \ b f; nop #define XVECENT(f,bev) \ @@ -192,7 +190,7 @@ _start: .word 0x00000000 .word 0x03e00008 .word 0x00000000 - .word 0x00000000 + .word 0x00000000 /* 0xbfc00428 */ .word 0xdc870000 .word 0xfca70000 @@ -203,7 +201,7 @@ _start: .word 0x00000000 .word 0x03e00008 .word 0x00000000 - .word 0x00000000 + .word 0x00000000 #endif /* CONFIG_PURPLE */ .align 4 reset: @@ -235,33 +233,33 @@ reset: mtc0 t0, CP0_CONFIG /* Initialize $gp. - */ - bal 1f + */ + bal 1f nop .word _gp - 1: - move gp, ra - lw t1, 0(ra) +1: + move gp, ra + lw t1, 0(ra) move gp, t1 #ifdef CONFIG_INCA_IP /* Disable INCA-IP Watchdog. */ - la t9, disable_incaip_wdt - jalr t9 + la t9, disable_incaip_wdt + jalr t9 nop #endif /* Initialize any external memory. */ - la t9, lowlevel_init - jalr t9 + la t9, lowlevel_init + jalr t9 nop /* Initialize caches... */ - la t9, mips_cache_reset - jalr t9 + la t9, mips_cache_reset + jalr t9 nop /* ... and enable them. @@ -269,12 +267,11 @@ reset: li t0, CONF_CM_CACHABLE_NONCOHERENT mtc0 t0, CP0_CONFIG - /* Set up temporary stack. */ li a0, CFG_INIT_SP_OFFSET - la t9, mips_cache_lock - jalr t9 + la t9, mips_cache_lock + jalr t9 nop li t0, CFG_SDRAM_BASE + CFG_INIT_SP_OFFSET @@ -284,7 +281,6 @@ reset: j t9 nop - /* * void relocate_code (addr_sp, gd, addr_moni) * @@ -298,7 +294,7 @@ reset: .globl relocate_code .ent relocate_code relocate_code: - move sp, a0 /* Set new stack pointer */ + move sp, a0 /* Set new stack pointer */ li t0, CFG_MONITOR_BASE la t3, in_ram @@ -312,8 +308,8 @@ relocate_code: */ move t6, gp sub gp, CFG_MONITOR_BASE - add gp, a2 /* gp now adjusted */ - sub t6, gp, t6 /* t6 <-- relocation offset */ + add gp, a2 /* gp now adjusted */ + sub t6, gp, t6 /* t6 <-- relocation offset */ /* * t0 = source address @@ -329,7 +325,7 @@ relocate_code: sw t3, 0(t1) addu t0, 4 ble t0, t2, 1b - addu t1, 4 /* delay slot */ + addu t1, 4 /* delay slot */ #endif /* If caches were enabled, we would have to flush them here. @@ -376,7 +372,8 @@ in_ram: add t2, t6 sub t1, 4 -1: addi t1, 4 +1: + addi t1, 4 bltl t1, t2, 1b sw zero, 0(t1) /* delay slot */ @@ -387,11 +384,10 @@ in_ram: .end relocate_code - /* Exception handlers. */ romReserved: - b romReserved + b romReserved romExcHandle: - b romExcHandle + b romExcHandle -- cgit v1.1 From 16664f72850846e645616da1c0fa5afcd6d15f15 Mon Sep 17 00:00:00 2001 From: Shinya Kuribayashi Date: Sat, 17 Nov 2007 20:05:26 +0900 Subject: [MIPS] Remove useless instructions for initializing $gp. Signed-off-by: Shinya Kuribayashi --- cpu/mips/start.S | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'cpu/mips') diff --git a/cpu/mips/start.S b/cpu/mips/start.S index 5a278b6..c92b162 100644 --- a/cpu/mips/start.S +++ b/cpu/mips/start.S @@ -238,9 +238,7 @@ reset: nop .word _gp 1: - move gp, ra - lw t1, 0(ra) - move gp, t1 + lw gp, 0(ra) #ifdef CONFIG_INCA_IP /* Disable INCA-IP Watchdog. -- cgit v1.1 From 7e1d884b7cb602007329c517ec1c453e3a6a5d9c Mon Sep 17 00:00:00 2001 From: Shinya Kuribayashi Date: Sat, 17 Nov 2007 20:05:26 +0900 Subject: [MIPS] cpu/mips/config.mk: Fix GNU assembler minor version picker Current trick to pick up GNU assembler minor version does not work with the latest binutils (2007-03-01 or later) due to ${PKGVERSION} now default to "(GNU Binutils) ". $ sde-as --version |grep "GNU assembler" GNU assembler 2.15.94 mipssde-6.02.02-20050602 $ sde-as --version |grep "GNU assembler" |awk '{print $3}' 2.15.94 $ sde-as --version |grep "GNU assembler" |awk '{print $3}' |awk -F. '{print $2}' 15 $ $ mips-linux-as --version |grep "GNU assembler" GNU assembler (GNU Binutils) 2.18 $ mips-linux-as --version |grep "GNU assembler" |awk '{print $3}' (GNU $ mips-linux-as --version |grep "GNU assembler" |awk '{print $3}' |awk -F. '{print $2}' (no output) $ As a result of above, you'll see many noises with such binutils: make -C cpu/mips/ /bin/sh: line 0: [: : integer expression expected /bin/sh: line 0: [: : integer expression expected make[1]: Entering directory `/home/skuribay/devel/u-boot.git/cpu/mips' mips-linux-gcc -D__ASSEMBLY__ -g -Os -D__KERNEL__ -DTEXT_BASE=0xB0000000 -I/home/skuribay/devel/u-boot.git/include -fno-builtin -ffreestanding -nostdinc -isystem /home/skuribay/devel/buildroot/build_mips/staging_dir/usr/bin/../lib/gcc/mips-linux-uclibc/4.2.1/include -pipe -DCONFIG_MIPS -D__MIPS__ -G 0 -mabicalls -fpic -pipe -msoft-float -march=4kc -mtune=4kc -EB -c -o incaip_wdt.o incaip_wdt.S /bin/sh: line 0: [: : integer expression expected mips-linux-gcc -D__ASSEMBLY__ -g -Os -D__KERNEL__ -DTEXT_BASE=0xB0000000 -I/home/skuribay/devel/u-boot.git/include -fno-builtin -ffreestanding -nostdinc -isystem /home/skuribay/devel/buildroot/build_mips/staging_dir/usr/bin/../lib/gcc/mips-linux-uclibc/4.2.1/include -pipe -DCONFIG_MIPS -D__MIPS__ -G 0 -mabicalls -fpic -pipe -msoft-float -march=4kc -mtune=4kc -EB -c -o cache.o cache.S /bin/sh: line 0: [: : integer expression expected mips-linux-gcc -g -Os -D__KERNEL__ -DTEXT_BASE=0xB0000000 -I/home/skuribay/devel/u-boot.git/include -fno-builtin -ffreestanding -nostdinc -isystem /home/skuribay/devel/buildroot/build_mips/staging_dir/usr/bin/../lib/gcc/mips-linux-uclibc/4.2.1/include -pipe -DCONFIG_MIPS -D__MIPS__ -G 0 -mabicalls -fpic -pipe -msoft-float -march=4kc -mtune=4kc -EB -Wall -Wstrict-prototypes -c -o asc_serial.o asc_serial.c /bin/sh: line 0: [: : integer expression expected This patch simplifies the trick and makes it work with both versions of gas. I also replace an expensive `awk (or gawk)' with `cut'. Signed-off-by: Shinya Kuribayashi --- cpu/mips/config.mk | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'cpu/mips') diff --git a/cpu/mips/config.mk b/cpu/mips/config.mk index 487c4eb..ad03bd6 100644 --- a/cpu/mips/config.mk +++ b/cpu/mips/config.mk @@ -20,8 +20,7 @@ # Foundation, Inc., 59 Temple Place, Suite 330, Boston, # MA 02111-1307 USA # -v=$(shell \ -$(CROSS_COMPILE)as --version|grep "GNU assembler"|awk '{print $$3}'|awk -F . '{print $$2}') +v=$(shell $(AS) --version |grep "GNU assembler" |cut -d. -f2) MIPSFLAGS=$(shell \ if [ "$v" -lt "14" ]; then \ echo "-mcpu=4kc"; \ -- cgit v1.1