From eacbd317757327e8e7f018f5701c950429c4c6ae Mon Sep 17 00:00:00 2001 From: "Zachary P. Landau" Date: Thu, 26 Jan 2006 17:35:56 -0500 Subject: Add support for Freescale M5271 processor --- cpu/mcf52x2/fec.c | 22 +++++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-) (limited to 'cpu/mcf52x2/fec.c') diff --git a/cpu/mcf52x2/fec.c b/cpu/mcf52x2/fec.c index a5c50af..f207dd6 100644 --- a/cpu/mcf52x2/fec.c +++ b/cpu/mcf52x2/fec.c @@ -25,6 +25,11 @@ #include #include +#ifdef CONFIG_M5271 +#include +#include +#endif + #ifdef CONFIG_M5272 #include #include @@ -41,7 +46,7 @@ #ifdef CONFIG_M5272 #define FEC_ADDR (CFG_MBAR + 0x840) #endif -#ifdef CONFIG_M5282 +#if defined(CONFIG_M5282) || defined(CONFIG_M5271) #define FEC_ADDR (CFG_MBAR + 0x1000) #endif @@ -240,10 +245,22 @@ int eth_init (bd_t * bd) #endif #undef ea +#ifdef CONFIG_M5271 + /* Clear multicast address hash table + */ + fecp->fec_ghash_table_high = 0; + fecp->fec_ghash_table_low = 0; + + /* Clear individual address hash table + */ + fecp->fec_ihash_table_high = 0; + fecp->fec_ihash_table_low = 0; +#else /* Clear multicast address hash table */ fecp->fec_hash_table_high = 0; fecp->fec_hash_table_low = 0; +#endif /* Set maximum receive buffer size. */ @@ -295,6 +312,9 @@ int eth_init (bd_t * bd) fecp->fec_x_cntrl = FEC_TCNTRL_FDEN; #else /* Half duplex mode */ fecp->fec_r_cntrl = FEC_RCNTRL_MII_MODE | FEC_RCNTRL_DRT; +#ifdef CONFIG_M5271 + fecp->fec_r_cntrl |= (PKT_MAXBUF_SIZE << 16); /* set max frame length */ +#endif fecp->fec_x_cntrl = 0; #endif /* Set MII speed */ -- cgit v1.1