From 74f4304ee717d0f4b3a27e7fd4a64944749b8783 Mon Sep 17 00:00:00 2001
From: Wolfgang Denk <wd@pollux.(none)>
Date: Sun, 25 Sep 2005 01:48:28 +0200
Subject: Add ARM946E cpu and core module targets; remap memory to 0x00000000
 Patch by Peter Pearse, 2 Feb 2005

---
 cpu/arm920t/cpu.c        | 16 +++++++++-------
 cpu/arm920t/interrupts.c |  8 +++++++-
 2 files changed, 16 insertions(+), 8 deletions(-)

(limited to 'cpu/arm920t')

diff --git a/cpu/arm920t/cpu.c b/cpu/arm920t/cpu.c
index 718f253..2f7963d 100644
--- a/cpu/arm920t/cpu.c
+++ b/cpu/arm920t/cpu.c
@@ -39,7 +39,7 @@ static unsigned long read_p15_c1 (void)
 	unsigned long value;
 
 	__asm__ __volatile__(
-		"mrc     p15, 0, %0, c1, c0, 0   @ read control reg\n"
+		"mrc	p15, 0, %0, c1, c0, 0   @ read control reg\n"
 		: "=r" (value)
 		:
 		: "memory");
@@ -57,7 +57,7 @@ static void write_p15_c1 (unsigned long value)
 	printf ("write %08lx to p15/c1\n", value);
 #endif
 	__asm__ __volatile__(
-		"mcr     p15, 0, %0, c1, c0, 0   @ write it back\n"
+		"mcr	p15, 0, %0, c1, c0, 0   @ write it back\n"
 		:
 		: "r" (value)
 		: "memory");
@@ -73,16 +73,17 @@ static void cp_delay (void)
 	for (i = 0; i < 100; i++);
 }
 
-/* See also ARM Ref. Man. */
+/* See also ARM920T    Technical reference Manual */
 #define C1_MMU		(1<<0)		/* mmu off/on */
 #define C1_ALIGN	(1<<1)		/* alignment faults off/on */
 #define C1_DC		(1<<2)		/* dcache off/on */
-#define C1_BIG_ENDIAN	(1<<7)	/* big endian off/on */
+
+#define C1_BIG_ENDIAN	(1<<7)		/* big endian off/on */
 #define C1_SYS_PROT	(1<<8)		/* system protection */
 #define C1_ROM_PROT	(1<<9)		/* ROM protection */
 #define C1_IC		(1<<12)		/* icache off/on */
-#define C1_HIGH_VECTORS	(1<<13)	/* location of vectors: low/high addresses */
-#define RESERVED_1	(0xf << 3)	/* must be 111b for R/W */
+#define C1_HIGH_VECTORS	(1<<13)		/* location of vectors: low/high addresses */
+
 
 int cpu_init (void)
 {
@@ -119,6 +120,7 @@ int cleanup_before_linux (void)
 	/* flush I/D-cache */
 	i = 0;
 	asm ("mcr p15, 0, %0, c7, c7, 0": :"r" (i));
+
 	return (0);
 }
 
@@ -134,7 +136,7 @@ void icache_enable (void)
 {
 	ulong reg;
 
-	reg = read_p15_c1 ();
+	reg = read_p15_c1 ();		/* get control reg. */
 	cp_delay ();
 	write_p15_c1 (reg | C1_IC);
 }
diff --git a/cpu/arm920t/interrupts.c b/cpu/arm920t/interrupts.c
index bfab519..1d254c7 100644
--- a/cpu/arm920t/interrupts.c
+++ b/cpu/arm920t/interrupts.c
@@ -30,7 +30,6 @@
  */
 
 #include <common.h>
-
 #include <arm920t.h>
 #include <asm/proc-armv/ptrace.h>
 
@@ -162,7 +161,14 @@ void do_fiq (struct pt_regs *pt_regs)
 
 void do_irq (struct pt_regs *pt_regs)
 {
+#if defined (CONFIG_USE_IRQ) && defined (CONFIG_ARCH_INTEGRATOR)
+	/* ASSUMED to be a timer interrupt  */
+	/* Just clear it - count handled in */
+	/* integratorap.c                   */
+	*(volatile ulong *)(CFG_TIMERBASE + 0x0C) = 0;	
+#else
 	printf ("interrupt request\n");
 	show_regs (pt_regs);
 	bad_mode ();
+#endif
 }
-- 
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