From de5e5cea022ab44006ff1edf45a39f0943fb9dff Mon Sep 17 00:00:00 2001 From: Chris Zankel Date: Wed, 10 Aug 2016 18:36:43 +0300 Subject: xtensa: add support for the xtensa processor architecture [1/2] The Xtensa processor architecture is a configurable, extensible, and synthesizable 32-bit RISC processor core provided by Cadence. This is the first part of the basic architecture port with changes to common files. The 'arch/xtensa' directory, and boards and additional drivers will be in separate commits. Signed-off-by: Chris Zankel Signed-off-by: Max Filippov Reviewed-by: Simon Glass Reviewed-by: Tom Rini --- cmd/bdinfo.c | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'cmd') diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c index 637463e..e0bd15d 100644 --- a/cmd/bdinfo.c +++ b/cmd/bdinfo.c @@ -524,6 +524,14 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) return 0; } +#elif defined(CONFIG_XTENSA) + +int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + print_std_bdinfo(gd->bd); + return 0; +} + #else #error "a case for this architecture does not exist!" #endif -- cgit v1.1