From f69766e4b5d47ecd3aa58677a8da875694f364f2 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Wed, 30 Jan 2008 14:55:14 -0600 Subject: 85xx: Add the concept of CFG_CCSRBAR_PHYS When we go to 36-bit physical addresses we need to keep the concept of the physical CCSRBAR address seperate from the virtual one. For the majority of boards CFG_CCSBAR_PHYS == CFG_CCSRBAR Signed-off-by: Kumar Gala --- board/atum8548/tlb.c | 2 +- board/freescale/mpc8540ads/tlb.c | 2 +- board/freescale/mpc8541cds/tlb.c | 2 +- board/freescale/mpc8544ds/tlb.c | 2 +- board/freescale/mpc8548cds/tlb.c | 2 +- board/freescale/mpc8555cds/tlb.c | 2 +- board/freescale/mpc8560ads/tlb.c | 2 +- board/freescale/mpc8568mds/tlb.c | 2 +- board/mpc8540eval/tlb.c | 2 +- board/pm854/tlb.c | 2 +- board/pm856/tlb.c | 2 +- board/sbc8548/tlb.c | 2 +- board/sbc8560/tlb.c | 2 +- board/stxgp3/tlb.c | 2 +- board/stxssa/tlb.c | 2 +- board/tqm85xx/tlb.c | 2 +- 16 files changed, 16 insertions(+), 16 deletions(-) (limited to 'board') diff --git a/board/atum8548/tlb.c b/board/atum8548/tlb.c index bb6ce76..1ef4de4 100644 --- a/board/atum8548/tlb.c +++ b/board/atum8548/tlb.c @@ -82,7 +82,7 @@ struct fsl_e_tlb_entry tlb_table[] = { * 0xe210_0000 1M PCI2 IO * 0xe300_0000 1M PCIe IO */ - SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR, + SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 5, BOOKE_PAGESZ_64M, 1), }; diff --git a/board/freescale/mpc8540ads/tlb.c b/board/freescale/mpc8540ads/tlb.c index 3eaff01..4fe2862 100644 --- a/board/freescale/mpc8540ads/tlb.c +++ b/board/freescale/mpc8540ads/tlb.c @@ -87,7 +87,7 @@ struct fsl_e_tlb_entry tlb_table[] = { * 0xe000_0000 1M CCSRBAR * 0xe200_0000 16M PCI1 IO */ - SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR, + SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 5, BOOKE_PAGESZ_64M, 1), diff --git a/board/freescale/mpc8541cds/tlb.c b/board/freescale/mpc8541cds/tlb.c index 92f759b..c5434a0 100644 --- a/board/freescale/mpc8541cds/tlb.c +++ b/board/freescale/mpc8541cds/tlb.c @@ -88,7 +88,7 @@ struct fsl_e_tlb_entry tlb_table[] = { * 0xe200_0000 16M PCI1 IO * 0xe300_0000 16M PCI2 IO */ - SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR, + SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 5, BOOKE_PAGESZ_64M, 1), diff --git a/board/freescale/mpc8544ds/tlb.c b/board/freescale/mpc8544ds/tlb.c index 34cfb38..61fc609 100644 --- a/board/freescale/mpc8544ds/tlb.c +++ b/board/freescale/mpc8544ds/tlb.c @@ -75,7 +75,7 @@ struct fsl_e_tlb_entry tlb_table[] = { * 0xe000_0000 1M CCSRBAR * 0xe100_0000 255M PCI IO range */ - SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR, + SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 4, BOOKE_PAGESZ_64M, 1), diff --git a/board/freescale/mpc8548cds/tlb.c b/board/freescale/mpc8548cds/tlb.c index b21f71b..ab99af7 100644 --- a/board/freescale/mpc8548cds/tlb.c +++ b/board/freescale/mpc8548cds/tlb.c @@ -80,7 +80,7 @@ struct fsl_e_tlb_entry tlb_table[] = { * 0xe210_0000 1M PCI2 IO * 0xe300_0000 1M PCIe IO */ - SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR, + SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 5, BOOKE_PAGESZ_64M, 1), diff --git a/board/freescale/mpc8555cds/tlb.c b/board/freescale/mpc8555cds/tlb.c index 92f759b..c5434a0 100644 --- a/board/freescale/mpc8555cds/tlb.c +++ b/board/freescale/mpc8555cds/tlb.c @@ -88,7 +88,7 @@ struct fsl_e_tlb_entry tlb_table[] = { * 0xe200_0000 16M PCI1 IO * 0xe300_0000 16M PCI2 IO */ - SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR, + SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 5, BOOKE_PAGESZ_64M, 1), diff --git a/board/freescale/mpc8560ads/tlb.c b/board/freescale/mpc8560ads/tlb.c index 3eaff01..4fe2862 100644 --- a/board/freescale/mpc8560ads/tlb.c +++ b/board/freescale/mpc8560ads/tlb.c @@ -87,7 +87,7 @@ struct fsl_e_tlb_entry tlb_table[] = { * 0xe000_0000 1M CCSRBAR * 0xe200_0000 16M PCI1 IO */ - SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR, + SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 5, BOOKE_PAGESZ_64M, 1), diff --git a/board/freescale/mpc8568mds/tlb.c b/board/freescale/mpc8568mds/tlb.c index 225fc94..a866c52 100644 --- a/board/freescale/mpc8568mds/tlb.c +++ b/board/freescale/mpc8568mds/tlb.c @@ -74,7 +74,7 @@ struct fsl_e_tlb_entry tlb_table[] = { * 0xe200_0000 8M PCI1 IO * 0xe280_0000 8M PCIe IO */ - SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR, + SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 3, BOOKE_PAGESZ_64M, 1), diff --git a/board/mpc8540eval/tlb.c b/board/mpc8540eval/tlb.c index f041236..1003bf6 100644 --- a/board/mpc8540eval/tlb.c +++ b/board/mpc8540eval/tlb.c @@ -27,7 +27,7 @@ #include struct fsl_e_tlb_entry tlb_table[] = { - SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR, + SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 1, BOOKE_PAGESZ_1M, 1), diff --git a/board/pm854/tlb.c b/board/pm854/tlb.c index 5d87537..a7f3813 100644 --- a/board/pm854/tlb.c +++ b/board/pm854/tlb.c @@ -87,7 +87,7 @@ struct fsl_e_tlb_entry tlb_table[] = { * 0xe000_0000 1M CCSRBAR * 0xe200_0000 16M PCI1 IO */ - SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR, + SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 5, BOOKE_PAGESZ_64M, 1), diff --git a/board/pm856/tlb.c b/board/pm856/tlb.c index 5d87537..a7f3813 100644 --- a/board/pm856/tlb.c +++ b/board/pm856/tlb.c @@ -87,7 +87,7 @@ struct fsl_e_tlb_entry tlb_table[] = { * 0xe000_0000 1M CCSRBAR * 0xe200_0000 16M PCI1 IO */ - SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR, + SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 5, BOOKE_PAGESZ_64M, 1), diff --git a/board/sbc8548/tlb.c b/board/sbc8548/tlb.c index 8d6625e..6314005 100644 --- a/board/sbc8548/tlb.c +++ b/board/sbc8548/tlb.c @@ -81,7 +81,7 @@ struct fsl_e_tlb_entry tlb_table[] = { * 0xe0000000 1M CCSRBAR * 0xe2000000 16M PCI1 IO */ - SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR, + SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 4, BOOKE_PAGESZ_64M, 1), diff --git a/board/sbc8560/tlb.c b/board/sbc8560/tlb.c index 155ff64..d073399 100644 --- a/board/sbc8560/tlb.c +++ b/board/sbc8560/tlb.c @@ -28,7 +28,7 @@ struct fsl_e_tlb_entry tlb_table[] = { /* TLB for CCSRBAR (IMMR) */ - SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR, + SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 1, BOOKE_PAGESZ_1M, 1), diff --git a/board/stxgp3/tlb.c b/board/stxgp3/tlb.c index 529f230..d410416 100644 --- a/board/stxgp3/tlb.c +++ b/board/stxgp3/tlb.c @@ -87,7 +87,7 @@ struct fsl_e_tlb_entry tlb_table[] = { * 0xe000_0000 1M CCSRBAR * 0xe200_0000 16M PCI1 IO */ - SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR, + SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 5, BOOKE_PAGESZ_64M, 1), diff --git a/board/stxssa/tlb.c b/board/stxssa/tlb.c index 46b1440..86cbd11 100644 --- a/board/stxssa/tlb.c +++ b/board/stxssa/tlb.c @@ -88,7 +88,7 @@ struct fsl_e_tlb_entry tlb_table[] = { * 0xe200_0000 16M PCI1 IO * 0xe300_0000 16M PCI2 IO */ - SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR, + SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 5, BOOKE_PAGESZ_64M, 1), diff --git a/board/tqm85xx/tlb.c b/board/tqm85xx/tlb.c index a178cfe..ad26cae 100644 --- a/board/tqm85xx/tlb.c +++ b/board/tqm85xx/tlb.c @@ -91,7 +91,7 @@ struct fsl_e_tlb_entry tlb_table[] = { * 0xe000_0000 1M CCSRBAR * 0xe200_0000 16M PCI1 IO */ - SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR, + SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 6, BOOKE_PAGESZ_64M, 1), -- cgit v1.1