From 8ef583a0351590a91394499eb5ca2ab8a703d959 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Thu, 23 Dec 2010 15:40:12 -0500 Subject: miiphy: convert to linux/mii.h The include/miiphy.h header duplicates a lot of things from linux/mii.h. So punt all the things that overlap to keep the API simple and to make merging between U-Boot and Linux simpler. Signed-off-by: Mike Frysinger --- board/Marvell/rd6281a/rd6281a.c | 4 ++-- board/actux1/actux1.c | 4 ++-- board/csb272/csb272.c | 6 +++--- board/csb472/csb472.c | 6 +++--- board/evb64260/eth.c | 16 ++++++++-------- board/freescale/mpc8260ads/mpc8260ads.c | 12 ++++++------ board/freescale/mpc8560ads/mpc8560ads.c | 6 +++--- board/manroland/uc100/uc100.c | 4 ++-- board/netphone/netphone.c | 8 ++++---- board/netta/netta.c | 8 ++++---- board/netta2/netta2.c | 8 ++++---- board/prodrive/p3mx/mv_eth.c | 30 +++++++++++++++--------------- board/sbc8560/sbc8560.c | 6 +++--- board/stx/stxgp3/stxgp3.c | 6 +++--- board/stx/stxssa/stxssa.c | 6 +++--- board/stx/stxxtc/stxxtc.c | 6 +++--- board/tqc/tqm8xx/tqm8xx.c | 6 +++--- 17 files changed, 71 insertions(+), 71 deletions(-) (limited to 'board') diff --git a/board/Marvell/rd6281a/rd6281a.c b/board/Marvell/rd6281a/rd6281a.c index e69e035..ecdea82 100644 --- a/board/Marvell/rd6281a/rd6281a.c +++ b/board/Marvell/rd6281a/rd6281a.c @@ -139,11 +139,11 @@ void mv_phy_88e1116_init(char *name) miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0); /* reset the phy */ - if (miiphy_read (name, devadr, PHY_BMCR, ®) != 0) { + if (miiphy_read (name, devadr, MII_BMCR, ®) != 0) { printf("Err..(%s) PHY status read failed\n", __FUNCTION__); return; } - if (miiphy_write (name, devadr, PHY_BMCR, reg | 0x8000) != 0) { + if (miiphy_write (name, devadr, MII_BMCR, reg | 0x8000) != 0) { printf("Err..(%s) PHY reset failed\n", __FUNCTION__); return; } diff --git a/board/actux1/actux1.c b/board/actux1/actux1.c index 399be23..e73aff8 100644 --- a/board/actux1/actux1.c +++ b/board/actux1/actux1.c @@ -140,8 +140,8 @@ void reset_phy (void) /* initialize the PHY */ miiphy_reset ("NPE0", CONFIG_PHY_ADDR); - miiphy_read ("NPE0", CONFIG_PHY_ADDR, PHY_PHYIDR1, &id1); - miiphy_read ("NPE0", CONFIG_PHY_ADDR, PHY_PHYIDR2, &id2); + miiphy_read ("NPE0", CONFIG_PHY_ADDR, MII_PHYSID1, &id1); + miiphy_read ("NPE0", CONFIG_PHY_ADDR, MII_PHYSID2, &id2); id2 &= 0xFFF0; /* mask out revision bits */ diff --git a/board/csb272/csb272.c b/board/csb272/csb272.c index e248aa7..8b36127 100644 --- a/board/csb272/csb272.c +++ b/board/csb272/csb272.c @@ -176,11 +176,11 @@ int last_stage_init(void) miiphy_reset("ppc_4xx_eth0", CONFIG_PHY_ADDR); /* AUTO neg */ - miiphy_write("ppc_4xx_eth0", CONFIG_PHY_ADDR, PHY_BMCR, - PHY_BMCR_AUTON | PHY_BMCR_RST_NEG); + miiphy_write("ppc_4xx_eth0", CONFIG_PHY_ADDR, MII_BMCR, + BMCR_ANENABLE | BMCR_ANRESTART); /* LEDs */ - miiphy_write("ppc_4xx_eth0", CONFIG_PHY_ADDR, PHY_FCSCR, 0x0d08); + miiphy_write("ppc_4xx_eth0", CONFIG_PHY_ADDR, MII_NWAYTEST, 0x0d08); return 0; /* success */ diff --git a/board/csb472/csb472.c b/board/csb472/csb472.c index 25709f2..eac4408 100644 --- a/board/csb472/csb472.c +++ b/board/csb472/csb472.c @@ -144,11 +144,11 @@ int last_stage_init(void) miiphy_reset("ppc_4xx_eth0", CONFIG_PHY_ADDR); /* AUTO neg */ - miiphy_write("ppc_4xx_eth0", CONFIG_PHY_ADDR, PHY_BMCR, - PHY_BMCR_AUTON | PHY_BMCR_RST_NEG); + miiphy_write("ppc_4xx_eth0", CONFIG_PHY_ADDR, MII_BMCR, + BMCR_ANENABLE | BMCR_ANRESTART); /* LEDs */ - miiphy_write("ppc_4xx_eth0", CONFIG_PHY_ADDR, PHY_FCSCR, 0x0d08); + miiphy_write("ppc_4xx_eth0", CONFIG_PHY_ADDR, MII_NWAYTEST, 0x0d08); return 0; /* success */ } diff --git a/board/evb64260/eth.c b/board/evb64260/eth.c index a96e655..352505a 100644 --- a/board/evb64260/eth.c +++ b/board/evb64260/eth.c @@ -422,24 +422,24 @@ gt6426x_dump_mii(bd_t *bis, unsigned short phy) static void check_phy_state(struct eth_dev_s *p) { - int bmsr = miiphy_read_ret(ether_port_phy_addr[p->dev], PHY_BMSR); + int bmsr = miiphy_read_ret(ether_port_phy_addr[p->dev], MII_BMSR); int psr = GTREGREAD(ETHERNET0_PORT_STATUS_REGISTER + p->reg_base); - if ((psr & 1<<3) && (bmsr & PHY_BMSR_LS)) { - int nego = miiphy_read_ret(ether_port_phy_addr[p->dev], PHY_ANAR) & - miiphy_read_ret(ether_port_phy_addr[p->dev], PHY_ANLPAR); + if ((psr & 1<<3) && (bmsr & BMSR_LSTATUS)) { + int nego = miiphy_read_ret(ether_port_phy_addr[p->dev], MII_ADVERTISE) & + miiphy_read_ret(ether_port_phy_addr[p->dev], MII_LPA); int want; - if (nego & PHY_ANLPAR_TXFD) { + if (nego & LPA_100FULL) { want = 0x3; printf("MII: 100Base-TX, Full Duplex\n"); - } else if (nego & PHY_ANLPAR_TX) { + } else if (nego & LPA_100HALF) { want = 0x1; printf("MII: 100Base-TX, Half Duplex\n"); - } else if (nego & PHY_ANLPAR_10FD) { + } else if (nego & LPA_10FULL) { want = 0x2; printf("MII: 10Base-T, Full Duplex\n"); - } else if (nego & PHY_ANLPAR_10) { + } else if (nego & LPA_10HALF) { want = 0x0; printf("MII: 10Base-T, Half Duplex\n"); } else { diff --git a/board/freescale/mpc8260ads/mpc8260ads.c b/board/freescale/mpc8260ads/mpc8260ads.c index be55626..8f617ca 100644 --- a/board/freescale/mpc8260ads/mpc8260ads.c +++ b/board/freescale/mpc8260ads/mpc8260ads.c @@ -243,8 +243,8 @@ void reset_phy (void) * Enable autonegotiation. */ bb_miiphy_write(NULL, CONFIG_SYS_PHY_ADDR, 16, 0x610); - bb_miiphy_write(NULL, CONFIG_SYS_PHY_ADDR, PHY_BMCR, - PHY_BMCR_AUTON | PHY_BMCR_RST_NEG); + bb_miiphy_write(NULL, CONFIG_SYS_PHY_ADDR, MII_BMCR, + BMCR_ANENABLE | BMCR_ANRESTART); #else /* * Ethernet PHY is configured (by means of configuration pins) @@ -254,13 +254,13 @@ void reset_phy (void) */ /* Advertise all capabilities */ - bb_miiphy_write(NULL, CONFIG_SYS_PHY_ADDR, PHY_ANAR, 0x01E1); + bb_miiphy_write(NULL, CONFIG_SYS_PHY_ADDR, MII_ADVERTISE, 0x01E1); /* Do not bypass Rx/Tx (de)scrambler */ - bb_miiphy_write(NULL, CONFIG_SYS_PHY_ADDR, PHY_DCR, 0x0000); + bb_miiphy_write(NULL, CONFIG_SYS_PHY_ADDR, MII_FCSCOUNTER, 0x0000); - bb_miiphy_write(NULL, CONFIG_SYS_PHY_ADDR, PHY_BMCR, - PHY_BMCR_AUTON | PHY_BMCR_RST_NEG); + bb_miiphy_write(NULL, CONFIG_SYS_PHY_ADDR, MII_BMCR, + BMCR_ANENABLE | BMCR_ANRESTART); #endif /* CONFIG_ADSTYPE == CONFIG_SYS_PQ2FADS */ #endif /* CONFIG_MII */ } diff --git a/board/freescale/mpc8560ads/mpc8560ads.c b/board/freescale/mpc8560ads/mpc8560ads.c index 1761431..2ae0459 100644 --- a/board/freescale/mpc8560ads/mpc8560ads.c +++ b/board/freescale/mpc8560ads/mpc8560ads.c @@ -239,10 +239,10 @@ void reset_phy (void) miiphy_reset("FCC1", 0x0); /* change PHY address to 0x02 */ - bb_miiphy_write(NULL, 0, PHY_MIPSCR, 0xf028); + bb_miiphy_write(NULL, 0, MII_MIPSCR, 0xf028); - bb_miiphy_write(NULL, 0x02, PHY_BMCR, - PHY_BMCR_AUTON | PHY_BMCR_RST_NEG); + bb_miiphy_write(NULL, 0x02, MII_BMCR, + BMCR_ANENABLE | BMCR_ANRESTART); #endif /* CONFIG_MII */ } diff --git a/board/manroland/uc100/uc100.c b/board/manroland/uc100/uc100.c index bdee4de..959b2ad 100644 --- a/board/manroland/uc100/uc100.c +++ b/board/manroland/uc100/uc100.c @@ -261,10 +261,10 @@ int misc_init_r (void) mii_init(); /* disable auto-negotiation, 100mbit, full-duplex */ - fec8xx_miiphy_write(NULL, 0, PHY_BMCR, 0x2100); + fec8xx_miiphy_write(NULL, 0, MII_BMCR, 0x2100); /* set LED's to Link, Transmit, Receive */ - fec8xx_miiphy_write(NULL, 0, PHY_FCSCR, 0x4122); + fec8xx_miiphy_write(NULL, 0, MII_NWAYTEST, 0x4122); return 0; } diff --git a/board/netphone/netphone.c b/board/netphone/netphone.c index ce5f051..7fea71b 100644 --- a/board/netphone/netphone.c +++ b/board/netphone/netphone.c @@ -488,13 +488,13 @@ void reset_phys(void) mii_init(); for (phyno = 0; phyno < 32; ++phyno) { - fec8xx_miiphy_read(NULL, phyno, PHY_PHYIDR1, &v); + fec8xx_miiphy_read(NULL, phyno, MII_PHYSID1, &v); if (v == 0xFFFF) continue; - fec8xx_miiphy_write(NULL, phyno, PHY_BMCR, PHY_BMCR_POWD); + fec8xx_miiphy_write(NULL, phyno, MII_BMCR, BMCR_PDOWN); udelay(10000); - fec8xx_miiphy_write(NULL, phyno, PHY_BMCR, - PHY_BMCR_RESET | PHY_BMCR_AUTON); + fec8xx_miiphy_write(NULL, phyno, MII_BMCR, + BMCR_RESET | BMCR_ANENABLE); udelay(10000); } } diff --git a/board/netta/netta.c b/board/netta/netta.c index 5c935f4..d15dc9b 100644 --- a/board/netta/netta.c +++ b/board/netta/netta.c @@ -436,13 +436,13 @@ void reset_phys(void) mii_init(); for (phyno = 0; phyno < 32; ++phyno) { - fec8xx_miiphy_read(NULL, phyno, PHY_PHYIDR1, &v); + fec8xx_miiphy_read(NULL, phyno, MII_PHYSID1, &v); if (v == 0xFFFF) continue; - fec8xx_miiphy_write(NULL, phyno, PHY_BMCR, PHY_BMCR_POWD); + fec8xx_miiphy_write(NULL, phyno, MII_BMCR, BMCR_PDOWN); udelay(10000); - fec8xx_miiphy_write(NULL, phyno, PHY_BMCR, - PHY_BMCR_RESET | PHY_BMCR_AUTON); + fec8xx_miiphy_write(NULL, phyno, MII_BMCR, + BMCR_RESET | BMCR_ANENABLE); udelay(10000); } } diff --git a/board/netta2/netta2.c b/board/netta2/netta2.c index 3b0191d..ff713d9 100644 --- a/board/netta2/netta2.c +++ b/board/netta2/netta2.c @@ -486,13 +486,13 @@ void reset_phys(void) mii_init(); for (phyno = 0; phyno < 32; ++phyno) { - fec8xx_miiphy_read(NULL, phyno, PHY_PHYIDR1, &v); + fec8xx_miiphy_read(NULL, phyno, MII_PHYSID1, &v); if (v == 0xFFFF) continue; - fec8xx_miiphy_write(NULL, phyno, PHY_BMCR, PHY_BMCR_POWD); + fec8xx_miiphy_write(NULL, phyno, MII_BMCR, BMCR_PDOWN); udelay(10000); - fec8xx_miiphy_write(NULL, phyno, PHY_BMCR, - PHY_BMCR_RESET | PHY_BMCR_AUTON); + fec8xx_miiphy_write(NULL, phyno, MII_BMCR, + BMCR_RESET | BMCR_ANENABLE); udelay(10000); } } diff --git a/board/prodrive/p3mx/mv_eth.c b/board/prodrive/p3mx/mv_eth.c index 567ae99..fac7633 100644 --- a/board/prodrive/p3mx/mv_eth.c +++ b/board/prodrive/p3mx/mv_eth.c @@ -586,16 +586,16 @@ static int mv64460_eth_real_open (struct eth_device *dev) } #endif /* defined(CONFIG_PHY_RESET) */ - miiphy_read (dev->name, reg, PHY_BMSR, ®_short); + miiphy_read (dev->name, reg, MII_BMSR, ®_short); /* * Wait if PHY is capable of autonegotiation and autonegotiation is not complete */ - if ((reg_short & PHY_BMSR_AUTN_ABLE) - && !(reg_short & PHY_BMSR_AUTN_COMP)) { + if ((reg_short & BMSR_ANEGCAPABLE) + && !(reg_short & BMSR_ANEGCOMPLETE)) { puts ("Waiting for PHY auto negotiation to complete"); i = 0; - while (!(reg_short & PHY_BMSR_AUTN_COMP)) { + while (!(reg_short & BMSR_ANEGCOMPLETE)) { /* * Timeout reached ? */ @@ -608,7 +608,7 @@ static int mv64460_eth_real_open (struct eth_device *dev) putc ('.'); } udelay (1000); /* 1 ms */ - miiphy_read (dev->name, reg, PHY_BMSR, ®_short); + miiphy_read (dev->name, reg, MII_BMSR, ®_short); } puts (" done\n"); @@ -2241,20 +2241,20 @@ int phy_setup_aneg (char *devname, unsigned char addr) unsigned short ctl, adv; /* Setup standard advertise */ - miiphy_read (devname, addr, PHY_ANAR, &adv); - adv |= (PHY_ANLPAR_ACK | PHY_ANLPAR_RF | PHY_ANLPAR_T4 | - PHY_ANLPAR_TXFD | PHY_ANLPAR_TX | PHY_ANLPAR_10FD | - PHY_ANLPAR_10); - miiphy_write (devname, addr, PHY_ANAR, adv); + miiphy_read (devname, addr, MII_ADVERTISE, &adv); + adv |= (LPA_LPACK | LPA_RFAULT | LPA_100BASE4 | + LPA_100FULL | LPA_100HALF | LPA_10FULL | + LPA_10HALF); + miiphy_write (devname, addr, MII_ADVERTISE, adv); - miiphy_read (devname, addr, PHY_1000BTCR, &adv); + miiphy_read (devname, addr, MII_CTRL1000, &adv); adv |= (0x0300); - miiphy_write (devname, addr, PHY_1000BTCR, adv); + miiphy_write (devname, addr, MII_CTRL1000, adv); /* Start/Restart aneg */ - miiphy_read (devname, addr, PHY_BMCR, &ctl); - ctl |= (PHY_BMCR_AUTON | PHY_BMCR_RST_NEG); - miiphy_write (devname, addr, PHY_BMCR, ctl); + miiphy_read (devname, addr, MII_BMCR, &ctl); + ctl |= (BMCR_ANENABLE | BMCR_ANRESTART); + miiphy_write (devname, addr, MII_BMCR, ctl); return 0; } diff --git a/board/sbc8560/sbc8560.c b/board/sbc8560/sbc8560.c index 77abde5..7bf8179 100644 --- a/board/sbc8560/sbc8560.c +++ b/board/sbc8560/sbc8560.c @@ -228,10 +228,10 @@ void reset_phy (void) miiphy_reset("FCC1", 0x0); /* change PHY address to 0x02 */ - bb_miiphy_write(NULL, 0, PHY_MIPSCR, 0xf028); + bb_miiphy_write(NULL, 0, MII_MIPSCR, 0xf028); - bb_miiphy_write(NULL, 0x02, PHY_BMCR, - PHY_BMCR_AUTON | PHY_BMCR_RST_NEG); + bb_miiphy_write(NULL, 0x02, MII_BMCR, + BMCR_ANENABLE | BMCR_ANRESTART); #endif /* CONFIG_MII */ } diff --git a/board/stx/stxgp3/stxgp3.c b/board/stx/stxgp3/stxgp3.c index 25d5211..1ed340e 100644 --- a/board/stx/stxgp3/stxgp3.c +++ b/board/stx/stxgp3/stxgp3.c @@ -242,10 +242,10 @@ reset_phy(void) miiphy_reset("FCC1", 0x0); /* change PHY address to 0x02 */ - bb_miiphy_write(NULL, 0, PHY_MIPSCR, 0xf028); + bb_miiphy_write(NULL, 0, MII_MIPSCR, 0xf028); - bb_miiphy_write(NULL, 0x02, PHY_BMCR, - PHY_BMCR_AUTON | PHY_BMCR_RST_NEG); + bb_miiphy_write(NULL, 0x02, MII_BMCR, + BMCR_ANENABLE | BMCR_ANRESTART); #endif /* CONFIG_MII */ #endif } diff --git a/board/stx/stxssa/stxssa.c b/board/stx/stxssa/stxssa.c index 1e0acab..6cd28a3 100644 --- a/board/stx/stxssa/stxssa.c +++ b/board/stx/stxssa/stxssa.c @@ -241,10 +241,10 @@ reset_phy(void) miiphy_reset("FCC1", 0x0); /* change PHY address to 0x02 */ - bb_miiphy_write(NULL, 0, PHY_MIPSCR, 0xf028); + bb_miiphy_write(NULL, 0, MII_MIPSCR, 0xf028); - bb_miiphy_write(NULL, 0x02, PHY_BMCR, - PHY_BMCR_AUTON | PHY_BMCR_RST_NEG); + bb_miiphy_write(NULL, 0x02, MII_BMCR, + BMCR_ANENABLE | BMCR_ANRESTART); #endif /* CONFIG_MII */ #endif } diff --git a/board/stx/stxxtc/stxxtc.c b/board/stx/stxxtc/stxxtc.c index 6693a70..4afbbf5 100644 --- a/board/stx/stxxtc/stxxtc.c +++ b/board/stx/stxxtc/stxxtc.c @@ -481,12 +481,12 @@ void reset_phys(void) mii_init(); for (phyno = 0; phyno < 32; ++phyno) { - miiphy_read("FEC", phyno, PHY_PHYIDR1, &v); + miiphy_read("FEC", phyno, MII_PHYSID1, &v); if (v == 0xFFFF) continue; - miiphy_write("FEC", phyno, PHY_BMCR, PHY_BMCR_POWD); + miiphy_write("FEC", phyno, MII_BMCR, BMCR_PDOWN); udelay(10000); - miiphy_write("FEC", phyno, PHY_BMCR, PHY_BMCR_RESET | PHY_BMCR_AUTON); + miiphy_write("FEC", phyno, MII_BMCR, BMCR_RESET | BMCR_ANENABLE); udelay(10000); } } diff --git a/board/tqc/tqm8xx/tqm8xx.c b/board/tqc/tqm8xx/tqm8xx.c index 940cc8f..6576e02 100644 --- a/board/tqc/tqm8xx/tqm8xx.c +++ b/board/tqc/tqm8xx/tqm8xx.c @@ -722,15 +722,15 @@ int last_stage_init(void) return 0; for (i = 0; i < 2; i++) { - ret = miiphy_read("FEC", phy[i], PHY_BMCR, ®); + ret = miiphy_read("FEC", phy[i], MII_BMCR, ®); if (ret) { printf("Cannot read BMCR on PHY %d\n", phy[i]); return 0; } /* Auto-negotiation off, hard set full duplex, 100Mbps */ ret = miiphy_write("FEC", phy[i], - PHY_BMCR, (reg | PHY_BMCR_100MB | - PHY_BMCR_DPLX) & ~PHY_BMCR_AUTON); + MII_BMCR, (reg | BMCR_SPEED100 | + BMCR_FULLDPLX) & ~BMCR_ANENABLE); if (ret) { printf("Cannot write BMCR on PHY %d\n", phy[i]); return 0; -- cgit v1.1