From 9b0ad1b1c7a15ff674978705c7c52264978dc5d8 Mon Sep 17 00:00:00 2001 From: Dave Liu Date: Tue, 28 Oct 2008 17:53:38 +0800 Subject: 85xx: remove the unused ddr_enable_ecc in the board file The DDR controller of 8548/8544/8568/8572/8536 processors have the ECC data init feature, and the new DDR code is using the feature, and we don't need the way with DMA to init memory any more. Signed-off-by: Dave Liu Acked-by: Andy Fleming --- board/atum8548/atum8548.c | 10 ---------- board/freescale/mpc8536ds/mpc8536ds.c | 10 ---------- board/freescale/mpc8544ds/mpc8544ds.c | 10 ---------- board/freescale/mpc8548cds/mpc8548cds.c | 11 ----------- board/freescale/mpc8568mds/mpc8568mds.c | 12 ------------ board/freescale/mpc8572ds/mpc8572ds.c | 10 ---------- board/sbc8548/sbc8548.c | 10 ---------- 7 files changed, 73 deletions(-) (limited to 'board') diff --git a/board/atum8548/atum8548.c b/board/atum8548/atum8548.c index 226ef57..6ef663e 100644 --- a/board/atum8548/atum8548.c +++ b/board/atum8548/atum8548.c @@ -37,10 +37,6 @@ #include #include -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) -extern void ddr_enable_ecc(unsigned int dram_size); -#endif - long int fixed_sdram(void); int board_early_init_f (void) @@ -117,12 +113,6 @@ initdram(int board_type) dram_size = fixed_sdram (); #endif -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) - /* - * Initialize and enable DDR ECC. - */ - ddr_enable_ecc(dram_size); -#endif puts(" DDR: "); return dram_size; } diff --git a/board/freescale/mpc8536ds/mpc8536ds.c b/board/freescale/mpc8536ds/mpc8536ds.c index 6fed4ea..2538483 100644 --- a/board/freescale/mpc8536ds/mpc8536ds.c +++ b/board/freescale/mpc8536ds/mpc8536ds.c @@ -41,10 +41,6 @@ #include "../common/pixis.h" #include "../common/sgmii_riser.h" -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) -extern void ddr_enable_ecc(unsigned int dram_size); -#endif - phys_size_t fixed_sdram(void); int checkboard (void) @@ -73,12 +69,6 @@ initdram(int board_type) dram_size = fixed_sdram(); #endif -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) - /* - * Initialize and enable DDR ECC. - */ - ddr_enable_ecc(dram_size); -#endif puts(" DDR: "); return dram_size; } diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c index 545d869..14581ab 100644 --- a/board/freescale/mpc8544ds/mpc8544ds.c +++ b/board/freescale/mpc8544ds/mpc8544ds.c @@ -38,10 +38,6 @@ #include "../common/pixis.h" #include "../common/sgmii_riser.h" -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) -extern void ddr_enable_ecc(unsigned int dram_size); -#endif - int checkboard (void) { volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); @@ -77,12 +73,6 @@ initdram(int board_type) dram_size *= 0x100000; -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) - /* - * Initialize and enable DDR ECC. - */ - ddr_enable_ecc(dram_size); -#endif puts(" DDR: "); return dram_size; } diff --git a/board/freescale/mpc8548cds/mpc8548cds.c b/board/freescale/mpc8548cds/mpc8548cds.c index af5ff42..8698605 100644 --- a/board/freescale/mpc8548cds/mpc8548cds.c +++ b/board/freescale/mpc8548cds/mpc8548cds.c @@ -38,10 +38,6 @@ #include "../common/eeprom.h" #include "../common/via.h" -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) -extern void ddr_enable_ecc(unsigned int dram_size); -#endif - DECLARE_GLOBAL_DATA_PTR; void local_bus_init(void); @@ -118,13 +114,6 @@ initdram(int board_type) dram_size = setup_ddr_tlbs(dram_size / 0x100000); dram_size *= 0x100000; -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) - /* - * Initialize and enable DDR ECC. - */ - ddr_enable_ecc(dram_size); -#endif - /* * SDRAM Initialization */ diff --git a/board/freescale/mpc8568mds/mpc8568mds.c b/board/freescale/mpc8568mds/mpc8568mds.c index 688d8c3..bc93be8 100644 --- a/board/freescale/mpc8568mds/mpc8568mds.c +++ b/board/freescale/mpc8568mds/mpc8568mds.c @@ -99,11 +99,6 @@ const qe_iop_conf_t qe_iop_conf_tab[] = { {0, 0, 0, 0, QE_IOP_TAB_END}, /* END of table */ }; - -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) -extern void ddr_enable_ecc(unsigned int dram_size); -#endif - void local_bus_init(void); void sdram_init(void); @@ -170,13 +165,6 @@ initdram(int board_type) dram_size = setup_ddr_tlbs(dram_size / 0x100000); dram_size *= 0x100000; -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) - /* - * Initialize and enable DDR ECC. - */ - ddr_enable_ecc(dram_size); -#endif - /* * SDRAM Initialization */ diff --git a/board/freescale/mpc8572ds/mpc8572ds.c b/board/freescale/mpc8572ds/mpc8572ds.c index 3a78c98..242af86 100644 --- a/board/freescale/mpc8572ds/mpc8572ds.c +++ b/board/freescale/mpc8572ds/mpc8572ds.c @@ -38,10 +38,6 @@ #include "../common/pixis.h" #include "../common/sgmii_riser.h" -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) -extern void ddr_enable_ecc(unsigned int dram_size); -#endif - long int fixed_sdram(void); int checkboard (void) @@ -69,12 +65,6 @@ phys_size_t initdram(int board_type) dram_size = fixed_sdram(); #endif -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) - /* - * Initialize and enable DDR ECC. - */ - ddr_enable_ecc(dram_size); -#endif puts(" DDR: "); return dram_size; } diff --git a/board/sbc8548/sbc8548.c b/board/sbc8548/sbc8548.c index 9548ac6..cfb9ce5 100644 --- a/board/sbc8548/sbc8548.c +++ b/board/sbc8548/sbc8548.c @@ -36,10 +36,6 @@ #include #include -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) -extern void ddr_enable_ecc(unsigned int dram_size); -#endif - DECLARE_GLOBAL_DATA_PTR; void local_bus_init(void); @@ -114,12 +110,6 @@ initdram(int board_type) dram_size = fixed_sdram (); #endif -#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) - /* - * Initialize and enable DDR ECC. - */ - ddr_enable_ecc(dram_size); -#endif /* * SDRAM Initialization */ -- cgit v1.1 From e57f0fa1333cdf3ca36110aac2900712a5f82976 Mon Sep 17 00:00:00 2001 From: Dave Liu Date: Tue, 28 Oct 2008 17:53:45 +0800 Subject: 85xx: the DDR tlb is missed for the !CONFIG_SPD_EEPROM case we need TLB entry for DDR at !SPD case. Signed-off-by: Dave Liu Acked-by: Andy Fleming --- board/freescale/mpc8536ds/mpc8536ds.c | 6 ++---- board/freescale/mpc8572ds/mpc8572ds.c | 6 ++---- 2 files changed, 4 insertions(+), 8 deletions(-) (limited to 'board') diff --git a/board/freescale/mpc8536ds/mpc8536ds.c b/board/freescale/mpc8536ds/mpc8536ds.c index 2538483..2b17612 100644 --- a/board/freescale/mpc8536ds/mpc8536ds.c +++ b/board/freescale/mpc8536ds/mpc8536ds.c @@ -61,13 +61,11 @@ initdram(int board_type) #ifdef CONFIG_SPD_EEPROM dram_size = fsl_ddr_sdram(); - - dram_size = setup_ddr_tlbs(dram_size / 0x100000); - - dram_size *= 0x100000; #else dram_size = fixed_sdram(); #endif + dram_size = setup_ddr_tlbs(dram_size / 0x100000); + dram_size *= 0x100000; puts(" DDR: "); return dram_size; diff --git a/board/freescale/mpc8572ds/mpc8572ds.c b/board/freescale/mpc8572ds/mpc8572ds.c index 242af86..a14db5a 100644 --- a/board/freescale/mpc8572ds/mpc8572ds.c +++ b/board/freescale/mpc8572ds/mpc8572ds.c @@ -57,13 +57,11 @@ phys_size_t initdram(int board_type) #ifdef CONFIG_SPD_EEPROM dram_size = fsl_ddr_sdram(); - - dram_size = setup_ddr_tlbs(dram_size / 0x100000); - - dram_size *= 0x100000; #else dram_size = fixed_sdram(); #endif + dram_size = setup_ddr_tlbs(dram_size / 0x100000); + dram_size *= 0x100000; puts(" DDR: "); return dram_size; -- cgit v1.1 From a2cd50ed6ef0ac6b127b3d6db756979a8336718d Mon Sep 17 00:00:00 2001 From: Peter Tyser Date: Tue, 11 Nov 2008 10:17:10 -0600 Subject: 85xx: Add CPU 2 errata workaround to all 8548 boards All mpc8548-based boards should implement the suggested workaround to CPU 2 errata. Without the workaround, its possible for the 8548's core to hang while executing a msync or mbar 0 instruction and a snoopable transaction from an I/O master tagged to make quick forward progress is present. Signed-off-by: Peter Tyser Acked-by: Andy Fleming --- board/freescale/mpc8548cds/mpc8548cds.c | 12 ------------ board/sbc8548/sbc8548.c | 7 ------- 2 files changed, 19 deletions(-) (limited to 'board') diff --git a/board/freescale/mpc8548cds/mpc8548cds.c b/board/freescale/mpc8548cds/mpc8548cds.c index 8698605..ba6bff5 100644 --- a/board/freescale/mpc8548cds/mpc8548cds.c +++ b/board/freescale/mpc8548cds/mpc8548cds.c @@ -52,7 +52,6 @@ int checkboard (void) uint pci_slot = get_pci_slot (); uint cpu_board_rev = get_cpu_board_revision (); - uint svr; printf ("Board: CDS Version 0x%02x, PCI Slot %d\n", get_board_version (), pci_slot); @@ -65,17 +64,6 @@ int checkboard (void) */ local_bus_init (); - svr = get_svr(); - - /* - * Fix CPU2 errata: A core hang possible while executing a - * msync instruction and a snoopable transaction from an I/O - * master tagged to make quick forward progress is present. - * Fixed in Silicon Rev.2.1 - */ - if (!(SVR_MAJ(svr) >= 2 && SVR_MIN(svr) >= 1)) - ecm->eebpcr |= (1 << 16); - /* * Hack TSEC 3 and 4 IO voltages. */ diff --git a/board/sbc8548/sbc8548.c b/board/sbc8548/sbc8548.c index cfb9ce5..017f6b3 100644 --- a/board/sbc8548/sbc8548.c +++ b/board/sbc8548/sbc8548.c @@ -62,13 +62,6 @@ int checkboard (void) local_bus_init (); /* - * Fix CPU2 errata: A core hang possible while executing a - * msync instruction and a snoopable transaction from an I/O - * master tagged to make quick forward progress is present. - */ - ecm->eebpcr |= (1 << 16); - - /* * Hack TSEC 3 and 4 IO voltages. */ gur->tsec34ioovcr = 0xe7e0; /* 1110 0111 1110 0xxx */ -- cgit v1.1 From dd332e18d082de75eca3fc2c7c778f5d4571a096 Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Thu, 13 Nov 2008 18:08:57 +0100 Subject: 85xx: socrates: fix DDR SDRAM tlb entry configuration since commit be0bd8234b9777ecd63c4c686f72af070d886517 tlb entry for socrates DDR SDRAM will be reconfigured by setup_ddr_tlbs() from initdram() causing an inconsistency with previously configured DDR SDRAM tlb entry from tlb_table: socrates>l2cam 7 9 IDX PID EPN SIZE V TS RPN U0-U3 WIMGE UUUSSS 7 : 00 00000000 256MB V 0 -> 0_00000000 0000 -I-G- ---RWX 8 : 00 00000000 256MB V 0 -> 0_00000000 0000 ----- ---RWX 9 : 00 10000000 256MB V 0 -> 0_10000000 0000 ----- ---RWX This patch makes the presence of the DDR SDRAM tlb entry in the tlb_table dependent on CONFIG_SPD_EEPROM to avoid this inconsistency. Signed-off-by: Anatolij Gustschin Acked-by: Andy Fleming --- board/socrates/tlb.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'board') diff --git a/board/socrates/tlb.c b/board/socrates/tlb.c index b91b1ea..4591e46 100644 --- a/board/socrates/tlb.c +++ b/board/socrates/tlb.c @@ -100,6 +100,7 @@ struct fsl_e_tlb_entry tlb_table[] = { MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 6, BOOKE_PAGESZ_64M, 1), +#if !defined(CONFIG_SPD_EEPROM) /* * TLB 7+8: 512M DDR, cache disabled (needed for memory test) * 0x00000000 512M DDR System memory @@ -114,6 +115,7 @@ struct fsl_e_tlb_entry tlb_table[] = { SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000, CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 8, BOOKE_PAGESZ_256M, 1), +#endif }; int num_tlb_entries = ARRAY_SIZE(tlb_table); -- cgit v1.1 From 9427ccde0355a2ebf47454e8e1be59f5b9864e08 Mon Sep 17 00:00:00 2001 From: Peter Tyser Date: Mon, 1 Dec 2008 13:47:12 -0600 Subject: 85xx: Add PORDEVSR_PCI1 define Add define used to determine if PCI1 interface is in PCI or PCIX mode. Convert users of the old PORDEVSR_PCI constant to use MPC85xx_PORDEVSR_PCI1 Signed-off-by: Peter Tyser Signed-off-by: Andy Fleming --- board/freescale/mpc8548cds/mpc8548cds.c | 2 +- board/sbc8548/sbc8548.c | 2 +- board/tqc/tqm85xx/tqm85xx.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'board') diff --git a/board/freescale/mpc8548cds/mpc8548cds.c b/board/freescale/mpc8548cds/mpc8548cds.c index ba6bff5..c562fc9 100644 --- a/board/freescale/mpc8548cds/mpc8548cds.c +++ b/board/freescale/mpc8548cds/mpc8548cds.c @@ -332,7 +332,7 @@ pci_init_board(void) first_free_busno=hose->last_busno+1; printf ("PCI on bus %02x - %02x\n",hose->first_busno,hose->last_busno); #ifdef CONFIG_PCIX_CHECK - if (!(gur->pordevsr & PORDEVSR_PCI)) { + if (!(gur->pordevsr & MPC85xx_PORDEVSR_PCI1)) { /* PCI-X init */ if (CONFIG_SYS_CLK_FREQ < 66000000) printf("PCI-X will only work at 66 MHz\n"); diff --git a/board/sbc8548/sbc8548.c b/board/sbc8548/sbc8548.c index 017f6b3..8c073cb 100644 --- a/board/sbc8548/sbc8548.c +++ b/board/sbc8548/sbc8548.c @@ -412,7 +412,7 @@ pci_init_board(void) first_free_busno=hose->last_busno+1; printf ("PCI on bus %02x - %02x\n",hose->first_busno,hose->last_busno); #ifdef CONFIG_PCIX_CHECK - if (!(gur->pordevsr & PORDEVSR_PCI)) { + if (!(gur->pordevsr & MPC85xx_PORDEVSR_PCI1)) { /* PCI-X init */ if (CONFIG_SYS_CLK_FREQ < 66000000) printf("PCI-X will only work at 66 MHz\n"); diff --git a/board/tqc/tqm85xx/tqm85xx.c b/board/tqc/tqm85xx/tqm85xx.c index 3a828ed..73f1d01 100644 --- a/board/tqc/tqm85xx/tqm85xx.c +++ b/board/tqc/tqm85xx/tqm85xx.c @@ -610,7 +610,7 @@ static inline void init_pci1(void) first_free_busno = hose->last_busno + 1; #ifdef CONFIG_PCIX_CHECK - if (!(gur->pordevsr & PORDEVSR_PCI)) { + if (!(gur->pordevsr & MPC85xx_PORDEVSR_PCI1)) { ushort reg16 = PCI_X_CMD_MAX_SPLIT | PCI_X_CMD_MAX_READ | PCI_X_CMD_ERO | PCI_X_CMD_DPERR_E; -- cgit v1.1