From 3bb183be7155493da81043062c24611a9df4bc2a Mon Sep 17 00:00:00 2001 From: Jens Scharsig Date: Sun, 29 Apr 2012 04:15:15 +0000 Subject: eb_cpux9k2: fix chip select MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit * fix chip select initialization for frame buffer, this will be increase frame buffer access speed Signed-off-by: Jens Scharsig Signed-off-by: Andreas Bießmann --- board/BuS/eb_cpux9k2/cpux9k2.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'board') diff --git a/board/BuS/eb_cpux9k2/cpux9k2.c b/board/BuS/eb_cpux9k2/cpux9k2.c index 776226f..e98244b 100644 --- a/board/BuS/eb_cpux9k2/cpux9k2.c +++ b/board/BuS/eb_cpux9k2/cpux9k2.c @@ -267,9 +267,9 @@ int drv_video_init(void) display_height = 256; printf("%ld x %ld pixel matrix\n", display_width, display_height); - /* RWH = 7 | RWS =7 | TDF = 15 | NWS = 0x7F */ - csr = AT91_SMC_CSR_RWHOLD(7) | AT91_SMC_CSR_RWSETUP(7) | - AT91_SMC_CSR_TDF(15) | AT91_SMC_CSR_NWS(127) | + /* RWH = 2 | RWS =2 | TDF = 4 | NWS = 0x6 */ + csr = AT91_SMC_CSR_RWHOLD(2) | AT91_SMC_CSR_RWSETUP(2) | + AT91_SMC_CSR_TDF(4) | AT91_SMC_CSR_NWS(6) | AT91_SMC_CSR_ACSS_STANDARD | AT91_SMC_CSR_DBW_16 | AT91_SMC_CSR_BAT_16 | AT91_SMC_CSR_WSEN; writel(csr, &mc->smc.csr[2]); -- cgit v1.1 From 7d899c14cc1842004e5f94a376082e7b6cf5988d Mon Sep 17 00:00:00 2001 From: Markus Hubig Date: Thu, 16 Aug 2012 08:22:09 +0000 Subject: Fixes the crippled console output on PortuxG20. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit In order to use the serial interface on the PortuxG20 we need to enable the level converter first by setting the PC9 pin to high. The level converter needs some time to settle so we have to use the mdelay() function to wait for some time. Unfortunately we have no timers available at board_early_init_f() so we enable the serial output early within board_postclk_init(). Now the U-Boot output looks fine: | U-Boot 2012.07-00132-gaf1a3b0-dirty (Aug 16 2012 - 18:21:32) | | CPU: AT91SAM9G20 | Crystal frequency: 18.432 MHz | CPU clock : 396.288 MHz | Master clock : 132.096 MHz | DRAM: 64 MiB | WARNING: Caches not enabled | NAND: 128 MiB | In: serial | Out: serial | Err: serial | Net: macb0 | Hit any key to stop autoboot: 0 Signed-off-by: Markus Hubig Signed-off-by: Andreas Bießmann --- board/taskit/stamp9g20/stamp9g20.c | 21 +++++++++++++++++---- 1 file changed, 17 insertions(+), 4 deletions(-) (limited to 'board') diff --git a/board/taskit/stamp9g20/stamp9g20.c b/board/taskit/stamp9g20/stamp9g20.c index 5e07bf8..06df0af 100644 --- a/board/taskit/stamp9g20/stamp9g20.c +++ b/board/taskit/stamp9g20/stamp9g20.c @@ -159,15 +159,28 @@ int board_early_init_f(void) return 0; } -int board_init(void) +int board_postclk_init(void) { - /* Adress of boot parameters */ - gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + /* + * Initialize the serial interface here, because be need a running + * timer to set PC9 to high and wait for some time to enable the + * level converter of the RS232 interface on the PortuxG20 board. + */ - /* Enable the serial interface */ +#ifdef CONFIG_PORTUXG20 at91_set_gpio_output(AT91_PIN_PC9, 1); + mdelay(1); +#endif at91_seriald_hw_init(); + return 0; +} + +int board_init(void) +{ + /* Adress of boot parameters */ + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + stamp9G20_nand_hw_init(); #ifdef CONFIG_MACB stamp9G20_macb_hw_init(); -- cgit v1.1