From 9af9c6bdc16da53772c56b1a79c2c91701fe94e6 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Wed, 15 Jul 2009 13:45:00 -0500 Subject: 86xx: Report which "bank" of NOR flash we are booting from on MPC8641HPCN The MPC8641HPCN board is capable of swizzling the upper address bit of the NOR flash we boot out of which creates the concept of "virtual" banks. This is useful in that we can flash a test of image of u-boot and reset to one of the virtual banks while still maintaining a working image in "bank 0". The PIXIS FPGA exposes registers on LBC which we can use to determine which "bank" we are booting out of (as well as setting which bank to boot out of). Signed-off-by: Kumar Gala --- board/freescale/mpc8641hpcn/mpc8641hpcn.c | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) (limited to 'board') diff --git a/board/freescale/mpc8641hpcn/mpc8641hpcn.c b/board/freescale/mpc8641hpcn/mpc8641hpcn.c index 7422e6b..441127b 100644 --- a/board/freescale/mpc8641hpcn/mpc8641hpcn.c +++ b/board/freescale/mpc8641hpcn/mpc8641hpcn.c @@ -42,10 +42,20 @@ int board_early_init_f(void) int checkboard(void) { - printf ("Board: MPC8641HPCN, System ID: 0x%02x, " - "System Version: 0x%02x, FPGA Version: 0x%02x\n", - in8(PIXIS_BASE + PIXIS_ID), in8(PIXIS_BASE + PIXIS_VER), - in8(PIXIS_BASE + PIXIS_PVER)); + u8 vboot; + u8 *pixis_base = (u8 *)PIXIS_BASE; + + printf ("Board: MPC8641HPCN, Sys ID: 0x%02x, " + "Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ", + in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER), + in_8(pixis_base + PIXIS_PVER)); + + vboot = in_8(pixis_base + PIXIS_VBOOT); + if (vboot & PIXIS_VBOOT_FMAP) + printf ("vBank: %d\n", ((vboot & PIXIS_VBOOT_FBANK) >> 6)); + else + puts ("Promjet\n"); + #ifdef CONFIG_PHYS_64BIT printf (" 36-bit physical address map\n"); #endif -- cgit v1.1 From 6bb5b412291177e6edd42f9a80e5c5afe57a6a0f Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Tue, 14 Jul 2009 22:42:01 -0500 Subject: 85xx: Report which "bank" of NOR flash we are booting from on FSL boards The p2020DS, MPC8536DS, MPC8572DS, MPC8544DS boards are capable of swizzling the upper address bits of the NOR flash we boot out of which creates the concept of "virtual" banks. This is useful in that we can flash a test of image of u-boot and reset to one of the virtual banks while still maintaining a working image in "bank 0". The PIXIS FPGA exposes registers on LBC which we can use to determine which "bank" we are booting out of (as well as setting which bank to boot out of). Signed-off-by: Kumar Gala --- board/freescale/mpc8536ds/mpc8536ds.c | 39 +++++++++++++++++++++++++++++++---- board/freescale/mpc8544ds/mpc8544ds.c | 16 ++++++++++---- board/freescale/mpc8572ds/mpc8572ds.c | 26 ++++++++++++++++++++--- board/freescale/p2020ds/p2020ds.c | 23 ++++++++++++++++++--- 4 files changed, 90 insertions(+), 14 deletions(-) (limited to 'board') diff --git a/board/freescale/mpc8536ds/mpc8536ds.c b/board/freescale/mpc8536ds/mpc8536ds.c index 28b27ee..66f095f 100644 --- a/board/freescale/mpc8536ds/mpc8536ds.c +++ b/board/freescale/mpc8536ds/mpc8536ds.c @@ -60,10 +60,41 @@ int board_early_init_f (void) int checkboard (void) { - printf ("Board: MPC8536DS, System ID: 0x%02x, " - "System Version: 0x%02x, FPGA Version: 0x%02x\n", - in8(PIXIS_BASE + PIXIS_ID), in8(PIXIS_BASE + PIXIS_VER), - in8(PIXIS_BASE + PIXIS_PVER)); + u8 vboot; + u8 *pixis_base = (u8 *)PIXIS_BASE; + + puts("Board: MPC8536DS "); +#ifdef CONFIG_PHYS_64BIT + puts("(36-bit addrmap) "); +#endif + + printf ("Sys ID: 0x%02x, " + "Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ", + in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER), + in_8(pixis_base + PIXIS_PVER)); + + vboot = in_8(pixis_base + PIXIS_VBOOT); + switch ((vboot & PIXIS_VBOOT_LBMAP) >> 5) { + case PIXIS_VBOOT_LBMAP_NOR0: + puts ("vBank: 0\n"); + break; + case PIXIS_VBOOT_LBMAP_NOR1: + puts ("vBank: 1\n"); + break; + case PIXIS_VBOOT_LBMAP_NOR2: + puts ("vBank: 2\n"); + break; + case PIXIS_VBOOT_LBMAP_NOR3: + puts ("vBank: 3\n"); + break; + case PIXIS_VBOOT_LBMAP_PJET: + puts ("Promjet\n"); + break; + case PIXIS_VBOOT_LBMAP_NAND: + puts ("NAND\n"); + break; + } + return 0; } diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c index 34bdbad..b251e2e 100644 --- a/board/freescale/mpc8544ds/mpc8544ds.c +++ b/board/freescale/mpc8544ds/mpc8544ds.c @@ -43,14 +43,22 @@ int checkboard (void) volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); volatile ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR); volatile ccsr_local_ecm_t *ecm = (void *)(CONFIG_SYS_MPC85xx_ECM_ADDR); + u8 vboot; + u8 *pixis_base = (u8 *)PIXIS_BASE; if ((uint)&gur->porpllsr != 0xe00e0000) { printf("immap size error %lx\n",(ulong)&gur->porpllsr); } - printf ("Board: MPC8544DS, System ID: 0x%02x, " - "System Version: 0x%02x, FPGA Version: 0x%02x\n", - in8(PIXIS_BASE + PIXIS_ID), in8(PIXIS_BASE + PIXIS_VER), - in8(PIXIS_BASE + PIXIS_PVER)); + printf ("Board: MPC8544DS, Sys ID: 0x%02x, " + "Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ", + in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER), + in_8(pixis_base + PIXIS_PVER)); + + vboot = in_8(pixis_base + PIXIS_VBOOT); + if (vboot & PIXIS_VBOOT_FMAP) + printf ("vBank: %d\n", ((vboot & PIXIS_VBOOT_FBANK) >> 6)); + else + puts ("Promjet\n"); lbc->ltesr = 0xffffffff; /* Clear LBC error interrupts */ lbc->lteir = 0xffffffff; /* Enable LBC error interrupts */ diff --git a/board/freescale/mpc8572ds/mpc8572ds.c b/board/freescale/mpc8572ds/mpc8572ds.c index 4b95617..51231d7 100644 --- a/board/freescale/mpc8572ds/mpc8572ds.c +++ b/board/freescale/mpc8572ds/mpc8572ds.c @@ -42,14 +42,34 @@ long int fixed_sdram(void); int checkboard (void) { + u8 vboot; + u8 *pixis_base = (u8 *)PIXIS_BASE; + puts ("Board: MPC8572DS "); #ifdef CONFIG_PHYS_64BIT puts ("(36-bit addrmap) "); #endif printf ("Sys ID: 0x%02x, " - "Sys Ver: 0x%02x, FPGA Ver: 0x%02x\n", - in8(PIXIS_BASE + PIXIS_ID), in8(PIXIS_BASE + PIXIS_VER), - in8(PIXIS_BASE + PIXIS_PVER)); + "Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ", + in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER), + in_8(pixis_base + PIXIS_PVER)); + + vboot = in_8(pixis_base + PIXIS_VBOOT); + switch ((vboot & PIXIS_VBOOT_LBMAP) >> 6) { + case PIXIS_VBOOT_LBMAP_NOR0: + puts ("vBank: 0\n"); + break; + case PIXIS_VBOOT_LBMAP_PJET: + puts ("Promjet\n"); + break; + case PIXIS_VBOOT_LBMAP_NAND: + puts ("NAND\n"); + break; + case PIXIS_VBOOT_LBMAP_NOR1: + puts ("vBank: 1\n"); + break; + } + return 0; } diff --git a/board/freescale/p2020ds/p2020ds.c b/board/freescale/p2020ds/p2020ds.c index 293e5a4..fdd8325 100644 --- a/board/freescale/p2020ds/p2020ds.c +++ b/board/freescale/p2020ds/p2020ds.c @@ -47,14 +47,31 @@ phys_size_t fixed_sdram(void); int checkboard(void) { + u8 sw7; + u8 *pixis_base = (u8 *)PIXIS_BASE; + puts("Board: P2020DS "); #ifdef CONFIG_PHYS_64BIT puts("(36-bit addrmap) "); #endif + printf("Sys ID: 0x%02x, " - "Sys Ver: 0x%02x, FPGA Ver: 0x%02x\n", - in8(PIXIS_BASE + PIXIS_ID), in8(PIXIS_BASE + PIXIS_VER), - in8(PIXIS_BASE + PIXIS_PVER)); + "Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ", + in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER), + in_8(pixis_base + PIXIS_PVER)); + + sw7 = in_8(pixis_base + PIXIS_SW(7)); + switch ((sw7 & PIXIS_SW7_LBMAP) >> 6) { + case 0: + case 1: + printf ("vBank: %d\n", ((sw7 & PIXIS_SW7_VBANK) >> 4)); + break; + case 2: + case 3: + puts ("Promjet\n"); + break; + } + return 0; } -- cgit v1.1 From e7ee23ec1788d8cf269a4cf6b9cd3722cbc7d592 Mon Sep 17 00:00:00 2001 From: Peter Tyser Date: Fri, 17 Jul 2009 10:14:45 -0500 Subject: 86xx: Rename ccsr_ddr's sdram_mode_1, sdram_cfg_1 fields Rename sdram_mode_1 to sdram_mode and sdram_cfg_1 to sdram_cfg to match the 86xx user's manual and other Freescale architectures Signed-off-by: Peter Tyser Signed-off-by: Kumar Gala --- board/freescale/mpc8610hpcd/mpc8610hpcd.c | 4 ++-- board/freescale/mpc8641hpcn/mpc8641hpcn.c | 6 +++--- board/sbc8641d/sbc8641d.c | 12 ++++++------ 3 files changed, 11 insertions(+), 11 deletions(-) (limited to 'board') diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c index a85ebea..419b2c1 100644 --- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c +++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c @@ -154,7 +154,7 @@ phys_size_t fixed_sdram(void) ddr->timing_cfg_0 = 0x00260802; ddr->timing_cfg_1 = 0x3935d322; ddr->timing_cfg_2 = 0x14904cc8; - ddr->sdram_mode_1 = 0x00480432; + ddr->sdram_mode = 0x00480432; ddr->sdram_mode_2 = 0x00000000; ddr->sdram_interval = 0x06180fff; /* 0x06180100; */ ddr->sdram_data_init = 0xDEADBEEF; @@ -170,7 +170,7 @@ phys_size_t fixed_sdram(void) udelay(500); - ddr->sdram_cfg_1 = 0xc3000000; /* 0xe3008000;*/ + ddr->sdram_cfg = 0xc3000000; /* 0xe3008000;*/ #if defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) diff --git a/board/freescale/mpc8641hpcn/mpc8641hpcn.c b/board/freescale/mpc8641hpcn/mpc8641hpcn.c index 441127b..ce26320 100644 --- a/board/freescale/mpc8641hpcn/mpc8641hpcn.c +++ b/board/freescale/mpc8641hpcn/mpc8641hpcn.c @@ -101,7 +101,7 @@ fixed_sdram(void) ddr->timing_cfg_0 = CONFIG_SYS_DDR_TIMING_0; ddr->timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1; ddr->timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2; - ddr->sdram_mode_1 = CONFIG_SYS_DDR_MODE_1; + ddr->sdram_mode = CONFIG_SYS_DDR_MODE_1; ddr->sdram_mode_2 = CONFIG_SYS_DDR_MODE_2; ddr->sdram_interval = CONFIG_SYS_DDR_INTERVAL; ddr->sdram_data_init = CONFIG_SYS_DDR_DATA_INIT; @@ -119,9 +119,9 @@ fixed_sdram(void) #if defined (CONFIG_DDR_ECC) /* Enable ECC checking */ - ddr->sdram_cfg_1 = (CONFIG_SYS_DDR_CONTROL | 0x20000000); + ddr->sdram_cfg = (CONFIG_SYS_DDR_CONTROL | 0x20000000); #else - ddr->sdram_cfg_1 = CONFIG_SYS_DDR_CONTROL; + ddr->sdram_cfg = CONFIG_SYS_DDR_CONTROL; ddr->sdram_cfg_2 = CONFIG_SYS_DDR_CONTROL2; #endif asm("sync; isync"); diff --git a/board/sbc8641d/sbc8641d.c b/board/sbc8641d/sbc8641d.c index c39d2c0..f118a6e 100644 --- a/board/sbc8641d/sbc8641d.c +++ b/board/sbc8641d/sbc8641d.c @@ -127,9 +127,9 @@ long int fixed_sdram (void) ddr->timing_cfg_0 = CONFIG_SYS_DDR_TIMING_0; ddr->timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1; ddr->timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2; - ddr->sdram_cfg_1 = CONFIG_SYS_DDR_CFG_1A; + ddr->sdram_cfg = CONFIG_SYS_DDR_CFG_1A; ddr->sdram_cfg_2 = CONFIG_SYS_DDR_CFG_2; - ddr->sdram_mode_1 = CONFIG_SYS_DDR_MODE_1; + ddr->sdram_mode = CONFIG_SYS_DDR_MODE_1; ddr->sdram_mode_2 = CONFIG_SYS_DDR_MODE_2; ddr->sdram_mode_cntl = CONFIG_SYS_DDR_MODE_CTL; ddr->sdram_interval = CONFIG_SYS_DDR_INTERVAL; @@ -140,7 +140,7 @@ long int fixed_sdram (void) udelay (500); - ddr->sdram_cfg_1 = CONFIG_SYS_DDR_CFG_1B; + ddr->sdram_cfg = CONFIG_SYS_DDR_CFG_1B; asm ("sync; isync"); udelay (500); @@ -158,9 +158,9 @@ long int fixed_sdram (void) ddr->timing_cfg_0 = CONFIG_SYS_DDR2_TIMING_0; ddr->timing_cfg_1 = CONFIG_SYS_DDR2_TIMING_1; ddr->timing_cfg_2 = CONFIG_SYS_DDR2_TIMING_2; - ddr->sdram_cfg_1 = CONFIG_SYS_DDR2_CFG_1A; + ddr->sdram_cfg = CONFIG_SYS_DDR2_CFG_1A; ddr->sdram_cfg_2 = CONFIG_SYS_DDR2_CFG_2; - ddr->sdram_mode_1 = CONFIG_SYS_DDR2_MODE_1; + ddr->sdram_mode = CONFIG_SYS_DDR2_MODE_1; ddr->sdram_mode_2 = CONFIG_SYS_DDR2_MODE_2; ddr->sdram_mode_cntl = CONFIG_SYS_DDR2_MODE_CTL; ddr->sdram_interval = CONFIG_SYS_DDR2_INTERVAL; @@ -171,7 +171,7 @@ long int fixed_sdram (void) udelay (500); - ddr->sdram_cfg_1 = CONFIG_SYS_DDR2_CFG_1B; + ddr->sdram_cfg = CONFIG_SYS_DDR2_CFG_1B; asm ("sync; isync"); udelay (500); -- cgit v1.1 From ed2c9488bbe389b7b25cada1e42bdae5d0976327 Mon Sep 17 00:00:00 2001 From: Peter Tyser Date: Fri, 17 Jul 2009 10:14:46 -0500 Subject: xes: Remove 8xxx board_add_ram_info() function This is in preparation for adding one common 8xxx board_add_ram_info() fuction for all 8xxx boards Signed-off-by: Peter Tyser Signed-off-by: Kumar Gala --- board/xes/common/fsl_8xxx_ddr.c | 53 ----------------------------------------- 1 file changed, 53 deletions(-) (limited to 'board') diff --git a/board/xes/common/fsl_8xxx_ddr.c b/board/xes/common/fsl_8xxx_ddr.c index ec64efa..81ee70d 100644 --- a/board/xes/common/fsl_8xxx_ddr.c +++ b/board/xes/common/fsl_8xxx_ddr.c @@ -44,56 +44,3 @@ phys_size_t initdram(int board_type) return dram_size; } - -#if defined(CONFIG_DDR_ECC) || (CONFIG_NUM_DDR_CONTROLLERS > 1) -void board_add_ram_info(int use_default) -{ -#if (CONFIG_NUM_DDR_CONTROLLERS > 1) -#if defined(CONFIG_MPC85xx) - volatile ccsr_ddr_t *ddr1 = (void *)(CONFIG_SYS_MPC85xx_DDR_ADDR); -#elif defined(CONFIG_MPC86xx) - volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; - volatile ccsr_ddr_t *ddr1 = &immap->im_ddr1; -#endif -#endif - - puts(" ("); - -#if (CONFIG_NUM_DDR_CONTROLLERS > 1) - /* Print interleaving information */ - if (ddr1->cs0_config & 0x20000000) { - switch ((ddr1->cs0_config >> 24) & 0xf) { - case 0: - puts("cache line"); - break; - case 1: - puts("page"); - break; - case 2: - puts("bank"); - break; - case 3: - puts("super-bank"); - break; - default: - puts("invalid"); - break; - } - } else { - puts("no"); - } - - puts(" interleaving"); -#endif - -#if (CONFIG_NUM_DDR_CONTROLLERS > 1) && defined(CONFIG_DDR_ECC) - puts(", "); -#endif - -#if defined(CONFIG_DDR_ECC) - puts("ECC enabled"); -#endif - - puts(")"); -} -#endif /* CONFIG_DDR_ECC || CONFIG_NUM_DDR_CONTROLLERS > 1 */ -- cgit v1.1 From 12a440ae6d09445140f1a0c2023dba76a9f1a617 Mon Sep 17 00:00:00 2001 From: Peter Tyser Date: Fri, 17 Jul 2009 10:14:47 -0500 Subject: tqm85xx: Remove board_add_ram_info() This is in preparation for adding one common 8xxx board_add_ram_info() function for all 8xxx boards Signed-off-by: Peter Tyser Signed-off-by: Kumar Gala --- board/tqc/tqm85xx/sdram.c | 33 +++------------------------------ 1 file changed, 3 insertions(+), 30 deletions(-) (limited to 'board') diff --git a/board/tqc/tqm85xx/sdram.c b/board/tqc/tqm85xx/sdram.c index 6d73a88..503c5e5 100644 --- a/board/tqc/tqm85xx/sdram.c +++ b/board/tqc/tqm85xx/sdram.c @@ -374,31 +374,6 @@ long int sdram_setup (int casl) return (i < N_DDR_CS_CONF) ? ddr_cs_conf[i].size : 0; } -void board_add_ram_info (int use_default) -{ - int casl; - - if (use_default) - casl = CONFIG_DDR_DEFAULT_CL; - else - casl = cas_latency (); - - puts (" (CL="); - switch (casl) { - case 20: - puts ("2)"); - break; - - case 25: - puts ("2.5)"); - break; - - case 30: - puts ("3)"); - break; - } -} - phys_size_t initdram (int board_type) { long dram_size = 0; @@ -438,11 +413,9 @@ phys_size_t initdram (int board_type) /* * Try again with default CAS latency */ - puts ("Problem with CAS lantency"); - board_add_ram_info (1); - puts (", using default CL!\n"); - casl = CONFIG_DDR_DEFAULT_CL; - dram_size = sdram_setup (casl); + printf ("Problem with CAS lantency, using default CL %d/10!\n", + CONFIG_DDR_DEFAULT_CL); + dram_size = sdram_setup (CONFIG_DDR_DEFAULT_CL); puts (" "); } -- cgit v1.1 From 58f31b602dfd52eb7836ab82caa587514e046f02 Mon Sep 17 00:00:00 2001 From: Peter Tyser Date: Sun, 19 Jul 2009 19:17:41 -0500 Subject: xpedite5370: Fix I2C GPIO initialization typo Signed-off-by: Peter Tyser Acked-by: Heiko Schocher Signed-off-by: Kumar Gala --- board/xes/xpedite5370/xpedite5370.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'board') diff --git a/board/xes/xpedite5370/xpedite5370.c b/board/xes/xpedite5370/xpedite5370.c index 22cf294..d54c699 100644 --- a/board/xes/xpedite5370/xpedite5370.c +++ b/board/xes/xpedite5370/xpedite5370.c @@ -84,8 +84,8 @@ int board_early_init_r(void) /* Initialize PCA9557 devices */ pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR0, 0xff, 0); pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR1, 0xff, 0); - pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR0, 0xff, 0); - pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR0, 0xff, 0); + pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR2, 0xff, 0); + pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR3, 0xff, 0); /* * Remap NOR flash region to caching-inhibited -- cgit v1.1 From 048e7efe91f66094f868281c12e488ce2bae8976 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Wed, 22 Jul 2009 10:12:39 -0500 Subject: 85xx/86xx: Replace in8/out8 with in_8/out_8 on FSL boards The pixis code used in8/out8 all over the place. Replace it with in_8/out_8 macros. Signed-off-by: Kumar Gala --- board/freescale/common/pixis.c | 78 +++++++++++++++------------ board/freescale/mpc8536ds/mpc8536ds.c | 22 +++++--- board/freescale/mpc8544ds/mpc8544ds.c | 11 ++-- board/freescale/mpc8572ds/mpc8572ds.c | 22 +++++--- board/freescale/mpc8610hpcd/mpc8610hpcd.c | 25 +++++---- board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c | 13 ++--- board/freescale/mpc8641hpcn/mpc8641hpcn.c | 15 +++--- board/freescale/p2020ds/p2020ds.c | 22 +++++--- 8 files changed, 122 insertions(+), 86 deletions(-) (limited to 'board') diff --git a/board/freescale/common/pixis.c b/board/freescale/common/pixis.c index 4851f06..7210512 100644 --- a/board/freescale/common/pixis.c +++ b/board/freescale/common/pixis.c @@ -39,7 +39,8 @@ static ulong strfractoint(uchar *strptr); */ void pixis_reset(void) { - out8(PIXIS_BASE + PIXIS_RST, 0); + u8 *pixis_base = (u8 *)PIXIS_BASE; + out_8(pixis_base + PIXIS_RST, 0); } @@ -49,6 +50,7 @@ void pixis_reset(void) int set_px_sysclk(ulong sysclk) { u8 sysclk_s, sysclk_r, sysclk_v, vclkh, vclkl, sysclk_aux; + u8 *pixis_base = (u8 *)PIXIS_BASE; switch (sysclk) { case 33: @@ -107,10 +109,10 @@ int set_px_sysclk(ulong sysclk) vclkh = (sysclk_s << 5) | sysclk_r; vclkl = sysclk_v; - out8(PIXIS_BASE + PIXIS_VCLKH, vclkh); - out8(PIXIS_BASE + PIXIS_VCLKL, vclkl); + out_8(pixis_base + PIXIS_VCLKH, vclkh); + out_8(pixis_base + PIXIS_VCLKL, vclkl); - out8(PIXIS_BASE + PIXIS_AUX, sysclk_aux); + out_8(pixis_base + PIXIS_AUX, sysclk_aux); return 1; } @@ -120,6 +122,7 @@ int set_px_mpxpll(ulong mpxpll) { u8 tmp; u8 val; + u8 *pixis_base = (u8 *)PIXIS_BASE; switch (mpxpll) { case 2: @@ -137,9 +140,9 @@ int set_px_mpxpll(ulong mpxpll) return 0; } - tmp = in8(PIXIS_BASE + PIXIS_VSPEED1); + tmp = in_8(pixis_base + PIXIS_VSPEED1); tmp = (tmp & 0xF0) | (val & 0x0F); - out8(PIXIS_BASE + PIXIS_VSPEED1, tmp); + out_8(pixis_base + PIXIS_VSPEED1, tmp); return 1; } @@ -149,6 +152,7 @@ int set_px_corepll(ulong corepll) { u8 tmp; u8 val; + u8 *pixis_base = (u8 *)PIXIS_BASE; switch ((int)corepll) { case 20: @@ -174,9 +178,9 @@ int set_px_corepll(ulong corepll) return 0; } - tmp = in8(PIXIS_BASE + PIXIS_VSPEED0); + tmp = in_8(pixis_base + PIXIS_VSPEED0); tmp = (tmp & 0xE0) | (val & 0x1F); - out8(PIXIS_BASE + PIXIS_VSPEED0, tmp); + out_8(pixis_base + PIXIS_VSPEED0, tmp); return 1; } @@ -184,27 +188,29 @@ int set_px_corepll(ulong corepll) void read_from_px_regs(int set) { + u8 *pixis_base = (u8 *)PIXIS_BASE; u8 mask = 0x1C; /* COREPLL, MPXPLL, SYSCLK controlled by PIXIS */ - u8 tmp = in8(PIXIS_BASE + PIXIS_VCFGEN0); + u8 tmp = in_8(pixis_base + PIXIS_VCFGEN0); if (set) tmp = tmp | mask; else tmp = tmp & ~mask; - out8(PIXIS_BASE + PIXIS_VCFGEN0, tmp); + out_8(pixis_base + PIXIS_VCFGEN0, tmp); } void read_from_px_regs_altbank(int set) { + u8 *pixis_base = (u8 *)PIXIS_BASE; u8 mask = 0x04; /* FLASHBANK and FLASHMAP controlled by PIXIS */ - u8 tmp = in8(PIXIS_BASE + PIXIS_VCFGEN1); + u8 tmp = in_8(pixis_base + PIXIS_VCFGEN1); if (set) tmp = tmp | mask; else tmp = tmp & ~mask; - out8(PIXIS_BASE + PIXIS_VCFGEN1, tmp); + out_8(pixis_base + PIXIS_VCFGEN1, tmp); } #ifndef CONFIG_SYS_PIXIS_VBOOT_MASK @@ -214,50 +220,54 @@ void read_from_px_regs_altbank(int set) void clear_altbank(void) { u8 tmp; + u8 *pixis_base = (u8 *)PIXIS_BASE; - tmp = in8(PIXIS_BASE + PIXIS_VBOOT); + tmp = in_8(pixis_base + PIXIS_VBOOT); tmp &= ~CONFIG_SYS_PIXIS_VBOOT_MASK; - out8(PIXIS_BASE + PIXIS_VBOOT, tmp); + out_8(pixis_base + PIXIS_VBOOT, tmp); } void set_altbank(void) { u8 tmp; + u8 *pixis_base = (u8 *)PIXIS_BASE; - tmp = in8(PIXIS_BASE + PIXIS_VBOOT); + tmp = in_8(pixis_base + PIXIS_VBOOT); tmp |= CONFIG_SYS_PIXIS_VBOOT_MASK; - out8(PIXIS_BASE + PIXIS_VBOOT, tmp); + out_8(pixis_base + PIXIS_VBOOT, tmp); } void set_px_go(void) { u8 tmp; + u8 *pixis_base = (u8 *)PIXIS_BASE; - tmp = in8(PIXIS_BASE + PIXIS_VCTL); + tmp = in_8(pixis_base + PIXIS_VCTL); tmp = tmp & 0x1E; /* clear GO bit */ - out8(PIXIS_BASE + PIXIS_VCTL, tmp); + out_8(pixis_base + PIXIS_VCTL, tmp); - tmp = in8(PIXIS_BASE + PIXIS_VCTL); + tmp = in_8(pixis_base + PIXIS_VCTL); tmp = tmp | 0x01; /* set GO bit - start reset sequencer */ - out8(PIXIS_BASE + PIXIS_VCTL, tmp); + out_8(pixis_base + PIXIS_VCTL, tmp); } void set_px_go_with_watchdog(void) { u8 tmp; + u8 *pixis_base = (u8 *)PIXIS_BASE; - tmp = in8(PIXIS_BASE + PIXIS_VCTL); + tmp = in_8(pixis_base + PIXIS_VCTL); tmp = tmp & 0x1E; - out8(PIXIS_BASE + PIXIS_VCTL, tmp); + out_8(pixis_base + PIXIS_VCTL, tmp); - tmp = in8(PIXIS_BASE + PIXIS_VCTL); + tmp = in_8(pixis_base + PIXIS_VCTL); tmp = tmp | 0x09; - out8(PIXIS_BASE + PIXIS_VCTL, tmp); + out_8(pixis_base + PIXIS_VCTL, tmp); } @@ -265,15 +275,16 @@ int pixis_disable_watchdog_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { u8 tmp; + u8 *pixis_base = (u8 *)PIXIS_BASE; - tmp = in8(PIXIS_BASE + PIXIS_VCTL); + tmp = in_8(pixis_base + PIXIS_VCTL); tmp = tmp & 0x1E; - out8(PIXIS_BASE + PIXIS_VCTL, tmp); + out_8(pixis_base + PIXIS_VCTL, tmp); /* setting VCTL[WDEN] to 0 to disable watch dog */ - tmp = in8(PIXIS_BASE + PIXIS_VCTL); + tmp = in_8(pixis_base + PIXIS_VCTL); tmp &= ~0x08; - out8(PIXIS_BASE + PIXIS_VCTL, tmp); + out_8(pixis_base + PIXIS_VCTL, tmp); return 0; } @@ -288,6 +299,7 @@ U_BOOT_CMD( int pixis_set_sgmii(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { int which_tsec = -1; + u8 *pixis_base = (u8 *)PIXIS_BASE; uchar mask; uchar switch_mask; @@ -328,17 +340,15 @@ int pixis_set_sgmii(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) /* Toggle whether the switches or FPGA control the settings */ if (!strcmp(argv[argc - 1], "switch")) - clrbits_8((unsigned char *)PIXIS_BASE + PIXIS_VCFGEN1, - switch_mask); + clrbits_8(pixis_base + PIXIS_VCFGEN1, switch_mask); else - setbits_8((unsigned char *)PIXIS_BASE + PIXIS_VCFGEN1, - switch_mask); + setbits_8(pixis_base + PIXIS_VCFGEN1, switch_mask); /* If it's not the switches, enable or disable SGMII, as specified */ if (!strcmp(argv[argc - 1], "on")) - clrbits_8((unsigned char *)PIXIS_BASE + PIXIS_VSPEED2, mask); + clrbits_8(pixis_base + PIXIS_VSPEED2, mask); else if (!strcmp(argv[argc - 1], "off")) - setbits_8((unsigned char *)PIXIS_BASE + PIXIS_VSPEED2, mask); + setbits_8(pixis_base + PIXIS_VSPEED2, mask); return 0; } diff --git a/board/freescale/mpc8536ds/mpc8536ds.c b/board/freescale/mpc8536ds/mpc8536ds.c index 66f095f..8c5984b 100644 --- a/board/freescale/mpc8536ds/mpc8536ds.c +++ b/board/freescale/mpc8536ds/mpc8536ds.c @@ -529,20 +529,24 @@ ics307_clk_freq (unsigned char cw0, unsigned char cw1, unsigned char cw2) unsigned long get_board_sys_clk(ulong dummy) { + u8 *pixis_base = (u8 *)PIXIS_BASE; + return ics307_clk_freq ( - in8(PIXIS_BASE + PIXIS_VSYSCLK0), - in8(PIXIS_BASE + PIXIS_VSYSCLK1), - in8(PIXIS_BASE + PIXIS_VSYSCLK2) + in_8(pixis_base + PIXIS_VSYSCLK0), + in_8(pixis_base + PIXIS_VSYSCLK1), + in_8(pixis_base + PIXIS_VSYSCLK2) ); } unsigned long get_board_ddr_clk(ulong dummy) { + u8 *pixis_base = (u8 *)PIXIS_BASE; + return ics307_clk_freq ( - in8(PIXIS_BASE + PIXIS_VDDRCLK0), - in8(PIXIS_BASE + PIXIS_VDDRCLK1), - in8(PIXIS_BASE + PIXIS_VDDRCLK2) + in_8(pixis_base + PIXIS_VDDRCLK0), + in_8(pixis_base + PIXIS_VDDRCLK1), + in_8(pixis_base + PIXIS_VDDRCLK2) ); } #else @@ -551,8 +555,9 @@ get_board_sys_clk(ulong dummy) { u8 i; ulong val = 0; + u8 *pixis_base = (u8 *)PIXIS_BASE; - i = in8(PIXIS_BASE + PIXIS_SPD); + i = in_8(pixis_base + PIXIS_SPD); i &= 0x07; switch (i) { @@ -590,8 +595,9 @@ get_board_ddr_clk(ulong dummy) { u8 i; ulong val = 0; + u8 *pixis_base = (u8 *)PIXIS_BASE; - i = in8(PIXIS_BASE + PIXIS_SPD); + i = in_8(pixis_base + PIXIS_SPD); i &= 0x38; i >>= 3; diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c index b251e2e..fd59839 100644 --- a/board/freescale/mpc8544ds/mpc8544ds.c +++ b/board/freescale/mpc8544ds/mpc8544ds.c @@ -391,11 +391,12 @@ get_board_sys_clk(ulong dummy) { u8 i, go_bit, rd_clks; ulong val = 0; + u8 *pixis_base = (u8 *)PIXIS_BASE; - go_bit = in8(PIXIS_BASE + PIXIS_VCTL); + go_bit = in_8(pixis_base + PIXIS_VCTL); go_bit &= 0x01; - rd_clks = in8(PIXIS_BASE + PIXIS_VCFGEN0); + rd_clks = in_8(pixis_base + PIXIS_VCFGEN0); rd_clks &= 0x1C; /* @@ -406,11 +407,11 @@ get_board_sys_clk(ulong dummy) if (go_bit) { if (rd_clks == 0x1c) - i = in8(PIXIS_BASE + PIXIS_AUX); + i = in_8(pixis_base + PIXIS_AUX); else - i = in8(PIXIS_BASE + PIXIS_SPD); + i = in_8(pixis_base + PIXIS_SPD); } else { - i = in8(PIXIS_BASE + PIXIS_SPD); + i = in_8(pixis_base + PIXIS_SPD); } i &= 0x07; diff --git a/board/freescale/mpc8572ds/mpc8572ds.c b/board/freescale/mpc8572ds/mpc8572ds.c index 51231d7..7c86134 100644 --- a/board/freescale/mpc8572ds/mpc8572ds.c +++ b/board/freescale/mpc8572ds/mpc8572ds.c @@ -432,19 +432,23 @@ ics307_clk_freq (unsigned char cw0, unsigned char cw1, unsigned char cw2) unsigned long get_board_sys_clk(ulong dummy) { + u8 *pixis_base = (u8 *)PIXIS_BASE; + return ics307_clk_freq ( - in8(PIXIS_BASE + PIXIS_VSYSCLK0), - in8(PIXIS_BASE + PIXIS_VSYSCLK1), - in8(PIXIS_BASE + PIXIS_VSYSCLK2) + in_8(pixis_base + PIXIS_VSYSCLK0), + in_8(pixis_base + PIXIS_VSYSCLK1), + in_8(pixis_base + PIXIS_VSYSCLK2) ); } unsigned long get_board_ddr_clk(ulong dummy) { + u8 *pixis_base = (u8 *)PIXIS_BASE; + return ics307_clk_freq ( - in8(PIXIS_BASE + PIXIS_VDDRCLK0), - in8(PIXIS_BASE + PIXIS_VDDRCLK1), - in8(PIXIS_BASE + PIXIS_VDDRCLK2) + in_8(pixis_base + PIXIS_VDDRCLK0), + in_8(pixis_base + PIXIS_VDDRCLK1), + in_8(pixis_base + PIXIS_VDDRCLK2) ); } #else @@ -452,8 +456,9 @@ unsigned long get_board_sys_clk(ulong dummy) { u8 i; ulong val = 0; + u8 *pixis_base = (u8 *)PIXIS_BASE; - i = in8(PIXIS_BASE + PIXIS_SPD); + i = in_8(pixis_base + PIXIS_SPD); i &= 0x07; switch (i) { @@ -490,8 +495,9 @@ unsigned long get_board_ddr_clk(ulong dummy) { u8 i; ulong val = 0; + u8 *pixis_base = (u8 *)PIXIS_BASE; - i = in8(PIXIS_BASE + PIXIS_SPD); + i = in_8(pixis_base + PIXIS_SPD); i &= 0x38; i >>= 3; diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c index 419b2c1..2ac169b 100644 --- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c +++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c @@ -55,16 +55,17 @@ int board_early_init_f(void) int misc_init_r(void) { u8 tmp_val, version; + u8 *pixis_base = (u8 *)PIXIS_BASE; /*Do not use 8259PIC*/ - tmp_val = in8(PIXIS_BASE + PIXIS_BRDCFG0); - out8(PIXIS_BASE + PIXIS_BRDCFG0, tmp_val | 0x80); + tmp_val = in_8(pixis_base + PIXIS_BRDCFG0); + out_8(pixis_base + PIXIS_BRDCFG0, tmp_val | 0x80); /*For FPGA V7 or higher, set the IRQMAPSEL to 0 to use MAP0 interrupt*/ - version = in8(PIXIS_BASE + PIXIS_PVER); + version = in_8(pixis_base + PIXIS_PVER); if(version >= 0x07) { - tmp_val = in8(PIXIS_BASE + PIXIS_BRDCFG0); - out8(PIXIS_BASE + PIXIS_BRDCFG0, tmp_val & 0xbf); + tmp_val = in_8(pixis_base + PIXIS_BRDCFG0); + out_8(pixis_base + PIXIS_BRDCFG0, tmp_val & 0xbf); } /* Using this for DIU init before the driver in linux takes over @@ -96,11 +97,12 @@ int checkboard(void) { volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; volatile ccsr_local_mcm_t *mcm = &immap->im_local_mcm; + u8 *pixis_base = (u8 *)PIXIS_BASE; printf ("Board: MPC8610HPCD, System ID: 0x%02x, " "System Version: 0x%02x, FPGA Version: 0x%02x\n", - in8(PIXIS_BASE + PIXIS_ID), in8(PIXIS_BASE + PIXIS_VER), - in8(PIXIS_BASE + PIXIS_PVER)); + in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER), + in_8(pixis_base + PIXIS_PVER)); mcm->abcr |= 0x00010000; /* 0 */ mcm->hpmr3 = 0x80000008; /* 4c */ @@ -438,10 +440,9 @@ get_board_sys_clk(ulong dummy) { u8 i; ulong val = 0; - ulong a; + u8 *pixis_base = (u8 *)PIXIS_BASE; - a = PIXIS_BASE + PIXIS_SPD; - i = in8(a); + i = in_8(pixis_base + PIXIS_SPD); i &= 0x07; switch (i) { @@ -481,7 +482,9 @@ int board_eth_init(bd_t *bis) void board_reset(void) { - out8(PIXIS_BASE + PIXIS_RST, 0); + u8 *pixis_base = (u8 *)PIXIS_BASE; + + out_8(pixis_base + PIXIS_RST, 0); while (1) ; diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c b/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c index 63eba0c..4186a2e 100644 --- a/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c +++ b/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c @@ -69,9 +69,10 @@ void mpc8610hpcd_diu_init(void) unsigned int pixel_format; unsigned char tmp_val; unsigned char pixis_arch; + u8 *pixis_base = (u8 *)PIXIS_BASE; - tmp_val = in8(PIXIS_BASE + PIXIS_BRDCFG0); - pixis_arch = in8(PIXIS_BASE + PIXIS_VER); + tmp_val = in_8(pixis_base + PIXIS_BRDCFG0); + pixis_arch = in_8(pixis_base + PIXIS_VER); monitor_port = getenv("monitor"); if (!strncmp(monitor_port, "0", 1)) { /* 0 - DVI */ @@ -82,28 +83,28 @@ void mpc8610hpcd_diu_init(void) else pixel_format = 0x88883316; gamma_fix = 0; - out8(PIXIS_BASE + PIXIS_BRDCFG0, tmp_val | 0x08); + out_8(pixis_base + PIXIS_BRDCFG0, tmp_val | 0x08); } else if (!strncmp(monitor_port, "1", 1)) { /* 1 - Single link LVDS */ xres = 1024; yres = 768; pixel_format = 0x88883316; gamma_fix = 0; - out8(PIXIS_BASE + PIXIS_BRDCFG0, (tmp_val & 0xf7) | 0x10); + out_8(pixis_base + PIXIS_BRDCFG0, (tmp_val & 0xf7) | 0x10); } else if (!strncmp(monitor_port, "2", 1)) { /* 2 - Double link LVDS */ xres = 1280; yres = 1024; pixel_format = 0x88883316; gamma_fix = 1; - out8(PIXIS_BASE + PIXIS_BRDCFG0, tmp_val & 0xe7); + out_8(pixis_base + PIXIS_BRDCFG0, tmp_val & 0xe7); } else { /* DVI */ xres = 1280; yres = 1024; pixel_format = 0x88882317; gamma_fix = 0; - out8(PIXIS_BASE + PIXIS_BRDCFG0, tmp_val | 0x08); + out_8(pixis_base + PIXIS_BRDCFG0, tmp_val | 0x08); } fsl_diu_init(xres, pixel_format, gamma_fix, diff --git a/board/freescale/mpc8641hpcn/mpc8641hpcn.c b/board/freescale/mpc8641hpcn/mpc8641hpcn.c index ce26320..a8b2112 100644 --- a/board/freescale/mpc8641hpcn/mpc8641hpcn.c +++ b/board/freescale/mpc8641hpcn/mpc8641hpcn.c @@ -310,11 +310,12 @@ get_board_sys_clk(ulong dummy) { u8 i, go_bit, rd_clks; ulong val = 0; + u8 *pixis_base = (u8 *)PIXIS_BASE; - go_bit = in8(PIXIS_BASE + PIXIS_VCTL); + go_bit = in_8(pixis_base + PIXIS_VCTL); go_bit &= 0x01; - rd_clks = in8(PIXIS_BASE + PIXIS_VCFGEN0); + rd_clks = in_8(pixis_base + PIXIS_VCFGEN0); rd_clks &= 0x1C; /* @@ -325,11 +326,11 @@ get_board_sys_clk(ulong dummy) if (go_bit) { if (rd_clks == 0x1c) - i = in8(PIXIS_BASE + PIXIS_AUX); + i = in_8(pixis_base + PIXIS_AUX); else - i = in8(PIXIS_BASE + PIXIS_SPD); + i = in_8(pixis_base + PIXIS_SPD); } else { - i = in8(PIXIS_BASE + PIXIS_SPD); + i = in_8(pixis_base + PIXIS_SPD); } i &= 0x07; @@ -373,7 +374,9 @@ int board_eth_init(bd_t *bis) void board_reset(void) { - out8(PIXIS_BASE + PIXIS_RST, 0); + u8 *pixis_base = (u8 *)PIXIS_BASE; + + out_8(pixis_base + PIXIS_RST, 0); while (1) ; diff --git a/board/freescale/p2020ds/p2020ds.c b/board/freescale/p2020ds/p2020ds.c index fdd8325..14de7e7 100644 --- a/board/freescale/p2020ds/p2020ds.c +++ b/board/freescale/p2020ds/p2020ds.c @@ -479,10 +479,12 @@ unsigned long calculate_board_sys_clk(ulong dummy) { ulong val; + u8 *pixis_base = (u8 *)PIXIS_BASE; + val = ics307_clk_freq( - in8(PIXIS_BASE + PIXIS_VSYSCLK0), - in8(PIXIS_BASE + PIXIS_VSYSCLK1), - in8(PIXIS_BASE + PIXIS_VSYSCLK2)); + in_8(pixis_base + PIXIS_VSYSCLK0), + in_8(pixis_base + PIXIS_VSYSCLK1), + in_8(pixis_base + PIXIS_VSYSCLK2)); debug("sysclk val = %lu\n", val); return val; } @@ -491,10 +493,12 @@ unsigned long calculate_board_ddr_clk(ulong dummy) { ulong val; + u8 *pixis_base = (u8 *)PIXIS_BASE; + val = ics307_clk_freq( - in8(PIXIS_BASE + PIXIS_VDDRCLK0), - in8(PIXIS_BASE + PIXIS_VDDRCLK1), - in8(PIXIS_BASE + PIXIS_VDDRCLK2)); + in_8(pixis_base + PIXIS_VDDRCLK0), + in_8(pixis_base + PIXIS_VDDRCLK1), + in_8(pixis_base + PIXIS_VDDRCLK2)); debug("ddrclk val = %lu\n", val); return val; } @@ -503,8 +507,9 @@ unsigned long get_board_sys_clk(ulong dummy) { u8 i; ulong val = 0; + u8 *pixis_base = (u8 *)PIXIS_BASE; - i = in8(PIXIS_BASE + PIXIS_SPD); + i = in_8(pixis_base + PIXIS_SPD); i &= 0x07; switch (i) { @@ -541,8 +546,9 @@ unsigned long get_board_ddr_clk(ulong dummy) { u8 i; ulong val = 0; + u8 *pixis_base = (u8 *)PIXIS_BASE; - i = in8(PIXIS_BASE + PIXIS_SPD); + i = in_8(pixis_base + PIXIS_SPD); i &= 0x38; i >>= 3; -- cgit v1.1