From 19bd688484322fe62d1a66c8299da6ff9e967ff9 Mon Sep 17 00:00:00 2001 From: Stelian Pop Date: Thu, 22 May 2008 00:15:40 +0200 Subject: Fix boot from NOR due to incorrect reset delay. AT91 RSTC registers are battery-backuped, so their values are not reset across power cycles. One of those registers, the AT91_RSTC_MR register, is being modified by U-Boot, in the ethernet initialisation routine, to generate a 500ms user reset. Unfortunately, this value is not being restored afterwards, causing subsequent resets to also last for 500ms. This long reset sequence causes problems (at least) in the boot sequence from NOR: by the time the CPU tries to load a program from the NOR flash, the latter is still in reset and not yet available. Additionaly, this patch fixes a bug in the original code which caused the reset delay to last for 2s instead of 500ms. Signed-off-by: Stelian Pop Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- board/atmel/at91cap9adk/at91cap9adk.c | 7 ++++++- board/atmel/at91sam9260ek/at91sam9260ek.c | 4 ++-- board/atmel/at91sam9263ek/at91sam9263ek.c | 7 ++++++- 3 files changed, 14 insertions(+), 4 deletions(-) (limited to 'board') diff --git a/board/atmel/at91cap9adk/at91cap9adk.c b/board/atmel/at91cap9adk/at91cap9adk.c index a3eaf19..c5082a0 100644 --- a/board/atmel/at91cap9adk/at91cap9adk.c +++ b/board/atmel/at91cap9adk/at91cap9adk.c @@ -196,7 +196,7 @@ static void at91cap9_macb_hw_init(void) /* Need to reset PHY -> 500ms reset */ at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | - AT91_RSTC_ERSTL | (0x0D << 8) | + (AT91_RSTC_ERSTL & (0x0D << 8)) | AT91_RSTC_URSTEN); at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST); @@ -204,6 +204,11 @@ static void at91cap9_macb_hw_init(void) /* Wait for end hardware reset */ while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL)); + /* Restore NRST value */ + at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | + (AT91_RSTC_ERSTL & (0x0 << 8)) | + AT91_RSTC_URSTEN); + /* Re-enable pull-up */ writel(pin_to_mask(AT91_PIN_PB22) | pin_to_mask(AT91_PIN_PB25) | diff --git a/board/atmel/at91sam9260ek/at91sam9260ek.c b/board/atmel/at91sam9260ek/at91sam9260ek.c index ef4d486..4247c94 100644 --- a/board/atmel/at91sam9260ek/at91sam9260ek.c +++ b/board/atmel/at91sam9260ek/at91sam9260ek.c @@ -149,7 +149,7 @@ static void at91sam9260ek_macb_hw_init(void) /* Need to reset PHY -> 500ms reset */ at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | - AT91_RSTC_ERSTL | (0x0D << 8) | + (AT91_RSTC_ERSTL & (0x0D << 8)) | AT91_RSTC_URSTEN); at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST); @@ -159,7 +159,7 @@ static void at91sam9260ek_macb_hw_init(void) /* Restore NRST value */ at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | - AT91_RSTC_ERSTL | (0x0 << 8) | + (AT91_RSTC_ERSTL & (0x0 << 8)) | AT91_RSTC_URSTEN); /* Re-enable pull-up */ diff --git a/board/atmel/at91sam9263ek/at91sam9263ek.c b/board/atmel/at91sam9263ek/at91sam9263ek.c index ba7fc71..169ee25 100644 --- a/board/atmel/at91sam9263ek/at91sam9263ek.c +++ b/board/atmel/at91sam9263ek/at91sam9263ek.c @@ -147,7 +147,7 @@ static void at91sam9263ek_macb_hw_init(void) /* Need to reset PHY -> 500ms reset */ at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | - AT91_RSTC_ERSTL | (0x0D << 8) | + (AT91_RSTC_ERSTL & (0x0D << 8)) | AT91_RSTC_URSTEN); at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST); @@ -155,6 +155,11 @@ static void at91sam9263ek_macb_hw_init(void) /* Wait for end hardware reset */ while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL)); + /* Restore NRST value */ + at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | + (AT91_RSTC_ERSTL & (0x0 << 8)) | + AT91_RSTC_URSTEN); + /* Re-enable pull-up */ writel(pin_to_mask(AT91_PIN_PC25), pin_to_controller(AT91_PIN_PC0) + PIO_PUER); -- cgit v1.1 From d3bcdf838e2991d58571308fa6e04ca335bc06e8 Mon Sep 17 00:00:00 2001 From: Patrice Vilchez Date: Tue, 27 May 2008 11:15:29 +0200 Subject: [AT91SAM9] Fix NAND FLASH timings Fix NAND FLASH timings for at91sam9x evaluation kits. New timings are based on application note "NAND Flash Support on AT91SAM9 Microcontrollers" available at http://atmel.com/dyn/resources/prod_documents/doc6255.pdf Signed-off-by: Patrice Vilchez Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD Acked-by: Stelian Pop --- board/atmel/at91sam9260ek/at91sam9260ek.c | 4 ++-- board/atmel/at91sam9261ek/at91sam9261ek.c | 12 ++++++------ board/atmel/at91sam9263ek/at91sam9263ek.c | 4 ++-- board/atmel/at91sam9rlek/at91sam9rlek.c | 12 ++++++------ 4 files changed, 16 insertions(+), 16 deletions(-) (limited to 'board') diff --git a/board/atmel/at91sam9260ek/at91sam9260ek.c b/board/atmel/at91sam9260ek/at91sam9260ek.c index 4247c94..836a0c4 100644 --- a/board/atmel/at91sam9260ek/at91sam9260ek.c +++ b/board/atmel/at91sam9260ek/at91sam9260ek.c @@ -80,8 +80,8 @@ static void at91sam9260ek_nand_hw_init(void) /* Configure SMC CS3 for NAND/SmartMedia */ at91_sys_write(AT91_SMC_SETUP(3), - AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) | - AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0)); + AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) | + AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0)); at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3)); diff --git a/board/atmel/at91sam9261ek/at91sam9261ek.c b/board/atmel/at91sam9261ek/at91sam9261ek.c index 3de234c..647aab5 100644 --- a/board/atmel/at91sam9261ek/at91sam9261ek.c +++ b/board/atmel/at91sam9261ek/at91sam9261ek.c @@ -82,13 +82,13 @@ static void at91sam9261ek_nand_hw_init(void) /* Configure SMC CS3 for NAND/SmartMedia */ at91_sys_write(AT91_SMC_SETUP(3), - AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) | - AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0)); + AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) | + AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0)); at91_sys_write(AT91_SMC_PULSE(3), - AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5) | - AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5)); + AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) | + AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3)); at91_sys_write(AT91_SMC_CYCLE(3), - AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7)); + AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5)); at91_sys_write(AT91_SMC_MODE(3), AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | @@ -97,7 +97,7 @@ static void at91sam9261ek_nand_hw_init(void) #else /* CFG_NAND_DBW_8 */ AT91_SMC_DBW_8 | #endif - AT91_SMC_TDF_(1)); + AT91_SMC_TDF_(2)); at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_PIOC); diff --git a/board/atmel/at91sam9263ek/at91sam9263ek.c b/board/atmel/at91sam9263ek/at91sam9263ek.c index 169ee25..927fc91 100644 --- a/board/atmel/at91sam9263ek/at91sam9263ek.c +++ b/board/atmel/at91sam9263ek/at91sam9263ek.c @@ -83,8 +83,8 @@ static void at91sam9263ek_nand_hw_init(void) /* Configure SMC CS3 for NAND/SmartMedia */ at91_sys_write(AT91_SMC_SETUP(3), - AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) | - AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0)); + AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) | + AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0)); at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3)); diff --git a/board/atmel/at91sam9rlek/at91sam9rlek.c b/board/atmel/at91sam9rlek/at91sam9rlek.c index 10423d2..509e7c3 100644 --- a/board/atmel/at91sam9rlek/at91sam9rlek.c +++ b/board/atmel/at91sam9rlek/at91sam9rlek.c @@ -82,13 +82,13 @@ static void at91sam9rlek_nand_hw_init(void) /* Configure SMC CS3 for NAND/SmartMedia */ at91_sys_write(AT91_SMC_SETUP(3), - AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) | - AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0)); + AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) | + AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0)); at91_sys_write(AT91_SMC_PULSE(3), - AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5) | - AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5)); + AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) | + AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3)); at91_sys_write(AT91_SMC_CYCLE(3), - AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7)); + AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5)); at91_sys_write(AT91_SMC_MODE(3), AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | @@ -97,7 +97,7 @@ static void at91sam9rlek_nand_hw_init(void) #else /* CFG_NAND_DBW_8 */ AT91_SMC_DBW_8 | #endif - AT91_SMC_TDF_(1)); + AT91_SMC_TDF_(2)); at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_PIOD); -- cgit v1.1