From d26154c9a692586b66eb6d1f8e1b67c75e40ea70 Mon Sep 17 00:00:00 2001 From: Anton Vorontsov Date: Thu, 11 Sep 2008 21:35:36 +0400 Subject: mpc83xx: spd_sdram: fix ddr sdram base address assignment bug The spd_dram code shifts the base address, then masks 20 bits, but forgets to shift the base address back. Fix this by just masking the base address correctly. Found this bug while trying to relocate a DDR memory at the base != 0. Signed-off-by: Anton Vorontsov Signed-off-by: Kim Phillips --- board/freescale/mpc8313erdb/sdram.c | 2 +- board/freescale/mpc8315erdb/sdram.c | 2 +- board/freescale/mpc8349emds/mpc8349emds.c | 2 +- board/freescale/mpc8349itx/mpc8349itx.c | 2 +- board/freescale/mpc837xemds/mpc837xemds.c | 2 +- board/freescale/mpc837xerdb/mpc837xerdb.c | 2 +- board/matrix_vision/mvblm7/mvblm7.c | 2 +- board/sbc8349/sbc8349.c | 2 +- 8 files changed, 8 insertions(+), 8 deletions(-) (limited to 'board') diff --git a/board/freescale/mpc8313erdb/sdram.c b/board/freescale/mpc8313erdb/sdram.c index 3a6347f..128cd40 100644 --- a/board/freescale/mpc8313erdb/sdram.c +++ b/board/freescale/mpc8313erdb/sdram.c @@ -64,7 +64,7 @@ static long fixed_sdram(void) volatile immap_t *im = (volatile immap_t *)CFG_IMMR; u32 msize_log2 = __ilog2(msize); - im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE >> 12; + im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE & 0xfffff000; im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1); im->sysconf.ddrcdr = CFG_DDRCDR_VALUE; diff --git a/board/freescale/mpc8315erdb/sdram.c b/board/freescale/mpc8315erdb/sdram.c index 07e6486..3714c2c 100644 --- a/board/freescale/mpc8315erdb/sdram.c +++ b/board/freescale/mpc8315erdb/sdram.c @@ -60,7 +60,7 @@ static long fixed_sdram(void) u32 msize = CFG_DDR_SIZE * 1024 * 1024; u32 msize_log2 = __ilog2(msize); - im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE >> 12; + im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE & 0xfffff000; im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1); im->sysconf.ddrcdr = CFG_DDRCDR_VALUE; diff --git a/board/freescale/mpc8349emds/mpc8349emds.c b/board/freescale/mpc8349emds/mpc8349emds.c index 4c04f2c..ef947fe 100644 --- a/board/freescale/mpc8349emds/mpc8349emds.c +++ b/board/freescale/mpc8349emds/mpc8349emds.c @@ -109,7 +109,7 @@ int fixed_sdram(void) return -1; } } - im->sysconf.ddrlaw[0].bar = ((CFG_DDR_SDRAM_BASE>>12) & 0xfffff); + im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE & 0xfffff000; im->sysconf.ddrlaw[0].ar = LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE); #if (CFG_DDR_SIZE != 256) diff --git a/board/freescale/mpc8349itx/mpc8349itx.c b/board/freescale/mpc8349itx/mpc8349itx.c index d3fc560..0a20e2b 100644 --- a/board/freescale/mpc8349itx/mpc8349itx.c +++ b/board/freescale/mpc8349itx/mpc8349itx.c @@ -55,7 +55,7 @@ int fixed_sdram(void) im->sysconf.ddrlaw[0].ar = LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE); - im->sysconf.ddrlaw[0].bar = (CFG_DDR_SDRAM_BASE >> 12) & 0xfffff; + im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE & 0xfffff000; /* Only one CS0 for DDR */ im->ddr.csbnds[0].csbnds = 0x0000000f; diff --git a/board/freescale/mpc837xemds/mpc837xemds.c b/board/freescale/mpc837xemds/mpc837xemds.c index 40f1e63..8003ec1 100644 --- a/board/freescale/mpc837xemds/mpc837xemds.c +++ b/board/freescale/mpc837xemds/mpc837xemds.c @@ -108,7 +108,7 @@ int fixed_sdram(void) u32 msize = CFG_DDR_SIZE * 1024 * 1024; u32 msize_log2 = __ilog2(msize); - im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE >> 12; + im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE & 0xfffff000; im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1); #if (CFG_DDR_SIZE != 512) diff --git a/board/freescale/mpc837xerdb/mpc837xerdb.c b/board/freescale/mpc837xerdb/mpc837xerdb.c index aaefc18..e547b51 100644 --- a/board/freescale/mpc837xerdb/mpc837xerdb.c +++ b/board/freescale/mpc837xerdb/mpc837xerdb.c @@ -96,7 +96,7 @@ int fixed_sdram(void) u32 msize = CFG_DDR_SIZE * 1024 * 1024; u32 msize_log2 = __ilog2(msize); - im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE >> 12; + im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE & 0xfffff000; im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1); im->sysconf.ddrcdr = CFG_DDRCDR_VALUE; diff --git a/board/matrix_vision/mvblm7/mvblm7.c b/board/matrix_vision/mvblm7/mvblm7.c index b07f913..3dcff67 100644 --- a/board/matrix_vision/mvblm7/mvblm7.c +++ b/board/matrix_vision/mvblm7/mvblm7.c @@ -50,7 +50,7 @@ int fixed_sdram(void) if (ddr_size & 1) return -1; } - im->sysconf.ddrlaw[0].bar = ((CFG_DDR_SDRAM_BASE>>12) & 0xfffff); + im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE & 0xfffff000; im->sysconf.ddrlaw[0].ar = LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE); diff --git a/board/sbc8349/sbc8349.c b/board/sbc8349/sbc8349.c index 4a44fda..93ada0b 100644 --- a/board/sbc8349/sbc8349.c +++ b/board/sbc8349/sbc8349.c @@ -101,7 +101,7 @@ int fixed_sdram(void) return -1; } } - im->sysconf.ddrlaw[0].bar = ((CFG_DDR_SDRAM_BASE>>12) & 0xfffff); + im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE & 0xfffff000; im->sysconf.ddrlaw[0].ar = LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE); #if (CFG_DDR_SIZE != 256) -- cgit v1.1 From e46c7bfb8bc3c304cedd20f7a365d6e78d7eaf17 Mon Sep 17 00:00:00 2001 From: Rafal Czubak Date: Wed, 8 Oct 2008 13:41:30 +0200 Subject: FSL: Fix get_cpu_board_revision() return value. get_cpu_board_revision() returned board revision based on information stored in global static struct eeprom. It should instead use one from local struct board_eeprom, to which the data is actually read from EEPROM. The bug led to system hang after printing L1 cache information on U-Boot startup. The problem was observed on MPC8555CDS system and possibly affects other Freescale MPC85xx boards using CFG_I2C_EEPROM_CCID. The change has been successfully tested on MPC8555CDS system. Signed-off-by: Rafal Czubak --- board/freescale/common/sys_eeprom.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'board') diff --git a/board/freescale/common/sys_eeprom.c b/board/freescale/common/sys_eeprom.c index e53ead0..9bef92e 100644 --- a/board/freescale/common/sys_eeprom.c +++ b/board/freescale/common/sys_eeprom.c @@ -463,6 +463,6 @@ unsigned int get_cpu_board_revision(void) if ((be.major == 0xff) && (be.minor == 0xff)) return MPC85XX_CPU_BOARD_REV(0, 0); - return MPC85XX_CPU_BOARD_REV(e.major, e.minor); + return MPC85XX_CPU_BOARD_REV(be.major, be.minor); } #endif -- cgit v1.1