From ef3cc8112c7ac58d621246523e8c84bf6035b53b Mon Sep 17 00:00:00 2001 From: Thomas Chou Date: Mon, 25 Aug 2014 15:57:06 +0800 Subject: nios2: remove epled driver The epled driver was replaced by altera_pio and gpio_led. Signed-off-by: Thomas Chou --- board/altera/common/epled.c | 46 ------------------------------------- board/altera/nios2-generic/Makefile | 1 - 2 files changed, 47 deletions(-) delete mode 100644 board/altera/common/epled.c (limited to 'board') diff --git a/board/altera/common/epled.c b/board/altera/common/epled.c deleted file mode 100644 index 580d590..0000000 --- a/board/altera/common/epled.c +++ /dev/null @@ -1,46 +0,0 @@ -/* - * (C) Copyright 2004, Psyent Corporation - * Scott McNutt - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include -#include - -/* The LED port is configured as output only, so we - * must track the state manually. - */ -static led_id_t val = 0; - -void __led_init (led_id_t mask, int state) -{ - nios_pio_t *pio = (nios_pio_t *)CONFIG_SYS_LEDPIO_ADDR; - - if (state == STATUS_LED_ON) - val &= ~mask; - else - val |= mask; - writel (val, &pio->data); -} - -void __led_set (led_id_t mask, int state) -{ - nios_pio_t *pio = (nios_pio_t *)CONFIG_SYS_LEDPIO_ADDR; - - if (state == STATUS_LED_ON) - val &= ~mask; - else - val |= mask; - writel (val, &pio->data); -} - -void __led_toggle (led_id_t mask) -{ - nios_pio_t *pio = (nios_pio_t *)CONFIG_SYS_LEDPIO_ADDR; - - val ^= mask; - writel (val, &pio->data); -} diff --git a/board/altera/nios2-generic/Makefile b/board/altera/nios2-generic/Makefile index aa362b3..d3c5b43 100644 --- a/board/altera/nios2-generic/Makefile +++ b/board/altera/nios2-generic/Makefile @@ -8,5 +8,4 @@ obj-y := nios2-generic.o obj-$(CONFIG_CMD_IDE) += ../common/cfide.o -obj-$(CONFIG_EPLED) += ../common/epled.o obj-y += text_base.o -- cgit v1.1 From c69d2e57616f20eb1989cfe235ee036a26c78d5a Mon Sep 17 00:00:00 2001 From: Thomas Chou Date: Thu, 28 Aug 2014 17:29:06 +0800 Subject: nios2: link to CONFIG_SYS_MONITOR_BASE and remove text_base hook This patch changes the link script to base at CONFIG_SYS_MONITOR_BASE. Then we can remove the text_base hook in nios2-generic board. Signed-off-by: Thomas Chou --- board/altera/nios2-generic/Makefile | 1 - board/altera/nios2-generic/nios2-generic.c | 3 - board/altera/nios2-generic/text_base.S | 21 ----- board/altera/nios2-generic/u-boot.lds | 118 ----------------------------- 4 files changed, 143 deletions(-) delete mode 100644 board/altera/nios2-generic/text_base.S delete mode 100644 board/altera/nios2-generic/u-boot.lds (limited to 'board') diff --git a/board/altera/nios2-generic/Makefile b/board/altera/nios2-generic/Makefile index d3c5b43..5e4192c 100644 --- a/board/altera/nios2-generic/Makefile +++ b/board/altera/nios2-generic/Makefile @@ -8,4 +8,3 @@ obj-y := nios2-generic.o obj-$(CONFIG_CMD_IDE) += ../common/cfide.o -obj-y += text_base.o diff --git a/board/altera/nios2-generic/nios2-generic.c b/board/altera/nios2-generic/nios2-generic.c index 5ab9471..834cbeb 100644 --- a/board/altera/nios2-generic/nios2-generic.c +++ b/board/altera/nios2-generic/nios2-generic.c @@ -14,8 +14,6 @@ #include #include -void text_base_hook(void); /* nop hook for text_base.S */ - #if defined(CONFIG_ENV_IS_IN_FLASH) && defined(CONFIG_ENV_ADDR) && \ defined(CONFIG_CFI_FLASH_MTD) static void __early_flash_cmd_reset(void) @@ -30,7 +28,6 @@ void early_flash_cmd_reset(void) int board_early_init_f(void) { - text_base_hook(); #ifdef CONFIG_ALTERA_PIO #ifdef LED_PIO_BASE altera_pio_init(LED_PIO_BASE, LED_PIO_WIDTH, 'o', diff --git a/board/altera/nios2-generic/text_base.S b/board/altera/nios2-generic/text_base.S deleted file mode 100644 index f236db1..0000000 --- a/board/altera/nios2-generic/text_base.S +++ /dev/null @@ -1,21 +0,0 @@ -/* - * text_base - * - * (C) Copyright 2010, Thomas Chou - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#include - -#ifdef CONFIG_SYS_MONITOR_BASE - .text - /* text base used in link script u-boot.lds */ - .global text_base - .equ text_base,CONFIG_SYS_MONITOR_BASE - /* dummy func to let linker include this file */ - .global text_base_hook -text_base_hook: - ret -#endif diff --git a/board/altera/nios2-generic/u-boot.lds b/board/altera/nios2-generic/u-boot.lds deleted file mode 100644 index e35fae5..0000000 --- a/board/altera/nios2-generic/u-boot.lds +++ /dev/null @@ -1,118 +0,0 @@ -/* - * (C) Copyright 2004, Psyent Corporation - * Scott McNutt - * - * SPDX-License-Identifier: GPL-2.0+ - */ - - -OUTPUT_FORMAT("elf32-littlenios2") -OUTPUT_ARCH(nios2) -ENTRY(_start) - -SECTIONS -{ - . = text_base; - .text : - { - arch/nios2/cpu/start.o (.text) - *(.text) - *(.text.*) - *(.gnu.linkonce.t*) - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - *(.gnu.linkonce.r*) - } - . = ALIGN (4); - _etext = .; - PROVIDE (etext = .); - - /* CMD TABLE - sandwich this in between text and data so - * the initialization code relocates the command table as - * well -- admittedly, this is just pure laziness ;-) - */ - - . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - /* INIT DATA sections - "Small" data (see the gcc -G option) - * is always gp-relative. Here we make all init data sections - * adjacent to simplify the startup code -- and provide - * the global pointer for gp-relative access. - */ - _data = .; - .data : - { - *(.data) - *(.data.*) - *(.gnu.linkonce.d*) - } - - . = ALIGN(16); - _gp = .; /* Global pointer addr */ - PROVIDE (gp = .); - - .sdata : - { - *(.sdata) - *(.sdata.*) - *(.gnu.linkonce.s.*) - } - . = ALIGN(4); - - _edata = .; - PROVIDE (edata = .); - - /* UNINIT DATA - Small uninitialized data is first so it's - * adjacent to sdata and can be referenced via gp. The normal - * bss follows. We keep it adjacent to simplify init code. - */ - __bss_start = .; - .sbss (NOLOAD) : - { - *(.sbss) - *(.sbss.*) - *(.gnu.linkonce.sb.*) - *(.scommon) - } - . = ALIGN(4); - .bss (NOLOAD) : - { - *(.bss) - *(.bss.*) - *(.dynbss) - *(COMMON) - *(.scommon) - } - . = ALIGN(4); - __bss_end = .; - PROVIDE (end = .); - - /* DEBUG -- symbol table, string table, etc. etc. - */ - .stab 0 : { *(.stab) } - .stabstr 0 : { *(.stabstr) } - .stab.excl 0 : { *(.stab.excl) } - .stab.exclstr 0 : { *(.stab.exclstr) } - .stab.index 0 : { *(.stab.index) } - .stab.indexstr 0 : { *(.stab.indexstr) } - .comment 0 : { *(.comment) } - .debug 0 : { *(.debug) } - .line 0 : { *(.line) } - .debug_srcinfo 0 : { *(.debug_srcinfo) } - .debug_sfnames 0 : { *(.debug_sfnames) } - .debug_aranges 0 : { *(.debug_aranges) } - .debug_pubnames 0 : { *(.debug_pubnames) } - .debug_info 0 : { *(.debug_info) } - .debug_abbrev 0 : { *(.debug_abbrev) } - .debug_line 0 : { *(.debug_line) } - .debug_frame 0 : { *(.debug_frame) } - .debug_str 0 : { *(.debug_str) } - .debug_loc 0 : { *(.debug_loc) } - .debug_macinfo 0 : { *(.debug_macinfo) } - .debug_weaknames 0 : { *(.debug_weaknames) } - .debug_funcnames 0 : { *(.debug_funcnames) } - .debug_typenames 0 : { *(.debug_typenames) } - .debug_varnames 0 : { *(.debug_varnames) } -} -- cgit v1.1 From 857b9cb69ffc2b5a607e55a09325290274c7272e Mon Sep 17 00:00:00 2001 From: Thomas Chou Date: Sat, 30 Aug 2014 17:45:23 +0800 Subject: nios2: rebase nios2-generic board to 3c120 reference design Though nios2-generic board meant to be a template, it is helpful to be able to test on a real hardware. As the nios2 linux is developed and tested on a 3c120 FPGA based Golden Hardware Reference Design, it makes sense to rebase nios2-generic on this FPGA design. Signed-off-by: Thomas Chou --- board/altera/nios2-generic/custom_fpga.h | 127 +++++++++++++++++-------------- 1 file changed, 69 insertions(+), 58 deletions(-) (limited to 'board') diff --git a/board/altera/nios2-generic/custom_fpga.h b/board/altera/nios2-generic/custom_fpga.h index fd3ec9a..cf75d35 100644 --- a/board/altera/nios2-generic/custom_fpga.h +++ b/board/altera/nios2-generic/custom_fpga.h @@ -1,78 +1,89 @@ /* - * (C) Copyright 2010, Thomas Chou + * This header is generated by sopc2dts + * Sopc2dts is written by Walter Goossens + * in cooperation with the nios2 community * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This file is generated by sopc-create-config-files. + * SPDX-License-Identifier: GPL-2.0+ */ #ifndef _CUSTOM_FPGA_H_ #define _CUSTOM_FPGA_H_ -/* generated from std_1c20.sopc */ - -/* cpu.data_master is a altera_nios2 */ -#define CONFIG_SYS_CLK_FREQ 50000000 -#define CONFIG_SYS_RESET_ADDR 0x00000000 -#define CONFIG_SYS_EXCEPTION_ADDR 0x01000020 -#define CONFIG_SYS_ICACHE_SIZE 4096 -#define CONFIG_SYS_ICACHELINE_SIZE 32 -#define CONFIG_SYS_DCACHE_SIZE 2048 -#define CONFIG_SYS_DCACHELINE_SIZE 4 - -/* sdram.s1 is a altera_avalon_new_sdram_controller */ -#define CONFIG_SYS_SDRAM_BASE 0x01000000 -#define CONFIG_SYS_SDRAM_SIZE 0x01000000 - -/* uart1.s1 is a altera_avalon_uart */ -#define CONFIG_SYS_UART_BASE 0x82120840 -#define CONFIG_SYS_UART_FREQ 50000000 -#define CONFIG_SYS_UART_BAUD 115200 - -/* lan91c111.s1 is a altera_avalon_lan91c111 */ -#define CONFIG_SMC91111_BASE 0x82110300 -#define CONFIG_SMC91111 -#define CONFIG_SMC_USE_32_BIT - -/* epcs_controller.epcs_control_port is a altera_avalon_epcs_flash_controller */ -#define EPCS_CONTROLLER_REG_BASE 0x82100200 -#define CONFIG_SYS_ALTERA_SPI_LIST { EPCS_CONTROLLER_REG_BASE } -#define CONFIG_ALTERA_SPI -#define CONFIG_CMD_SPI -#define CONFIG_CMD_SF -#define CONFIG_SF_DEFAULT_SPEED 30000000 -#define CONFIG_SPI_FLASH -#define CONFIG_SPI_FLASH_STMICRO +/* generated from qsys_ghrd_3c120.sopcinfo */ + +/* Dumping slaves of cpu.data_master */ + +/* cpu.jtag_debug_module is a altera_nios2_qsys */ +#define CONFIG_SYS_CLK_FREQ 125000000 +#define CONFIG_SYS_DCACHE_SIZE 32768 +#define CONFIG_SYS_DCACHELINE_SIZE 32 +#define CONFIG_SYS_ICACHELINE_SIZE 32 +#define CONFIG_SYS_EXCEPTION_ADDR 0xd0000020 +#define CONFIG_SYS_ICACHE_SIZE 32768 +#define CONFIG_SYS_RESET_ADDR 0xc2800000 +#define IO_REGION_BASE 0xE0000000 + +/* pb_cpu_to_ddr2_bot.s0 is a altera_avalon_mm_bridge */ +/* Dumping slaves of pb_cpu_to_ddr2_bot.m0 */ + +/* ddr2_bot.s1 is a altmemddr2 */ +#define CONFIG_SYS_SDRAM_BASE 0xD0000000 +#define CONFIG_SYS_SDRAM_SIZE 0x08000000 + +/* pb_cpu_to_io.s0 is a altera_avalon_mm_bridge */ +/* Dumping slaves of pb_cpu_to_io.m0 */ + +/* timer_1ms.s1 is a altera_avalon_timer */ +#define CONFIG_SYS_TIMER_IRQ 11 +#define CONFIG_SYS_TIMER_FREQ 125000000 +#define CONFIG_SYS_TIMER_BASE 0xE8400000 + +/* sysid.control_slave is a altera_avalon_sysid_qsys */ +#define CONFIG_SYS_SYSID_BASE 0xE8004D40 /* jtag_uart.avalon_jtag_slave is a altera_avalon_jtag_uart */ -#define CONFIG_SYS_JTAG_UART_BASE 0x821208b0 +#define CONFIG_SYS_JTAG_UART_BASE 0xE8004D50 + +/* tse_mac.control_port is a triple_speed_ethernet */ +#define CONFIG_SYS_ALTERA_TSE_RX_FIFO 2048 +#define CONFIG_SYS_ALTERA_TSE_SGDMA_TX_BASE 0xE8004800 +#define CONFIG_SYS_ALTERA_TSE_SGDMA_RX_BASE 0xE8004400 +#define CONFIG_SYS_ALTERA_TSE_TX_FIFO 2048 +#define CONFIG_SYS_ALTERA_TSE_DESC_SIZE 0x00002000 +#define CONFIG_SYS_ALTERA_TSE_MAC_BASE 0xE8004000 +#define CONFIG_SYS_ALTERA_TSE_DESC_BASE 0xE8002000 +#define CONFIG_ALTERA_TSE +#define CONFIG_MII +#define CONFIG_CMD_MII +#define CONFIG_SYS_ALTERA_TSE_PHY_ADDR 18 +#define CONFIG_SYS_ALTERA_TSE_FLAGS 1 + +/* uart.s1 is a altera_avalon_uart */ +#define CONFIG_SYS_UART_BAUD 115200 +#define CONFIG_SYS_UART_BASE 0xE8004C80 +#define CONFIG_SYS_UART_FREQ 62500000 + +/* user_led_pio_8out.s1 is a altera_avalon_pio */ +#define USER_LED_PIO_8OUT_BASE 0xE8004CC0 -/* led_pio.s1 is a altera_avalon_pio */ -#define LED_PIO_BASE 0x82120870 -#define LED_PIO_WIDTH 8 -#define LED_PIO_RSTVAL 0x0 +/* user_dipsw_pio_8in.s1 is a altera_avalon_pio */ +#define USER_DIPSW_PIO_8IN_BASE 0xE8004CE0 +#define USER_DIPSW_PIO_8IN_IRQ 8 -/* high_res_timer.s1 is a altera_avalon_timer */ -#define CONFIG_SYS_TIMER_BASE 0x82120820 -#define CONFIG_SYS_TIMER_IRQ 3 -#define CONFIG_SYS_TIMER_FREQ 50000000 +/* user_pb_pio_4in.s1 is a altera_avalon_pio */ +#define USER_PB_PIO_4IN_BASE 0xE8004D00 +#define USER_PB_PIO_4IN_IRQ 9 + +/* cfi_flash_64m.uas is a altera_generic_tristate_controller */ +#define CFI_FLASH_64M_BASE 0xE0000000 /* ext_flash.s1 is a altera_avalon_cfi_flash */ -#define CONFIG_SYS_FLASH_BASE 0x80000000 +#define CONFIG_SYS_FLASH_BASE CFI_FLASH_64M_BASE #define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_CFI_FLASH_STATUS_POLL /* fix amd flash issue */ #define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_FLASH_PROTECTION #define CONFIG_SYS_MAX_FLASH_BANKS 1 -#define CONFIG_SYS_MAX_FLASH_SECT 1024 - -/* ext_ram.s1 is a altera_nios_dev_kit_stratix_edition_sram2 */ -#define CONFIG_SYS_SRAM_BASE 0x02000000 -#define CONFIG_SYS_SRAM_SIZE 0x00100000 - -/* sysid.control_slave is a altera_avalon_sysid */ -#define CONFIG_SYS_SYSID_BASE 0x821208b8 +#define CONFIG_SYS_MAX_FLASH_SECT 512 #endif /* _CUSTOM_FPGA_H_ */ -- cgit v1.1