From b278c4095b59c40ff512c5433b735b000e547554 Mon Sep 17 00:00:00 2001 From: Rajeshwari Shinde Date: Tue, 12 Feb 2013 20:40:02 +0000 Subject: SMDK5250: Add PMIC voltage settings This patch adds required pmic voltage settings for SMDK5250. Acked-by: Simon Glass Signed-off-by: Rajeshwari Shinde Signed-off-by: Minkyu Kang --- board/samsung/smdk5250/smdk5250.c | 113 +++++++++++++++++++++++++++++++++++++- 1 file changed, 111 insertions(+), 2 deletions(-) (limited to 'board') diff --git a/board/samsung/smdk5250/smdk5250.c b/board/samsung/smdk5250/smdk5250.c index 7a5f132..ffc5ee5 100644 --- a/board/samsung/smdk5250/smdk5250.c +++ b/board/samsung/smdk5250/smdk5250.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include #include @@ -35,6 +36,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -80,12 +82,119 @@ int dram_init(void) } #if defined(CONFIG_POWER) +static int pmic_reg_update(struct pmic *p, int reg, uint regval) +{ + u32 val; + int ret = 0; + + ret = pmic_reg_read(p, reg, &val); + if (ret) { + debug("%s: PMIC %d register read failed\n", __func__, reg); + return -1; + } + val |= regval; + ret = pmic_reg_write(p, reg, val); + if (ret) { + debug("%s: PMIC %d register write failed\n", __func__, reg); + return -1; + } + return 0; +} + int power_init_board(void) { + struct pmic *p; + + set_ps_hold_ctrl(); + + i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + if (pmic_init(I2C_PMIC)) return -1; - else - return 0; + + p = pmic_get("MAX77686_PMIC"); + if (!p) + return -ENODEV; + + if (pmic_probe(p)) + return -1; + + if (pmic_reg_update(p, MAX77686_REG_PMIC_32KHZ, MAX77686_32KHCP_EN)) + return -1; + + if (pmic_reg_update(p, MAX77686_REG_PMIC_BBAT, + MAX77686_BBCHOSTEN | MAX77686_BBCVS_3_5V)) + return -1; + + /* VDD_MIF */ + if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK1OUT, + MAX77686_BUCK1OUT_1V)) { + debug("%s: PMIC %d register write failed\n", __func__, + MAX77686_REG_PMIC_BUCK1OUT); + return -1; + } + + if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK1CRTL, + MAX77686_BUCK1CTRL_EN)) + return -1; + + /* VDD_ARM */ + if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK2DVS1, + MAX77686_BUCK2DVS1_1_3V)) { + debug("%s: PMIC %d register write failed\n", __func__, + MAX77686_REG_PMIC_BUCK2DVS1); + return -1; + } + + if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK2CTRL1, + MAX77686_BUCK2CTRL_ON)) + return -1; + + /* VDD_INT */ + if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK3DVS1, + MAX77686_BUCK3DVS1_1_0125V)) { + debug("%s: PMIC %d register write failed\n", __func__, + MAX77686_REG_PMIC_BUCK3DVS1); + return -1; + } + + if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK3CTRL, + MAX77686_BUCK3CTRL_ON)) + return -1; + + /* VDD_G3D */ + if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK4DVS1, + MAX77686_BUCK4DVS1_1_2V)) { + debug("%s: PMIC %d register write failed\n", __func__, + MAX77686_REG_PMIC_BUCK4DVS1); + return -1; + } + + if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK4CTRL1, + MAX77686_BUCK3CTRL_ON)) + return -1; + + /* VDD_LDO2 */ + if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO2CTRL1, + MAX77686_LD02CTRL1_1_5V | EN_LDO)) + return -1; + + /* VDD_LDO3 */ + if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO3CTRL1, + MAX77686_LD03CTRL1_1_8V | EN_LDO)) + return -1; + + /* VDD_LDO5 */ + if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO5CTRL1, + MAX77686_LD05CTRL1_1_8V | EN_LDO)) + return -1; + + /* VDD_LDO10 */ + if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO10CTRL1, + MAX77686_LD10CTRL1_1_8V | EN_LDO)) + return -1; + + return 0; } #endif -- cgit v1.1 From ce07380534a9fc3cba2b3c1f97932d126ef9979a Mon Sep 17 00:00:00 2001 From: Rajeshwari Shinde Date: Thu, 14 Feb 2013 19:46:14 +0000 Subject: EXYNOS5: GPIO to enable MAX98095 This patch sets high a GPIO to enable the codec MAX98095 Signed-off-by: Rajeshwari Shinde Acked-by: Simon Glass Signed-off-by: Minkyu Kang --- board/samsung/smdk5250/smdk5250.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'board') diff --git a/board/samsung/smdk5250/smdk5250.c b/board/samsung/smdk5250/smdk5250.c index ffc5ee5..6f6f2c2 100644 --- a/board/samsung/smdk5250/smdk5250.c +++ b/board/samsung/smdk5250/smdk5250.c @@ -56,6 +56,18 @@ int board_usb_vbus_init(void) } #endif +#ifdef CONFIG_SOUND_MAX98095 +static void board_enable_audio_codec(void) +{ + struct exynos5_gpio_part1 *gpio1 = (struct exynos5_gpio_part1 *) + samsung_get_base_gpio_part1(); + + /* Enable MAX98095 Codec */ + s5p_gpio_direction_output(&gpio1->x1, 7, 1); + s5p_gpio_set_pull(&gpio1->x1, 7, GPIO_PULL_NONE); +} +#endif + int board_init(void) { gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL); @@ -65,6 +77,9 @@ int board_init(void) #ifdef CONFIG_USB_EHCI_EXYNOS board_usb_vbus_init(); #endif +#ifdef CONFIG_SOUND_MAX98095 + board_enable_audio_codec(); +#endif return 0; } -- cgit v1.1 From 07f17507c4309d3ccc1fbfd912d078a9ca609aba Mon Sep 17 00:00:00 2001 From: Rajeshwari Shinde Date: Mon, 18 Feb 2013 02:51:49 +0000 Subject: SMDK5250: FDT: Retrieve board model via DT Print out the board model by parsing the device tree file. Signed-off-by: Rajeshwari Shinde Acked-by: Simon Glass Signed-off-by: Minkyu Kang --- board/samsung/smdk5250/smdk5250.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) (limited to 'board') diff --git a/board/samsung/smdk5250/smdk5250.c b/board/samsung/smdk5250/smdk5250.c index 6f6f2c2..0097b3f 100644 --- a/board/samsung/smdk5250/smdk5250.c +++ b/board/samsung/smdk5250/smdk5250.c @@ -336,8 +336,17 @@ int board_eth_init(bd_t *bis) #ifdef CONFIG_DISPLAY_BOARDINFO int checkboard(void) { - printf("\nBoard: SMDK5250\n"); +#ifdef CONFIG_OF_CONTROL + const char *board_name; + board_name = fdt_getprop(gd->fdt_blob, 0, "model", NULL); + if (board_name == NULL) + printf("\nUnknown Board\n"); + else + printf("\nBoard: %s\n", board_name); +#else + printf("\nBoard: SMDK5250\n"); +#endif return 0; } #endif -- cgit v1.1 From 618766c09855f7167f510eafa89172ae44cae543 Mon Sep 17 00:00:00 2001 From: Akshay Saraswat Date: Mon, 25 Feb 2013 01:13:01 +0000 Subject: Exynos5: FDT: Add TMU device node values Fdt entry for Exynos TMU driver specific pre-defined values used for calibration of current temperature and defining threshold values. Signed-off-by: Akshay Saraswat Acked-by: Simon Glass Signed-off-by: Minkyu Kang --- board/samsung/dts/exynos5250-smdk5250.dts | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'board') diff --git a/board/samsung/dts/exynos5250-smdk5250.dts b/board/samsung/dts/exynos5250-smdk5250.dts index cbfab6f..00dac40 100644 --- a/board/samsung/dts/exynos5250-smdk5250.dts +++ b/board/samsung/dts/exynos5250-smdk5250.dts @@ -66,4 +66,16 @@ compatible = "maxim,max77686_pmic"; }; }; + + tmu@10060000 { + samsung,min-temp = <25>; + samsung,max-temp = <125>; + samsung,start-warning = <95>; + samsung,start-tripping = <105>; + samsung,efuse-min-value = <40>; + samsung,efuse-value = <55>; + samsung,efuse-max-value = <100>; + samsung,slope = <274761730>; + samsung,dc-value = <25>; + }; }; -- cgit v1.1 From 7e30ad8bf3c6f7768158ad994b9180c6906fa5da Mon Sep 17 00:00:00 2001 From: Akshay Saraswat Date: Mon, 25 Feb 2013 01:13:02 +0000 Subject: Exynos5: TMU: Add TMU init and status check This adds call to tmu_init() and TMU boot time analysis for the SoC temperature threshold breach. Signed-off-by: Akshay Saraswat Acked-by: Simon Glass Signed-off-by: Minkyu Kang --- board/samsung/smdk5250/smdk5250.c | 39 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) (limited to 'board') diff --git a/board/samsung/smdk5250/smdk5250.c b/board/samsung/smdk5250/smdk5250.c index 0097b3f..217c6df 100644 --- a/board/samsung/smdk5250/smdk5250.c +++ b/board/samsung/smdk5250/smdk5250.c @@ -37,9 +37,39 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; +#if defined CONFIG_EXYNOS_TMU +/* + * Boot Time Thermal Analysis for SoC temperature threshold breach + */ +static void boot_temp_check(void) +{ + int temp; + + switch (tmu_monitor(&temp)) { + /* Status TRIPPED ans WARNING means corresponding threshold breach */ + case TMU_STATUS_TRIPPED: + puts("EXYNOS_TMU: TRIPPING! Device power going down ...\n"); + set_ps_hold_ctrl(); + hang(); + break; + case TMU_STATUS_WARNING: + puts("EXYNOS_TMU: WARNING! Temperature very high\n"); + break; + /* + * TMU_STATUS_INIT means something is wrong with temperature sensing + * and TMU status was changed back from NORMAL to INIT. + */ + case TMU_STATUS_INIT: + default: + debug("EXYNOS_TMU: Unknown TMU state\n"); + } +} +#endif + #ifdef CONFIG_USB_EHCI_EXYNOS int board_usb_vbus_init(void) { @@ -71,6 +101,15 @@ static void board_enable_audio_codec(void) int board_init(void) { gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL); + +#if defined CONFIG_EXYNOS_TMU + if (tmu_init(gd->fdt_blob) != TMU_STATUS_NORMAL) { + debug("%s: Failed to init TMU\n", __func__); + return -1; + } + boot_temp_check(); +#endif + #ifdef CONFIG_EXYNOS_SPI spi_init(); #endif -- cgit v1.1 From 871333fcfe3b0865f37a803e010f7b06d6e546f2 Mon Sep 17 00:00:00 2001 From: Akshay Saraswat Date: Mon, 25 Feb 2013 01:13:07 +0000 Subject: Exynos5: FDT: Add a H/W-trip member to TMU node This adds a member to TMU FDT node for providing hardware tripping temperature threshold. Signed-off-by: Akshay Saraswat Acked-by: Simon Glass Signed-off-by: Minkyu Kang --- board/samsung/dts/exynos5250-smdk5250.dts | 1 + 1 file changed, 1 insertion(+) (limited to 'board') diff --git a/board/samsung/dts/exynos5250-smdk5250.dts b/board/samsung/dts/exynos5250-smdk5250.dts index 00dac40..1c2d52d 100644 --- a/board/samsung/dts/exynos5250-smdk5250.dts +++ b/board/samsung/dts/exynos5250-smdk5250.dts @@ -72,6 +72,7 @@ samsung,max-temp = <125>; samsung,start-warning = <95>; samsung,start-tripping = <105>; + samsung,hw-tripping = <110>; samsung,efuse-min-value = <40>; samsung,efuse-value = <55>; samsung,efuse-max-value = <100>; -- cgit v1.1 From 2881e533472bffbf7cfa3afedb05b18cca574648 Mon Sep 17 00:00:00 2001 From: Rajeshwari Shinde Date: Thu, 28 Feb 2013 01:40:41 +0000 Subject: EXYNOS5: Add initial DTS file for Snow. This patch adds the DTS file for Snow Board. Signed-off-by: Rajeshwari Shinde Acked-by: Simon Glass Signed-off-by: Minkyu Kang --- board/samsung/dts/exynos5250-snow.dts | 58 +++++++++++++++++++++++++++++++++++ 1 file changed, 58 insertions(+) create mode 100644 board/samsung/dts/exynos5250-snow.dts (limited to 'board') diff --git a/board/samsung/dts/exynos5250-snow.dts b/board/samsung/dts/exynos5250-snow.dts new file mode 100644 index 0000000..8b303bf --- /dev/null +++ b/board/samsung/dts/exynos5250-snow.dts @@ -0,0 +1,58 @@ +/* + * SAMSUNG Snow board device tree source + * + * Copyright (c) 2012 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/dts-v1/; +/include/ ARCH_CPU_DTS + +/ { + model = "Google Snow"; + compatible = "google,snow", "samsung,exynos5250"; + + aliases { + i2c0 = "/i2c@12c60000"; + i2c1 = "/i2c@12c70000"; + i2c2 = "/i2c@12c80000"; + i2c3 = "/i2c@12c90000"; + i2c4 = "/i2c@12ca0000"; + i2c5 = "/i2c@12cb0000"; + i2c6 = "/i2c@12cc0000"; + i2c7 = "/i2c@12cd0000"; + spi0 = "/spi@12d20000"; + spi1 = "/spi@12d30000"; + spi2 = "/spi@12d40000"; + spi3 = "/spi@131a0000"; + spi4 = "/spi@131b0000"; + }; + + sound@12d60000 { + samsung,i2s-epll-clock-frequency = <192000000>; + samsung,i2s-sampling-rate = <48000>; + samsung,i2s-bits-per-sample = <16>; + samsung,i2s-channels = <2>; + samsung,i2s-lr-clk-framesize = <256>; + samsung,i2s-bit-clk-framesize = <32>; + samsung,codec-type = "max98095"; + }; + + i2c@12cd0000 { + soundcodec@22 { + reg = <0x22>; + compatible = "maxim,max98095-codec"; + }; + }; + + i2c@12c60000 { + pmic@9 { + reg = <0x9>; + compatible = "maxim,max77686_pmic"; + }; + }; +}; -- cgit v1.1 From 3f397782ae6c6148f7fa12bbb62f309a4f5d897c Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Tue, 29 Jan 2013 16:37:37 +0000 Subject: ARM: rpi_b: use bcm2835 mbox driver to get memory size The firmware running on the bcm2835 SoC's VideoCore CPU determines how much of the system RAM is available for use by the ARM CPU. Previously, U-Boot assumed that only 128MB was available, since this was the smallest value configured by any public firmware. However, we can now query the actual value at run-time from the firmware using the mbox property protocol. Signed-off-by: Stephen Warren --- board/raspberrypi/rpi_b/rpi_b.c | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) (limited to 'board') diff --git a/board/raspberrypi/rpi_b/rpi_b.c b/board/raspberrypi/rpi_b/rpi_b.c index 688b0aa..3c654a1 100644 --- a/board/raspberrypi/rpi_b/rpi_b.c +++ b/board/raspberrypi/rpi_b/rpi_b.c @@ -15,13 +15,32 @@ */ #include +#include #include DECLARE_GLOBAL_DATA_PTR; +struct msg_get_arm_mem { + struct bcm2835_mbox_hdr hdr; + struct bcm2835_mbox_tag_get_arm_mem get_arm_mem; + u32 end_tag; +}; + int dram_init(void) { - gd->ram_size = CONFIG_SYS_SDRAM_SIZE; + ALLOC_ALIGN_BUFFER(struct msg_get_arm_mem, msg, 1, 16); + int ret; + + BCM2835_MBOX_INIT_HDR(msg); + BCM2835_MBOX_INIT_TAG(&msg->get_arm_mem, GET_ARM_MEMORY); + + ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg->hdr); + if (ret) { + printf("bcm2835: Could not query ARM memory size\n"); + return -1; + } + + gd->ram_size = msg->get_arm_mem.body.resp.mem_size; return 0; } -- cgit v1.1 From 131a1e603b3a8438b84b41940bc6a2051a36e087 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Tue, 29 Jan 2013 16:37:42 +0000 Subject: ARM: rpi_b: enable SD controller, add related env/cmds Enable the SD controller driver for the Raspberry Pi. Enable a number of useful MMC, partition, and filesystem-related commands. Set up the environment to provide standard locations for loading a kernel, DTB, etc. Provide a boot command that loads and executes boot.scr.uimg from the SD card; this is written considering future extensibilty to USB storage. Signed-off-by: Stephen Warren --- board/raspberrypi/rpi_b/rpi_b.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) (limited to 'board') diff --git a/board/raspberrypi/rpi_b/rpi_b.c b/board/raspberrypi/rpi_b/rpi_b.c index 3c654a1..6b3e095 100644 --- a/board/raspberrypi/rpi_b/rpi_b.c +++ b/board/raspberrypi/rpi_b/rpi_b.c @@ -16,6 +16,7 @@ #include #include +#include #include DECLARE_GLOBAL_DATA_PTR; @@ -26,6 +27,12 @@ struct msg_get_arm_mem { u32 end_tag; }; +struct msg_get_clock_rate { + struct bcm2835_mbox_hdr hdr; + struct bcm2835_mbox_tag_get_clock_rate get_clock_rate; + u32 end_tag; +}; + int dram_init(void) { ALLOC_ALIGN_BUFFER(struct msg_get_arm_mem, msg, 1, 16); @@ -51,3 +58,22 @@ int board_init(void) return 0; } + +int board_mmc_init(void) +{ + ALLOC_ALIGN_BUFFER(struct msg_get_clock_rate, msg_clk, 1, 16); + int ret; + + BCM2835_MBOX_INIT_HDR(msg_clk); + BCM2835_MBOX_INIT_TAG(&msg_clk->get_clock_rate, GET_CLOCK_RATE); + msg_clk->get_clock_rate.body.req.clock_id = BCM2835_MBOX_CLOCK_ID_EMMC; + + ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg_clk->hdr); + if (ret) { + printf("bcm2835: Could not query eMMC clock rate\n"); + return -1; + } + + return bcm2835_sdhci_init(BCM2835_SDHCI_BASE, + msg_clk->get_clock_rate.body.resp.rate_hz); +} -- cgit v1.1 From f35034fe16871a156a9898ac6ed5a9987d91ea05 Mon Sep 17 00:00:00 2001 From: Nikita Kiryanov Date: Sat, 22 Dec 2012 21:03:48 +0000 Subject: cm-t35: add support for loading splash image from NAND Add support for loading splash image from NAND Signed-off-by: Nikita Kiryanov Signed-off-by: Igor Grinberg --- board/cm_t35/cm_t35.c | 61 +++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 61 insertions(+) (limited to 'board') diff --git a/board/cm_t35/cm_t35.c b/board/cm_t35/cm_t35.c index e0e8235..629ce4a 100644 --- a/board/cm_t35/cm_t35.c +++ b/board/cm_t35/cm_t35.c @@ -34,7 +34,9 @@ #include #include #include +#include #include +#include #include #include @@ -76,6 +78,65 @@ static u32 gpmc_nand_config[GPMC_MAX_REG] = { 0, }; +#ifdef CONFIG_LCD +#ifdef CONFIG_CMD_NAND +static int splash_load_from_nand(u32 bmp_load_addr) +{ + struct bmp_header *bmp_hdr; + int res, splash_screen_nand_offset = 0x100000; + size_t bmp_size, bmp_header_size = sizeof(struct bmp_header); + + if (bmp_load_addr + bmp_header_size >= gd->start_addr_sp) + goto splash_address_too_high; + + res = nand_read_skip_bad(&nand_info[nand_curr_device], + splash_screen_nand_offset, &bmp_header_size, + (u_char *)bmp_load_addr); + if (res < 0) + return res; + + bmp_hdr = (struct bmp_header *)bmp_load_addr; + bmp_size = le32_to_cpu(bmp_hdr->file_size); + + if (bmp_load_addr + bmp_size >= gd->start_addr_sp) + goto splash_address_too_high; + + return nand_read_skip_bad(&nand_info[nand_curr_device], + splash_screen_nand_offset, &bmp_size, + (u_char *)bmp_load_addr); + +splash_address_too_high: + printf("Error: splashimage address too high. Data overwrites U-Boot " + "and/or placed beyond DRAM boundaries.\n"); + + return -1; +} +#else +static inline int splash_load_from_nand(void) +{ + return -1; +} +#endif /* CONFIG_CMD_NAND */ + +int board_splash_screen_prepare(void) +{ + char *env_splashimage_value; + u32 bmp_load_addr; + + env_splashimage_value = getenv("splashimage"); + if (env_splashimage_value == NULL) + return -1; + + bmp_load_addr = simple_strtoul(env_splashimage_value, 0, 16); + if (bmp_load_addr == 0) { + printf("Error: bad splashimage address specified\n"); + return -1; + } + + return splash_load_from_nand(bmp_load_addr); +} +#endif /* CONFIG_LCD */ + /* * Routine: board_init * Description: hardware init. -- cgit v1.1 From 59dcf970d11ebff5d9f4bbbde79fda584e9e7ad4 Mon Sep 17 00:00:00 2001 From: Vaibhav Hiremath Date: Thu, 14 Mar 2013 21:11:16 +0000 Subject: am335x: Enable DDR PHY dynamic power down bit for DDR3 boards Enable DDR PHY dynamic power down bit, which enables powering down the IO receiver when not performing read. This also helps in reducing overall power consumption in low power states (suspend/standby). Signed-off-by: Vaibhav Hiremath Signed-off-by: Satyanarayana, Sandhya Cc: Tom Rini Reviewed-by: Tom Rini --- board/ti/am335x/board.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'board') diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c index f4b972b..2e230f4 100644 --- a/board/ti/am335x/board.c +++ b/board/ti/am335x/board.c @@ -251,7 +251,8 @@ static struct emif_regs ddr3_emif_reg_data = { .sdram_tim2 = MT41J128MJT125_EMIF_TIM2, .sdram_tim3 = MT41J128MJT125_EMIF_TIM3, .zq_config = MT41J128MJT125_ZQ_CFG, - .emif_ddr_phy_ctlr_1 = MT41J128MJT125_EMIF_READ_LATENCY, + .emif_ddr_phy_ctlr_1 = MT41J128MJT125_EMIF_READ_LATENCY | + PHY_EN_DYN_PWRDN, }; static struct emif_regs ddr3_evm_emif_reg_data = { @@ -261,7 +262,8 @@ static struct emif_regs ddr3_evm_emif_reg_data = { .sdram_tim2 = MT41J512M8RH125_EMIF_TIM2, .sdram_tim3 = MT41J512M8RH125_EMIF_TIM3, .zq_config = MT41J512M8RH125_ZQ_CFG, - .emif_ddr_phy_ctlr_1 = MT41J512M8RH125_EMIF_READ_LATENCY, + .emif_ddr_phy_ctlr_1 = MT41J512M8RH125_EMIF_READ_LATENCY | + PHY_EN_DYN_PWRDN, }; #endif -- cgit v1.1 From 81df2bab46d3bed319e21571c68db8e0a048bbfd Mon Sep 17 00:00:00 2001 From: Matt Porter Date: Fri, 15 Mar 2013 10:07:02 +0000 Subject: am33xx: convert defines from am33xx-specific to generic names Eliminate AM33xx specific names to prepare for TI814x support within AM33xx-land. Signed-off-by: Matt Porter Reviewed-by: Tom Rini --- board/phytec/pcm051/board.c | 6 +++--- board/ti/am335x/board.c | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) (limited to 'board') diff --git a/board/phytec/pcm051/board.c b/board/phytec/pcm051/board.c index 55bc018..471725a 100644 --- a/board/phytec/pcm051/board.c +++ b/board/phytec/pcm051/board.c @@ -61,7 +61,7 @@ static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE; static void rtc32k_enable(void) { - struct rtc_regs *rtc = (struct rtc_regs *)AM335X_RTC_BASE; + struct rtc_regs *rtc = (struct rtc_regs *)RTC_BASE; /* * Unlock the RTC's registers. For more details please see the @@ -199,8 +199,8 @@ static struct cpsw_slave_data cpsw_slaves[] = { }; static struct cpsw_platform_data cpsw_data = { - .mdio_base = AM335X_CPSW_MDIO_BASE, - .cpsw_base = AM335X_CPSW_BASE, + .mdio_base = CPSW_MDIO_BASE, + .cpsw_base = CPSW_BASE, .mdio_div = 0xff, .channels = 8, .cpdma_reg_ofs = 0x800, diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c index 2e230f4..758ba15 100644 --- a/board/ti/am335x/board.c +++ b/board/ti/am335x/board.c @@ -134,7 +134,7 @@ static int read_eeprom(void) static void rtc32k_enable(void) { - struct rtc_regs *rtc = (struct rtc_regs *)AM335X_RTC_BASE; + struct rtc_regs *rtc = (struct rtc_regs *)RTC_BASE; /* * Unlock the RTC's registers. For more details please see the @@ -414,8 +414,8 @@ static struct cpsw_slave_data cpsw_slaves[] = { }; static struct cpsw_platform_data cpsw_data = { - .mdio_base = AM335X_CPSW_MDIO_BASE, - .cpsw_base = AM335X_CPSW_BASE, + .mdio_base = CPSW_MDIO_BASE, + .cpsw_base = CPSW_BASE, .mdio_div = 0xff, .channels = 8, .cpdma_reg_ofs = 0x800, -- cgit v1.1 From 3ba65f97cbedb39fb486f42f8daa9b9e0d36705a Mon Sep 17 00:00:00 2001 From: Matt Porter Date: Fri, 15 Mar 2013 10:07:03 +0000 Subject: am33xx: refactor emif4/ddr to support multiple EMIF instances The AM33xx emif4/ddr support closely matches what is need to support TI814x except that TI814x has two EMIF instances. Refactor all the emif4 helper calls and the config_ddr() init function to use an additional instance number argument. Signed-off-by: Matt Porter Reviewed-by: Tom Rini --- board/phytec/pcm051/board.c | 2 +- board/ti/am335x/board.c | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-) (limited to 'board') diff --git a/board/phytec/pcm051/board.c b/board/phytec/pcm051/board.c index 471725a..1708ac2 100644 --- a/board/phytec/pcm051/board.c +++ b/board/phytec/pcm051/board.c @@ -159,7 +159,7 @@ void s_init(void) enable_board_pin_mux(); config_ddr(DDR_CLK_MHZ, MT41J256M8HX15E_IOCTRL_VALUE, &ddr3_data, - &ddr3_cmd_ctrl_data, &ddr3_emif_reg_data); + &ddr3_cmd_ctrl_data, &ddr3_emif_reg_data, 0); #endif } diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c index 758ba15..d61d650 100644 --- a/board/ti/am335x/board.c +++ b/board/ti/am335x/board.c @@ -345,13 +345,13 @@ void s_init(void) if (board_is_evm_sk() || board_is_bone_lt()) config_ddr(303, MT41J128MJT125_IOCTRL_VALUE, &ddr3_data, - &ddr3_cmd_ctrl_data, &ddr3_emif_reg_data); + &ddr3_cmd_ctrl_data, &ddr3_emif_reg_data, 0); else if (board_is_evm_15_or_later()) config_ddr(303, MT41J512M8RH125_IOCTRL_VALUE, &ddr3_evm_data, - &ddr3_evm_cmd_ctrl_data, &ddr3_evm_emif_reg_data); + &ddr3_evm_cmd_ctrl_data, &ddr3_evm_emif_reg_data, 0); else config_ddr(266, MT47H128M16RT25E_IOCTRL_VALUE, &ddr2_data, - &ddr2_cmd_ctrl_data, &ddr2_emif_reg_data); + &ddr2_cmd_ctrl_data, &ddr2_emif_reg_data, 0); #endif } -- cgit v1.1 From ea7b96b6aa06fea40547333e8796f8ea9a856d67 Mon Sep 17 00:00:00 2001 From: Matt Porter Date: Fri, 15 Mar 2013 10:07:10 +0000 Subject: ti814x_evm: add ti814x evm board support Add TI814X EVM board directory, config file, and MAINTAINERS entry. Enable build. Signed-off-by: Matt Porter Reviewed-by: Tom Rini [trini: Adapt to recent omap_hsmmc requirements, Matt re-tested] Signed-off-by: Tom Rini --- board/ti/ti814x/Makefile | 46 +++++++++++ board/ti/ti814x/evm.c | 198 +++++++++++++++++++++++++++++++++++++++++++++++ board/ti/ti814x/evm.h | 7 ++ board/ti/ti814x/mux.c | 51 ++++++++++++ 4 files changed, 302 insertions(+) create mode 100644 board/ti/ti814x/Makefile create mode 100644 board/ti/ti814x/evm.c create mode 100644 board/ti/ti814x/evm.h create mode 100644 board/ti/ti814x/mux.c (limited to 'board') diff --git a/board/ti/ti814x/Makefile b/board/ti/ti814x/Makefile new file mode 100644 index 0000000..09d2422 --- /dev/null +++ b/board/ti/ti814x/Makefile @@ -0,0 +1,46 @@ +# +# Makefile +# +# Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed "as is" WITHOUT ANY WARRANTY of any +# kind, whether express or implied; without even the implied warranty +# of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).o + +ifdef CONFIG_SPL_BUILD +COBJS := mux.o +endif + +COBJS += evm.o +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/ti/ti814x/evm.c b/board/ti/ti814x/evm.c new file mode 100644 index 0000000..446e36b --- /dev/null +++ b/board/ti/ti814x/evm.c @@ -0,0 +1,198 @@ +/* + * evm.c + * + * Board functions for TI814x EVM + * + * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "evm.h" + +DECLARE_GLOBAL_DATA_PTR; + +#ifdef CONFIG_SPL_BUILD +static struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE; +static struct uart_sys *uart_base = (struct uart_sys *)DEFAULT_UART_BASE; +#endif + +/* UART Defines */ +#ifdef CONFIG_SPL_BUILD +#define UART_RESET (0x1 << 1) +#define UART_CLK_RUNNING_MASK 0x1 +#define UART_SMART_IDLE_EN (0x1 << 0x3) + +static void rtc32k_enable(void) +{ + struct rtc_regs *rtc = (struct rtc_regs *)RTC_BASE; + + /* + * Unlock the RTC's registers. For more details please see the + * RTC_SS section of the TRM. In order to unlock we need to + * write these specific values (keys) in this order. + */ + writel(0x83e70b13, &rtc->kick0r); + writel(0x95a4f1e0, &rtc->kick1r); + + /* Enable the RTC 32K OSC by setting bits 3 and 6. */ + writel((1 << 3) | (1 << 6), &rtc->osc); +} + +static void uart_enable(void) +{ + u32 regVal; + + /* UART softreset */ + regVal = readl(&uart_base->uartsyscfg); + regVal |= UART_RESET; + writel(regVal, &uart_base->uartsyscfg); + while ((readl(&uart_base->uartsyssts) & + UART_CLK_RUNNING_MASK) != UART_CLK_RUNNING_MASK) + ; + + /* Disable smart idle */ + regVal = readl(&uart_base->uartsyscfg); + regVal |= UART_SMART_IDLE_EN; + writel(regVal, &uart_base->uartsyscfg); +} + +static void wdt_disable(void) +{ + writel(0xAAAA, &wdtimer->wdtwspr); + while (readl(&wdtimer->wdtwwps) != 0x0) + ; + writel(0x5555, &wdtimer->wdtwspr); + while (readl(&wdtimer->wdtwwps) != 0x0) + ; +} + +static const struct cmd_control evm_ddr2_cctrl_data = { + .cmd0csratio = 0x80, + .cmd0dldiff = 0x04, + .cmd0iclkout = 0x00, + + .cmd1csratio = 0x80, + .cmd1dldiff = 0x04, + .cmd1iclkout = 0x00, + + .cmd2csratio = 0x80, + .cmd2dldiff = 0x04, + .cmd2iclkout = 0x00, +}; + +static const struct emif_regs evm_ddr2_emif0_regs = { + .sdram_config = 0x40801ab2, + .ref_ctrl = 0x10000c30, + .sdram_tim1 = 0x0aaaf552, + .sdram_tim2 = 0x043631d2, + .sdram_tim3 = 0x00000327, + .emif_ddr_phy_ctlr_1 = 0x00000007 +}; + +static const struct emif_regs evm_ddr2_emif1_regs = { + .sdram_config = 0x40801ab2, + .ref_ctrl = 0x10000c30, + .sdram_tim1 = 0x0aaaf552, + .sdram_tim2 = 0x043631d2, + .sdram_tim3 = 0x00000327, + .emif_ddr_phy_ctlr_1 = 0x00000007 +}; + +const struct dmm_lisa_map_regs evm_lisa_map_regs = { + .dmm_lisa_map_0 = 0x00000000, + .dmm_lisa_map_1 = 0x00000000, + .dmm_lisa_map_2 = 0x806c0300, + .dmm_lisa_map_3 = 0x806c0300, +}; + +static const struct ddr_data evm_ddr2_data = { + .datardsratio0 = ((0x35<<10) | (0x35<<0)), + .datawdsratio0 = ((0x20<<10) | (0x20<<0)), + .datawiratio0 = ((0<<10) | (0<<0)), + .datagiratio0 = ((0<<10) | (0<<0)), + .datafwsratio0 = ((0x90<<10) | (0x90<<0)), + .datawrsratio0 = ((0x50<<10) | (0x50<<0)), + .datauserank0delay = 1, + .datadldiff0 = 0x4, +}; +#endif + +/* + * early system init of muxing and clocks. + */ +void s_init(void) +{ +#ifdef CONFIG_SPL_BUILD + /* WDT1 is already running when the bootloader gets control + * Disable it to avoid "random" resets + */ + wdt_disable(); + + /* Setup the PLLs and the clocks for the peripherals */ + pll_init(); + + /* Enable RTC32K clock */ + rtc32k_enable(); + + /* Set UART pins */ + enable_uart0_pin_mux(); + + /* Set MMC pins */ + enable_mmc1_pin_mux(); + + /* Enable UART */ + uart_enable(); + + gd = &gdata; + + preloader_console_init(); + + config_dmm(&evm_lisa_map_regs); + + config_ddr(0, 0, &evm_ddr2_data, &evm_ddr2_cctrl_data, + &evm_ddr2_emif0_regs, 0); + config_ddr(0, 0, &evm_ddr2_data, &evm_ddr2_cctrl_data, + &evm_ddr2_emif1_regs, 1); +#endif +} + +/* + * Basic board specific setup. Pinmux has been handled already. + */ +int board_init(void) +{ + gd->bd->bi_boot_params = PHYS_DRAM_1 + 0x100; + return 0; +} + +#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_GENERIC_MMC) +int board_mmc_init(bd_t *bis) +{ + omap_mmc_init(1, 0, 0, -1, -1); + + return 0; +} +#endif diff --git a/board/ti/ti814x/evm.h b/board/ti/ti814x/evm.h new file mode 100644 index 0000000..40f8710 --- /dev/null +++ b/board/ti/ti814x/evm.h @@ -0,0 +1,7 @@ +#ifndef _EVM_H +#define _EVM_H + +void enable_uart0_pin_mux(void); +void enable_mmc1_pin_mux(void); + +#endif /* _EVM_H */ diff --git a/board/ti/ti814x/mux.c b/board/ti/ti814x/mux.c new file mode 100644 index 0000000..137acb4 --- /dev/null +++ b/board/ti/ti814x/mux.c @@ -0,0 +1,51 @@ +/* + * mux.c + * + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include "evm.h" + +static struct module_pin_mux uart0_pin_mux[] = { + {OFFSET(pincntl70), PULLUP_EN | MODE(0x01)}, /* UART0_RXD */ + {OFFSET(pincntl71), PULLUP_EN | MODE(0x01)}, /* UART0_TXD */ + {-1}, +}; + +static struct module_pin_mux mmc1_pin_mux[] = { + {OFFSET(pincntl1), PULLUP_EN | MODE(0x01)}, /* SD1_CLK */ + {OFFSET(pincntl2), PULLUP_EN | MODE(0x01)}, /* SD1_CMD */ + {OFFSET(pincntl3), PULLUP_EN | MODE(0x01)}, /* SD1_DAT[0] */ + {OFFSET(pincntl4), PULLUP_EN | MODE(0x01)}, /* SD1_DAT[1] */ + {OFFSET(pincntl5), PULLUP_EN | MODE(0x01)}, /* SD1_DAT[2] */ + {OFFSET(pincntl6), PULLUP_EN | MODE(0x01)}, /* SD1_DAT[3] */ + {OFFSET(pincntl74), PULLUP_EN | MODE(0x40)}, /* SD1_POW */ + {OFFSET(pincntl75), MODE(0x40)}, /* SD1_SDWP */ + {OFFSET(pincntl80), PULLUP_EN | MODE(0x02)}, /* SD1_SDCD */ + {-1}, +}; + +void enable_uart0_pin_mux(void) +{ + configure_module_pin_mux(uart0_pin_mux); +} + +void enable_mmc1_pin_mux(void) +{ + configure_module_pin_mux(mmc1_pin_mux); +} -- cgit v1.1 From c7ba18ad4b52d35b0166eeecbe05a0e1560e00ec Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Thu, 21 Mar 2013 04:30:02 +0000 Subject: am335x_evm: Add better timings for the new BeagleBoard DDR3 part Tested-by: Rao Bodapati Signed-off-by: Tom Rini --- board/ti/am335x/board.c | 39 ++++++++++++++++++++++++++++++++++++++- 1 file changed, 38 insertions(+), 1 deletion(-) (limited to 'board') diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c index d61d650..12620bb 100644 --- a/board/ti/am335x/board.c +++ b/board/ti/am335x/board.c @@ -208,6 +208,14 @@ static const struct ddr_data ddr3_data = { .datadldiff0 = PHY_DLL_LOCK_DIFF, }; +static const struct ddr_data ddr3_beagleblack_data = { + .datardsratio0 = MT41K256M16HA125E_RD_DQS, + .datawdsratio0 = MT41K256M16HA125E_WR_DQS, + .datafwsratio0 = MT41K256M16HA125E_PHY_FIFO_WE, + .datawrsratio0 = MT41K256M16HA125E_PHY_WR_DATA, + .datadldiff0 = PHY_DLL_LOCK_DIFF, +}; + static const struct ddr_data ddr3_evm_data = { .datardsratio0 = MT41J512M8RH125_RD_DQS, .datawdsratio0 = MT41J512M8RH125_WR_DQS, @@ -230,6 +238,20 @@ static const struct cmd_control ddr3_cmd_ctrl_data = { .cmd2iclkout = MT41J128MJT125_INVERT_CLKOUT, }; +static const struct cmd_control ddr3_beagleblack_cmd_ctrl_data = { + .cmd0csratio = MT41K256M16HA125E_RATIO, + .cmd0dldiff = MT41K256M16HA125E_DLL_LOCK_DIFF, + .cmd0iclkout = MT41K256M16HA125E_INVERT_CLKOUT, + + .cmd1csratio = MT41K256M16HA125E_RATIO, + .cmd1dldiff = MT41K256M16HA125E_DLL_LOCK_DIFF, + .cmd1iclkout = MT41K256M16HA125E_INVERT_CLKOUT, + + .cmd2csratio = MT41K256M16HA125E_RATIO, + .cmd2dldiff = MT41K256M16HA125E_DLL_LOCK_DIFF, + .cmd2iclkout = MT41K256M16HA125E_INVERT_CLKOUT, +}; + static const struct cmd_control ddr3_evm_cmd_ctrl_data = { .cmd0csratio = MT41J512M8RH125_RATIO, .cmd0dldiff = MT41J512M8RH125_DLL_LOCK_DIFF, @@ -255,6 +277,16 @@ static struct emif_regs ddr3_emif_reg_data = { PHY_EN_DYN_PWRDN, }; +static struct emif_regs ddr3_beagleblack_emif_reg_data = { + .sdram_config = MT41K256M16HA125E_EMIF_SDCFG, + .ref_ctrl = MT41K256M16HA125E_EMIF_SDREF, + .sdram_tim1 = MT41K256M16HA125E_EMIF_TIM1, + .sdram_tim2 = MT41K256M16HA125E_EMIF_TIM2, + .sdram_tim3 = MT41K256M16HA125E_EMIF_TIM3, + .zq_config = MT41K256M16HA125E_ZQ_CFG, + .emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY, +}; + static struct emif_regs ddr3_evm_emif_reg_data = { .sdram_config = MT41J512M8RH125_EMIF_SDCFG, .ref_ctrl = MT41J512M8RH125_EMIF_SDREF, @@ -343,9 +375,14 @@ void s_init(void) gpio_direction_output(GPIO_DDR_VTT_EN, 1); } - if (board_is_evm_sk() || board_is_bone_lt()) + if (board_is_evm_sk()) config_ddr(303, MT41J128MJT125_IOCTRL_VALUE, &ddr3_data, &ddr3_cmd_ctrl_data, &ddr3_emif_reg_data, 0); + else if (board_is_bone_lt()) + config_ddr(303, MT41K256M16HA125E_IOCTRL_VALUE, + &ddr3_beagleblack_data, + &ddr3_beagleblack_cmd_ctrl_data, + &ddr3_beagleblack_emif_reg_data, 0); else if (board_is_evm_15_or_later()) config_ddr(303, MT41J512M8RH125_IOCTRL_VALUE, &ddr3_evm_data, &ddr3_evm_cmd_ctrl_data, &ddr3_evm_emif_reg_data, 0); -- cgit v1.1 From 9000652da0893af8a07f81622b3ef8de6c8725bb Mon Sep 17 00:00:00 2001 From: Allen Martin Date: Sat, 16 Mar 2013 18:58:02 +0000 Subject: tegra: remove support for UART SPI switch This feature was only used for tegra20 seaboard that had a pinmux conflict on the SPI pins. These boards were never manufactured, so remove this support to clean up SPI driver. Signed-off-by: Allen Martin Signed-off-by: Tom Warren Reviewed-by: Stephen Warren --- board/nvidia/common/board.c | 3 - board/nvidia/common/common.mk | 1 - board/nvidia/common/uart-spi-switch.c | 125 ---------------------------------- board/nvidia/seaboard/seaboard.c | 2 +- 4 files changed, 1 insertion(+), 130 deletions(-) delete mode 100644 board/nvidia/common/uart-spi-switch.c (limited to 'board') diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c index 7d9f361..b6e6566 100644 --- a/board/nvidia/common/board.c +++ b/board/nvidia/common/board.c @@ -132,9 +132,6 @@ int board_init(void) clock_init(); clock_verify(); -#ifdef CONFIG_SPI_UART_SWITCH - gpio_config_uart(); -#endif #if defined(CONFIG_TEGRA_SPI) || defined(CONFIG_TEGRA_SLINK) pin_mux_spi(); spi_init(); diff --git a/board/nvidia/common/common.mk b/board/nvidia/common/common.mk index bd6202c..d9bcb85 100644 --- a/board/nvidia/common/common.mk +++ b/board/nvidia/common/common.mk @@ -1,4 +1,3 @@ # common options for all tegra boards COBJS-y += ../../nvidia/common/board.o -COBJS-$(CONFIG_SPI_UART_SWITCH) += ../../nvidia/common/uart-spi-switch.o COBJS-$(CONFIG_TEGRA_CLOCK_SCALING) += ../../nvidia/common/emc.o diff --git a/board/nvidia/common/uart-spi-switch.c b/board/nvidia/common/uart-spi-switch.c deleted file mode 100644 index e9d445d..0000000 --- a/board/nvidia/common/uart-spi-switch.c +++ /dev/null @@ -1,125 +0,0 @@ -/* - * Copyright (c) 2011 The Chromium OS Authors. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include -#include -#include -#include -#include -#include - -/* position of the UART/SPI select switch */ -enum spi_uart_switch { - SWITCH_UNKNOWN, - SWITCH_SPI, - SWITCH_UART, - SWITCH_BOTH -}; - -/* Information about the spi/uart switch */ -struct spi_uart { - int gpio; /* GPIO to control switch */ - u32 port; /* Port number of UART affected */ -}; - -static struct spi_uart local; -static enum spi_uart_switch switch_pos; /* Current switch position */ - - -static void get_config(struct spi_uart *config) -{ -#if defined CONFIG_SPI_CORRUPTS_UART - config->gpio = CONFIG_UART_DISABLE_GPIO; - config->port = CONFIG_SPI_CORRUPTS_UART_NR; -#else - config->gpio = -1; -#endif -} - -/* - * Init the UART / SPI switch. This can be called before relocation so we must - * not access BSS. - */ -void gpio_early_init_uart(void) -{ - struct spi_uart config; - - get_config(&config); - if (config.gpio != -1) { - /* Cannot provide a label prior to relocation */ - gpio_request(config.gpio, NULL); - gpio_direction_output(config.gpio, 0); - } -} - -/* - * Configure the UART / SPI switch. - */ -void gpio_config_uart(void) -{ - get_config(&local); - if (local.gpio != -1) { - gpio_direction_output(local.gpio, 0); - switch_pos = SWITCH_UART; - } else { - /* - * If we're here we don't have a SPI switch; go ahead and - * enable the SPI now. We didn't in spi_init() so we wouldn't - * kill the UART. - */ - pinmux_set_func(PINGRP_GMC, PMUX_FUNC_SFLASH); - switch_pos = SWITCH_BOTH; - } -} - -static void spi_uart_switch(struct spi_uart *config, - enum spi_uart_switch new_pos) -{ - if (switch_pos == SWITCH_BOTH || new_pos == switch_pos) - return; - - /* pre-delay, allow SPI/UART to settle, FIFO to empty, etc. */ - udelay(CONFIG_SPI_CORRUPTS_UART_DLY); - - /* We need to dynamically change the pinmux, shared w/UART RXD/CTS */ - pinmux_set_func(PINGRP_GMC, new_pos == SWITCH_SPI ? - PMUX_FUNC_SFLASH : PMUX_FUNC_UARTD); - - /* - * On Seaboard, MOSI/MISO are shared w/UART. - * Use GPIO I3 (UART_DISABLE) to tristate UART during SPI activity. - * Enable UART later (cs_deactivate) so we can use it for U-Boot comms. - */ - gpio_direction_output(config->gpio, new_pos == SWITCH_SPI); - switch_pos = new_pos; -} - -void pinmux_select_uart(void) -{ - spi_uart_switch(&local, SWITCH_UART); -} - -void pinmux_select_spi(void) -{ - spi_uart_switch(&local, SWITCH_SPI); -} diff --git a/board/nvidia/seaboard/seaboard.c b/board/nvidia/seaboard/seaboard.c index e581fdd..498e513 100644 --- a/board/nvidia/seaboard/seaboard.c +++ b/board/nvidia/seaboard/seaboard.c @@ -31,7 +31,7 @@ #include /* TODO: Remove this code when the SPI switch is working */ -#if !defined(CONFIG_SPI_UART_SWITCH) && (CONFIG_MACH_TYPE != MACH_TYPE_VENTANA) +#if (CONFIG_MACH_TYPE != MACH_TYPE_VENTANA) void gpio_early_init_uart(void) { /* Enable UART via GPIO_PI3 (port 8, bit 3) so serial console works */ -- cgit v1.1 From ff1da6fb5fe50ac15dd988e81a782a4599102424 Mon Sep 17 00:00:00 2001 From: Allen Martin Date: Sat, 16 Mar 2013 18:58:03 +0000 Subject: tegra: spi: rename tegra SPI drivers Rename tegra SPI drivers to tegra20_flash and tegra20_slink in preparation for commonization and addition of tegra114_spi. Signed-off-by: Allen Martin Signed-off-by: Tom Warren Reviewed-by: Stephen Warren --- board/nvidia/common/board.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'board') diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c index b6e6566..87a418b 100644 --- a/board/nvidia/common/board.c +++ b/board/nvidia/common/board.c @@ -132,7 +132,7 @@ int board_init(void) clock_init(); clock_verify(); -#if defined(CONFIG_TEGRA_SPI) || defined(CONFIG_TEGRA_SLINK) +#if defined(CONFIG_TEGRA20_SFLASH) || defined(CONFIG_TEGRA20_SLINK) pin_mux_spi(); spi_init(); #endif -- cgit v1.1 From 78f47b7353ebe1f243203dcc1ce0a2a374c08a40 Mon Sep 17 00:00:00 2001 From: Allen Martin Date: Sat, 16 Mar 2013 18:58:07 +0000 Subject: spi: add common fdt SPI driver interface Add a common interface to fdt based SPI drivers. Each driver is represented by a table entry in fdt_spi_drivers[]. If there are multiple SPI drivers in the table, the first driver to return success from spi_init() will be registered as the SPI driver. Signed-off-by: Allen Martin Signed-off-by: Tom Warren Reviewed-by: Stephen Warren --- board/nvidia/common/board.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'board') diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c index 87a418b..8d7a227 100644 --- a/board/nvidia/common/board.c +++ b/board/nvidia/common/board.c @@ -132,7 +132,7 @@ int board_init(void) clock_init(); clock_verify(); -#if defined(CONFIG_TEGRA20_SFLASH) || defined(CONFIG_TEGRA20_SLINK) +#ifdef CONFIG_FDT_SPI pin_mux_spi(); spi_init(); #endif -- cgit v1.1 From af77fdb2ce7184104c6eb5a7b981def549c771e0 Mon Sep 17 00:00:00 2001 From: Allen Martin Date: Sat, 16 Mar 2013 18:58:12 +0000 Subject: tegra114: dalmore: fdt: enable dalmore SPI controller Dalmore has a SPI flash part attached to controller 4, so enable controller 4 and set to 25MHz. Signed-off-by: Allen Martin Signed-off-by: Tom Warren Reviewed-by: Stephen Warren --- board/nvidia/dts/tegra114-dalmore.dts | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'board') diff --git a/board/nvidia/dts/tegra114-dalmore.dts b/board/nvidia/dts/tegra114-dalmore.dts index 30cf1fb..87cb0ba 100644 --- a/board/nvidia/dts/tegra114-dalmore.dts +++ b/board/nvidia/dts/tegra114-dalmore.dts @@ -43,4 +43,9 @@ status = "okay"; clock-frequency = <400000>; }; + + spi@7000da00 { + status = "okay"; + spi-max-frequency = <25000000>; + }; }; -- cgit v1.1 From e9cd20654c1ce3112cac0f369640a74f694618a3 Mon Sep 17 00:00:00 2001 From: Tom Warren Date: Mon, 18 Mar 2013 14:46:46 -0700 Subject: Tegra114: fdt: Add SDMMC (sdhci) nodes for T114 boards (Dalmore for now) Took these values directly from the kernel dts files. Signed-off-by: Tom Warren Reviewed-by: Stephen Warren --- board/nvidia/dts/tegra114-dalmore.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'board') diff --git a/board/nvidia/dts/tegra114-dalmore.dts b/board/nvidia/dts/tegra114-dalmore.dts index 87cb0ba..86e9459 100644 --- a/board/nvidia/dts/tegra114-dalmore.dts +++ b/board/nvidia/dts/tegra114-dalmore.dts @@ -12,6 +12,8 @@ i2c2 = "/i2c@7000c400"; i2c3 = "/i2c@7000c500"; i2c4 = "/i2c@7000c700"; + sdhci0 = "/sdhci@78000600"; + sdhci1 = "/sdhci@78000400"; }; memory { @@ -48,4 +50,15 @@ status = "okay"; spi-max-frequency = <25000000>; }; + + sdhci@78000400 { + cd-gpios = <&gpio 170 1>; /* gpio PV2 */ + bus-width = <4>; + status = "okay"; + }; + + sdhci@78000600 { + bus-width = <8>; + status = "okay"; + }; }; -- cgit v1.1 From 2a04a317911a550e55c2943d59063b621ea5f4ee Mon Sep 17 00:00:00 2001 From: Tom Warren Date: Mon, 18 Mar 2013 14:47:55 -0700 Subject: Tegra114: Dalmore: Add SDIO3 pad config to pinctrl_config table SDIO1 (the SD-card slot on Dalmore) needs to have its pads setup before the MMC driver is added. Signed-off-by: Tom Warren Reviewed-by: Stephen Warren --- board/nvidia/dalmore/dalmore.c | 4 ++++ board/nvidia/dalmore/pinmux-config-dalmore.h | 6 ++++++ 2 files changed, 10 insertions(+) (limited to 'board') diff --git a/board/nvidia/dalmore/dalmore.c b/board/nvidia/dalmore/dalmore.c index 2020a5f..7449b5b 100644 --- a/board/nvidia/dalmore/dalmore.c +++ b/board/nvidia/dalmore/dalmore.c @@ -16,6 +16,7 @@ #include #include +#include #include "pinmux-config-dalmore.h" /* @@ -32,4 +33,7 @@ void pinmux_init(void) pinmux_config_table(unused_pins_lowpower, ARRAY_SIZE(unused_pins_lowpower)); + + /* Initialize any non-default pad configs (APB_MISC_GP regs) */ + padgrp_config_table(dalmore_padctrl, ARRAY_SIZE(dalmore_padctrl)); } diff --git a/board/nvidia/dalmore/pinmux-config-dalmore.h b/board/nvidia/dalmore/pinmux-config-dalmore.h index 3ef6f4e..8c05a15 100644 --- a/board/nvidia/dalmore/pinmux-config-dalmore.h +++ b/board/nvidia/dalmore/pinmux-config-dalmore.h @@ -361,4 +361,10 @@ static struct pingroup_config tegra114_pinmux_set_nontristate[] = { DEFAULT_PINMUX(SDMMC3_CD_N, SDMMC3, UP, NORMAL, INPUT), }; + +static struct padctrl_config dalmore_padctrl[] = { + /* (_padgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */ + DEFAULT_PADCFG(SDIO3, SDIOCFG_DRVUP_SLWF, SDIOCFG_DRVDN_SLWR, \ + SDIOCFG_DRVUP, SDIOCFG_DRVDN, NONE, NONE, NONE), +}; #endif /* PINMUX_CONFIG_COMMON_H */ -- cgit v1.1 From 6d9ea159e4900dc6bc4b38a064fc87cba4582c09 Mon Sep 17 00:00:00 2001 From: Tom Warren Date: Mon, 18 Mar 2013 14:51:20 -0700 Subject: Tegra114: MMC: Add SD bus power-rail init routine T114 requires SD bus power-rail bringup for the SDIO card on SDMMC3. Signed-off-by: Tom Warren Reviewed-by: Stephen Warren --- board/nvidia/dalmore/dalmore.c | 62 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 62 insertions(+) (limited to 'board') diff --git a/board/nvidia/dalmore/dalmore.c b/board/nvidia/dalmore/dalmore.c index 7449b5b..2c23a29 100644 --- a/board/nvidia/dalmore/dalmore.c +++ b/board/nvidia/dalmore/dalmore.c @@ -18,6 +18,10 @@ #include #include #include "pinmux-config-dalmore.h" +#include + +#define BAT_I2C_ADDRESS 0x48 /* TPS65090 charger */ +#define PMU_I2C_ADDRESS 0x58 /* TPS65913 PMU */ /* * Routine: pinmux_init @@ -37,3 +41,61 @@ void pinmux_init(void) /* Initialize any non-default pad configs (APB_MISC_GP regs) */ padgrp_config_table(dalmore_padctrl, ARRAY_SIZE(dalmore_padctrl)); } + +#if defined(CONFIG_TEGRA_MMC) +/* + * Do I2C/PMU writes to bring up SD card bus power + * + */ +void board_sdmmc_voltage_init(void) +{ + uchar reg, data_buffer[1]; + int ret; + + ret = i2c_set_bus_num(0);/* PMU is on bus 0 */ + if (ret) + printf("%s: i2c_set_bus_num returned %d\n", __func__, ret); + + /* TPS65913: LDO9_VOLTAGE = 3.3V */ + data_buffer[0] = 0x31; + reg = 0x61; + + ret = i2c_write(PMU_I2C_ADDRESS, reg, 1, data_buffer, 1); + if (ret) + printf("%s: PMU i2c_write %02X<-%02X returned %d\n", + __func__, reg, data_buffer[0], ret); + + /* TPS65913: LDO9_CTRL = Active */ + data_buffer[0] = 0x01; + reg = 0x60; + + ret = i2c_write(PMU_I2C_ADDRESS, reg, 1, data_buffer, 1); + if (ret) + printf("%s: PMU i2c_write %02X<-%02X returned %d\n", + __func__, reg, data_buffer[0], ret); + + /* TPS65090: FET6_CTRL = enable output auto discharge, enable FET6 */ + data_buffer[0] = 0x03; + reg = 0x14; + + ret = i2c_write(BAT_I2C_ADDRESS, reg, 1, data_buffer, 1); + if (ret) + printf("%s: BAT i2c_write %02X<-%02X returned %d\n", + __func__, reg, data_buffer[0], ret); +} + +/* + * Routine: pin_mux_mmc + * Description: setup the MMC muxes, power rails, etc. + */ +void pin_mux_mmc(void) +{ + /* + * NOTE: We don't do mmc-specific pin muxes here. + * They were done globally in pinmux_init(). + */ + + /* Bring up the SDIO3 power rail */ + board_sdmmc_voltage_init(); +} +#endif /* MMC */ -- cgit v1.1