From 53677ef18e25c97ac613349087c5cb33ae5a2741 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Tue, 20 May 2008 16:00:29 +0200 Subject: Big white-space cleanup. This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk --- board/trab/lowlevel_init.S | 2 +- board/trab/memory.c | 2 +- board/trab/trab.c | 12 +++--- board/trab/tsc2000.h | 93 +++++++++++++++++++++++----------------------- board/trab/vfd.c | 8 ++-- 5 files changed, 58 insertions(+), 59 deletions(-) (limited to 'board/trab') diff --git a/board/trab/lowlevel_init.S b/board/trab/lowlevel_init.S index 128ae7e..bc7142a 100644 --- a/board/trab/lowlevel_init.S +++ b/board/trab/lowlevel_init.S @@ -128,7 +128,7 @@ #define TREFMD 0x0 /* CBR(CAS before RAS)/auto refresh */ #define Trp 0x0 /* 2 clk */ #define Trc 0x3 /* 7 clk */ -#define Tchr 0x2 /* 3 clk */ +#define Tchr 0x2 /* 3 clk */ #ifdef CONFIG_TRAB_50MHZ #define REFCNT 1269 /* period=15.6 us, HCLK=50Mhz, (2048+1-15.6*50) */ diff --git a/board/trab/memory.c b/board/trab/memory.c index 58bd995..8614be7 100644 --- a/board/trab/memory.c +++ b/board/trab/memory.c @@ -282,7 +282,7 @@ static int memory_post_addrline(ulong *testaddr, ulong *base, ulong size) #endif if(readback == *testaddr) { printf ("Memory (address line) error at %08lx<->%08lx, " - "XOR value %08lx !\n", + "XOR value %08lx !\n", (ulong)testaddr, (ulong)target, xor); ret = -1; diff --git a/board/trab/trab.c b/board/trab/trab.c index d8a726b..b869023 100644 --- a/board/trab/trab.c +++ b/board/trab/trab.c @@ -89,7 +89,7 @@ int board_init () gpio->PBCON = 0xaaaaaaaa; gpio->PBUP = 0xffff; /* INPUT nCTS0 nRTS0 TXD[1] TXD[0] RXD[1] RXD[0] */ - /* 00, 10, 10, 10, 10, 10, 10 */ + /* 00, 10, 10, 10, 10, 10, 10 */ gpio->PFCON = (2<<0) | (2<<2) | (2<<4) | (2<<6) | (2<<8) | (2<<10); #ifdef CONFIG_HWFLOW /* do not pull up RXD0, RXD1, TXD0, TXD1, CTS0, RTS0 */ @@ -130,7 +130,7 @@ int board_init () #ifdef CONFIG_DRIVER_S3C24X0_I2C /* Configure I/O ports PG5 und PG6 for I2C */ - gpio->PGCON = (gpio->PGCON & 0x003c00) | 0x003c00; + gpio->PGCON = (gpio->PGCON & 0x003c00) | 0x003c00; #endif /* CONFIG_DRIVER_S3C24X0_I2C */ return 0; @@ -321,9 +321,9 @@ int do_kbd (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) } U_BOOT_CMD( - kbd, 1, 1, do_kbd, - "kbd - read keyboard status\n", - NULL + kbd, 1, 1, do_kbd, + "kbd - read keyboard status\n", + NULL ); #ifdef CONFIG_MODEM_SUPPORT @@ -356,7 +356,7 @@ static void spi_init(void) int i; /* Configure I/O ports. */ - gpio->PDCON = (gpio->PDCON & 0xF3FFFF) | 0x040000; + gpio->PDCON = (gpio->PDCON & 0xF3FFFF) | 0x040000; gpio->PGCON = (gpio->PGCON & 0x0F3FFF) | 0x008000; gpio->PGCON = (gpio->PGCON & 0x0CFFFF) | 0x020000; gpio->PGCON = (gpio->PGCON & 0x03FFFF) | 0x080000; diff --git a/board/trab/tsc2000.h b/board/trab/tsc2000.h index aac9c0c..af1b644 100644 --- a/board/trab/tsc2000.h +++ b/board/trab/tsc2000.h @@ -29,45 +29,45 @@ #define _TSC2000_H_ /* temperature channel multiplexer definitions */ -#define CON_MUX0 (gpio->PCCON = (gpio->PCCON & 0x0FFFFFCFF) | 0x00000100) -#define CLR_MUX0 (gpio->PCDAT &= 0x0FFEF) -#define SET_MUX0 (gpio->PCDAT |= 0x00010) +#define CON_MUX0 (gpio->PCCON = (gpio->PCCON & 0x0FFFFFCFF) | 0x00000100) +#define CLR_MUX0 (gpio->PCDAT &= 0x0FFEF) +#define SET_MUX0 (gpio->PCDAT |= 0x00010) -#define CON_MUX1 (gpio->PCCON = (gpio->PCCON & 0x0FFFFF3FF) | 0x00000400) -#define CLR_MUX1 (gpio->PCDAT &= 0x0FFDF) -#define SET_MUX1 (gpio->PCDAT |= 0x00020) +#define CON_MUX1 (gpio->PCCON = (gpio->PCCON & 0x0FFFFF3FF) | 0x00000400) +#define CLR_MUX1 (gpio->PCDAT &= 0x0FFDF) +#define SET_MUX1 (gpio->PCDAT |= 0x00020) -#define CON_MUX1_ENABLE (gpio->PCCON = (gpio->PCCON & 0x0FFFFCFFF) | 0x00001000) -#define CLR_MUX1_ENABLE (gpio->PCDAT |= 0x00040) -#define SET_MUX1_ENABLE (gpio->PCDAT &= 0x0FFBF) +#define CON_MUX1_ENABLE (gpio->PCCON = (gpio->PCCON & 0x0FFFFCFFF) | 0x00001000) +#define CLR_MUX1_ENABLE (gpio->PCDAT |= 0x00040) +#define SET_MUX1_ENABLE (gpio->PCDAT &= 0x0FFBF) -#define CON_MUX2_ENABLE (gpio->PCCON = (gpio->PCCON & 0x0FFFF3FFF) | 0x00004000) -#define CLR_MUX2_ENABLE (gpio->PCDAT |= 0x00080) -#define SET_MUX2_ENABLE (gpio->PCDAT &= 0x0FF7F) +#define CON_MUX2_ENABLE (gpio->PCCON = (gpio->PCCON & 0x0FFFF3FFF) | 0x00004000) +#define CLR_MUX2_ENABLE (gpio->PCDAT |= 0x00080) +#define SET_MUX2_ENABLE (gpio->PCDAT &= 0x0FF7F) -#define CON_MUX3_ENABLE (gpio->PCCON = (gpio->PCCON & 0x0FFFCFFFF) | 0x00010000) -#define CLR_MUX3_ENABLE (gpio->PCDAT |= 0x00100) -#define SET_MUX3_ENABLE (gpio->PCDAT &= 0x0FEFF) +#define CON_MUX3_ENABLE (gpio->PCCON = (gpio->PCCON & 0x0FFFCFFFF) | 0x00010000) +#define CLR_MUX3_ENABLE (gpio->PCDAT |= 0x00100) +#define SET_MUX3_ENABLE (gpio->PCDAT &= 0x0FEFF) -#define CON_MUX4_ENABLE (gpio->PCCON = (gpio->PCCON & 0x0FFF3FFFF) | 0x00040000) -#define CLR_MUX4_ENABLE (gpio->PCDAT |= 0x00200) -#define SET_MUX4_ENABLE (gpio->PCDAT &= 0x0FDFF) +#define CON_MUX4_ENABLE (gpio->PCCON = (gpio->PCCON & 0x0FFF3FFFF) | 0x00040000) +#define CLR_MUX4_ENABLE (gpio->PCDAT |= 0x00200) +#define SET_MUX4_ENABLE (gpio->PCDAT &= 0x0FDFF) -#define CON_SEL_TEMP_V_0 (gpio->PCCON = (gpio->PCCON & 0x0FFCFFFFF) | 0x00100000) -#define CLR_SEL_TEMP_V_0 (gpio->PCDAT &= 0x0FBFF) -#define SET_SEL_TEMP_V_0 (gpio->PCDAT |= 0x00400) +#define CON_SEL_TEMP_V_0 (gpio->PCCON = (gpio->PCCON & 0x0FFCFFFFF) | 0x00100000) +#define CLR_SEL_TEMP_V_0 (gpio->PCDAT &= 0x0FBFF) +#define SET_SEL_TEMP_V_0 (gpio->PCDAT |= 0x00400) -#define CON_SEL_TEMP_V_1 (gpio->PCCON = (gpio->PCCON & 0x0FF3FFFFF) | 0x00400000) -#define CLR_SEL_TEMP_V_1 (gpio->PCDAT &= 0x0F7FF) -#define SET_SEL_TEMP_V_1 (gpio->PCDAT |= 0x00800) +#define CON_SEL_TEMP_V_1 (gpio->PCCON = (gpio->PCCON & 0x0FF3FFFFF) | 0x00400000) +#define CLR_SEL_TEMP_V_1 (gpio->PCDAT &= 0x0F7FF) +#define SET_SEL_TEMP_V_1 (gpio->PCDAT |= 0x00800) -#define CON_SEL_TEMP_V_2 (gpio->PCCON = (gpio->PCCON & 0x0FCFFFFFF) | 0x01000000) -#define CLR_SEL_TEMP_V_2 (gpio->PCDAT &= 0x0EFFF) -#define SET_SEL_TEMP_V_2 (gpio->PCDAT |= 0x01000) +#define CON_SEL_TEMP_V_2 (gpio->PCCON = (gpio->PCCON & 0x0FCFFFFFF) | 0x01000000) +#define CLR_SEL_TEMP_V_2 (gpio->PCDAT &= 0x0EFFF) +#define SET_SEL_TEMP_V_2 (gpio->PCDAT |= 0x01000) -#define CON_SEL_TEMP_V_3 (gpio->PCCON = (gpio->PCCON & 0x0F3FFFFFF) | 0x04000000) -#define CLR_SEL_TEMP_V_3 (gpio->PCDAT &= 0x0DFFF) -#define SET_SEL_TEMP_V_3 (gpio->PCDAT |= 0x02000) +#define CON_SEL_TEMP_V_3 (gpio->PCCON = (gpio->PCCON & 0x0F3FFFFFF) | 0x04000000) +#define CLR_SEL_TEMP_V_3 (gpio->PCDAT &= 0x0DFFF) +#define SET_SEL_TEMP_V_3 (gpio->PCDAT |= 0x02000) /* TSC2000 register definition */ #define TSC2000_REG_X ((0 << 11) | (0 << 5)) @@ -89,21 +89,21 @@ #define TSC2000_REG_CONFIG ((1 << 11) | (5 << 5)) /* bit definition of TSC2000 ADC register */ -#define TC_PSM (1 << 15) -#define TC_STS (1 << 14) -#define TC_AD3 (1 << 13) -#define TC_AD2 (1 << 12) -#define TC_AD1 (1 << 11) -#define TC_AD0 (1 << 10) -#define TC_RS1 (1 << 9) -#define TC_RS0 (1 << 8) -#define TC_AV1 (1 << 7) -#define TC_AV0 (1 << 6) -#define TC_CL1 (1 << 5) -#define TC_CL0 (1 << 4) -#define TC_PV2 (1 << 3) -#define TC_PV1 (1 << 2) -#define TC_PV0 (1 << 1) +#define TC_PSM (1 << 15) +#define TC_STS (1 << 14) +#define TC_AD3 (1 << 13) +#define TC_AD2 (1 << 12) +#define TC_AD1 (1 << 11) +#define TC_AD0 (1 << 10) +#define TC_RS1 (1 << 9) +#define TC_RS0 (1 << 8) +#define TC_AV1 (1 << 7) +#define TC_AV0 (1 << 6) +#define TC_CL1 (1 << 5) +#define TC_CL0 (1 << 4) +#define TC_PV2 (1 << 3) +#define TC_PV1 (1 << 2) +#define TC_PV0 (1 << 1) /* default value for TSC2000 ADC register for use with touch functions */ #define DEFAULT_ADC (TC_PV1 | TC_AV0 | TC_AV1 | TC_RS0) @@ -111,8 +111,7 @@ #define TSC2000_DELAY_BASE 500 #define TSC2000_NO_SENSOR -0x10000 -#define ERROR_BATTERY 220 /* must be adjusted, if R68 is changed on - * TRAB */ +#define ERROR_BATTERY 220 /* must be adjusted, if R68 is changed on TRAB */ void tsc2000_write(unsigned short, unsigned short); unsigned short tsc2000_read (unsigned short); diff --git a/board/trab/vfd.c b/board/trab/vfd.c index b6798fd..eb506f3 100644 --- a/board/trab/vfd.c +++ b/board/trab/vfd.c @@ -104,7 +104,7 @@ void init_grid_ctrl(void) bit = grid_cycle * 256 * 4 + (grid_cycle + 200) * 4 + frame_buf_offs + display; - /* wrap arround if offset (see manual S3C2400) */ + /* wrap arround if offset (see manual S3C2400) */ if (bit>=FRAME_BUF_SIZE*8) bit = bit - (FRAME_BUF_SIZE * 8); adr = gd->fb_base + (bit/32) * 4 + (3 - (bit%32) / 8); @@ -117,7 +117,7 @@ void init_grid_ctrl(void) if(grid_cycle<55) bit = grid_cycle*256*4+(grid_cycle+201)*4+frame_buf_offs+display; else - bit = grid_cycle*256*4+200*4+frame_buf_offs+display-4; /* grid nr. 0 */ + bit = grid_cycle*256*4+200*4+frame_buf_offs+display-4; /* grid nr. 0 */ /* wrap arround if offset (see manual S3C2400) */ if (bit>=FRAME_BUF_SIZE*8) bit = bit-(FRAME_BUF_SIZE*8); @@ -190,7 +190,7 @@ void create_vfd_table(void) /* Display 0 red pixels */ vfd_table[x][y][1][display][0] = (x==0) ? y*16+512+display - : (x%4)*4+y*16+((x-1)/2)*1024+512+display; + : (x%4)*4+y*16+((x-1)/2)*1024+512+display; } } } @@ -488,7 +488,7 @@ int drv_vfd_init(void) lcd->LCDCON1 = 0x00000000; /* frame buffer startadr */ lcd->LCDSADDR1 = gd->fb_base >> 1; - /* frame buffer endadr */ + /* frame buffer endadr */ lcd->LCDSADDR2 = (gd->fb_base + FRAME_BUF_SIZE) >> 1; lcd->LCDSADDR3 = ((256/4)); lcd->LCDCON2 = 0x000DC000; -- cgit v1.1