From ef426d45cc94678eab90ebaf1b62fe0f4f0e4691 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 26 Nov 2011 11:29:36 +0100 Subject: PXA: Move colibri_pxa270 to board/toradex/ Signed-off-by: Marek Vasut --- board/toradex/colibri_pxa270/colibri_pxa270.c | 124 ++++++++++++++++++++++++++ 1 file changed, 124 insertions(+) create mode 100644 board/toradex/colibri_pxa270/colibri_pxa270.c (limited to 'board/toradex/colibri_pxa270/colibri_pxa270.c') diff --git a/board/toradex/colibri_pxa270/colibri_pxa270.c b/board/toradex/colibri_pxa270/colibri_pxa270.c new file mode 100644 index 0000000..d72e5d6 --- /dev/null +++ b/board/toradex/colibri_pxa270/colibri_pxa270.c @@ -0,0 +1,124 @@ +/* + * Toradex Colibri PXA270 Support + * + * Copyright (C) 2010 Marek Vasut + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +struct serial_device *default_serial_console(void) +{ + return &serial_ffuart_device; +} + +int board_init(void) +{ + /* We have RAM, disable cache */ + dcache_disable(); + icache_disable(); + + /* arch number of vpac270 */ + gd->bd->bi_arch_number = MACH_TYPE_COLIBRI; + + /* adress of boot parameters */ + gd->bd->bi_boot_params = 0xa0000100; + + return 0; +} + +int dram_init(void) +{ + pxa2xx_dram_init(); + gd->ram_size = PHYS_SDRAM_1_SIZE; + return 0; +} + +#ifdef CONFIG_CMD_USB +int usb_board_init(void) +{ + writel((readl(UHCHR) | UHCHR_PCPL | UHCHR_PSPL) & + ~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE), + UHCHR); + + writel(readl(UHCHR) | UHCHR_FSBIR, UHCHR); + + while (UHCHR & UHCHR_FSBIR) + ; + + writel(readl(UHCHR) & ~UHCHR_SSE, UHCHR); + writel((UHCHIE_UPRIE | UHCHIE_RWIE), UHCHIE); + + /* Clear any OTG Pin Hold */ + if (readl(PSSR) & PSSR_OTGPH) + writel(readl(PSSR) | PSSR_OTGPH, PSSR); + + writel(readl(UHCRHDA) & ~(0x200), UHCRHDA); + writel(readl(UHCRHDA) | 0x100, UHCRHDA); + + /* Set port power control mask bits, only 3 ports. */ + writel(readl(UHCRHDB) | (0x7<<17), UHCRHDB); + + /* enable port 2 */ + writel(readl(UP2OCR) | UP2OCR_HXOE | UP2OCR_HXS | + UP2OCR_DMPDE | UP2OCR_DPPDE, UP2OCR); + + return 0; +} + +void usb_board_init_fail(void) +{ + return; +} + +void usb_board_stop(void) +{ + writel(readl(UHCHR) | UHCHR_FHR, UHCHR); + udelay(11); + writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR); + + writel(readl(UHCCOMS) | 1, UHCCOMS); + udelay(10); + + writel(readl(CKEN) & ~CKEN10_USBHOST, CKEN); + + return; +} +#endif + +#ifdef CONFIG_DRIVER_DM9000 +int board_eth_init(bd_t *bis) +{ + return dm9000_initialize(bis); +} +#endif + +#ifdef CONFIG_CMD_MMC +int board_mmc_init(bd_t *bis) +{ + pxa_mmc_register(0); + return 0; +} +#endif -- cgit v1.1