From 59dcf970d11ebff5d9f4bbbde79fda584e9e7ad4 Mon Sep 17 00:00:00 2001 From: Vaibhav Hiremath Date: Thu, 14 Mar 2013 21:11:16 +0000 Subject: am335x: Enable DDR PHY dynamic power down bit for DDR3 boards Enable DDR PHY dynamic power down bit, which enables powering down the IO receiver when not performing read. This also helps in reducing overall power consumption in low power states (suspend/standby). Signed-off-by: Vaibhav Hiremath Signed-off-by: Satyanarayana, Sandhya Cc: Tom Rini Reviewed-by: Tom Rini --- board/ti/am335x/board.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'board/ti/am335x') diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c index f4b972b..2e230f4 100644 --- a/board/ti/am335x/board.c +++ b/board/ti/am335x/board.c @@ -251,7 +251,8 @@ static struct emif_regs ddr3_emif_reg_data = { .sdram_tim2 = MT41J128MJT125_EMIF_TIM2, .sdram_tim3 = MT41J128MJT125_EMIF_TIM3, .zq_config = MT41J128MJT125_ZQ_CFG, - .emif_ddr_phy_ctlr_1 = MT41J128MJT125_EMIF_READ_LATENCY, + .emif_ddr_phy_ctlr_1 = MT41J128MJT125_EMIF_READ_LATENCY | + PHY_EN_DYN_PWRDN, }; static struct emif_regs ddr3_evm_emif_reg_data = { @@ -261,7 +262,8 @@ static struct emif_regs ddr3_evm_emif_reg_data = { .sdram_tim2 = MT41J512M8RH125_EMIF_TIM2, .sdram_tim3 = MT41J512M8RH125_EMIF_TIM3, .zq_config = MT41J512M8RH125_ZQ_CFG, - .emif_ddr_phy_ctlr_1 = MT41J512M8RH125_EMIF_READ_LATENCY, + .emif_ddr_phy_ctlr_1 = MT41J512M8RH125_EMIF_READ_LATENCY | + PHY_EN_DYN_PWRDN, }; #endif -- cgit v1.1