From 48b42616e928ce6eacfe20276a1614e2b27ac4b5 Mon Sep 17 00:00:00 2001
From: wdenk <wdenk>
Date: Thu, 19 Jun 2003 23:01:32 +0000
Subject: =?UTF-8?q?*=20Patches=20by=20David=20M=FCller,=2012=20Jun=202003:?=
 =?UTF-8?q?=20=20=20-=20rewrite=20of=20the=20S3C24X0=20register=20definiti?=
 =?UTF-8?q?ons=20stuff=20=20=20-=20"driver"=20for=20the=20built-in=20S3C24?=
 =?UTF-8?q?X0=20RTC?=
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* Patches by Yuli Barcohen, 12 Jun 2003:
  - Add MII support and Ethernet PHY initialization for MPC8260ADS board
  - Fix incorrect SIUMCR initialisation caused by wrong Hard Reset
    configuration word supplied by FPGA on some MPC8260ADS boards

* Patch by Pantelis Antoniou, 10 Jun 2003:
  Unify status LED interface
---
 board/smdk2410/smdk2410.c | 38 ++++++++++++++++++++------------------
 1 file changed, 20 insertions(+), 18 deletions(-)

(limited to 'board/smdk2410/smdk2410.c')

diff --git a/board/smdk2410/smdk2410.c b/board/smdk2410/smdk2410.c
index 7f983ef..207cd44 100644
--- a/board/smdk2410/smdk2410.c
+++ b/board/smdk2410/smdk2410.c
@@ -68,38 +68,40 @@ static inline void delay (unsigned long loops)
 int board_init (void)
 {
 	DECLARE_GLOBAL_DATA_PTR;
+	S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
+	S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
 
 	/* to reduce PLL lock time, adjust the LOCKTIME register */
-	rLOCKTIME = 0xFFFFFF;
+	clk_power->LOCKTIME = 0xFFFFFF;
 
 	/* configure MPLL */
-	rMPLLCON = ((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV);
+	clk_power->MPLLCON = ((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV);
 
 	/* some delay between MPLL and UPLL */
 	delay (4000);
 
 	/* configure UPLL */
-	rUPLLCON = ((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV);
+	clk_power->UPLLCON = ((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV);
 
 	/* some delay between MPLL and UPLL */
 	delay (8000);
 
 	/* set up the I/O ports */
-	rGPACON = 0x007FFFFF;
-	rGPBCON = 0x00044555;
-	rGPBUP = 0x000007FF;
-	rGPCCON = 0xAAAAAAAA;
-	rGPCUP = 0x0000FFFF;
-	rGPDCON = 0xAAAAAAAA;
-	rGPDUP = 0x0000FFFF;
-	rGPECON = 0xAAAAAAAA;
-	rGPEUP = 0x0000FFFF;
-	rGPFCON = 0x000055AA;
-	rGPFUP = 0x000000FF;
-	rGPGCON = 0xFF95FFBA;
-	rGPGUP = 0x0000FFFF;
-	rGPHCON = 0x002AFAAA;
-	rGPHUP = 0x000007FF;
+	gpio->GPACON = 0x007FFFFF;
+	gpio->GPBCON = 0x00044555;
+	gpio->GPBUP = 0x000007FF;
+	gpio->GPCCON = 0xAAAAAAAA;
+	gpio->GPCUP = 0x0000FFFF;
+	gpio->GPDCON = 0xAAAAAAAA;
+	gpio->GPDUP = 0x0000FFFF;
+	gpio->GPECON = 0xAAAAAAAA;
+	gpio->GPEUP = 0x0000FFFF;
+	gpio->GPFCON = 0x000055AA;
+	gpio->GPFUP = 0x000000FF;
+	gpio->GPGCON = 0xFF95FFBA;
+	gpio->GPGUP = 0x0000FFFF;
+	gpio->GPHCON = 0x002AFAAA;
+	gpio->GPHUP = 0x000007FF;
 
 	/* arch number of SMDK2410-Board */
 	gd->bd->bi_arch_number = 193;
-- 
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