From fd9080ea5072cbc771a5f299e1f7ede65b6204b9 Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Wed, 23 Nov 2016 06:01:30 -0700 Subject: arm: Remove smdk2410 board MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This board has not been converted to DM_SERIAL by the deadline. Remove it. Signed-off-by: Simon Glass Acked-by: David Müller --- board/samsung/smdk2410/Kconfig | 15 ---- board/samsung/smdk2410/MAINTAINERS | 6 -- board/samsung/smdk2410/Makefile | 9 -- board/samsung/smdk2410/lowlevel_init.S | 146 --------------------------------- board/samsung/smdk2410/smdk2410.c | 139 ------------------------------- 5 files changed, 315 deletions(-) delete mode 100644 board/samsung/smdk2410/Kconfig delete mode 100644 board/samsung/smdk2410/MAINTAINERS delete mode 100644 board/samsung/smdk2410/Makefile delete mode 100644 board/samsung/smdk2410/lowlevel_init.S delete mode 100644 board/samsung/smdk2410/smdk2410.c (limited to 'board/samsung') diff --git a/board/samsung/smdk2410/Kconfig b/board/samsung/smdk2410/Kconfig deleted file mode 100644 index e987b64..0000000 --- a/board/samsung/smdk2410/Kconfig +++ /dev/null @@ -1,15 +0,0 @@ -if TARGET_SMDK2410 - -config SYS_BOARD - default "smdk2410" - -config SYS_VENDOR - default "samsung" - -config SYS_SOC - default "s3c24x0" - -config SYS_CONFIG_NAME - default "smdk2410" - -endif diff --git a/board/samsung/smdk2410/MAINTAINERS b/board/samsung/smdk2410/MAINTAINERS deleted file mode 100644 index 12a25e8..0000000 --- a/board/samsung/smdk2410/MAINTAINERS +++ /dev/null @@ -1,6 +0,0 @@ -SMDK2410 BOARD -M: David Müller -S: Maintained -F: board/samsung/smdk2410/ -F: include/configs/smdk2410.h -F: configs/smdk2410_defconfig diff --git a/board/samsung/smdk2410/Makefile b/board/samsung/smdk2410/Makefile deleted file mode 100644 index 1939a21..0000000 --- a/board/samsung/smdk2410/Makefile +++ /dev/null @@ -1,9 +0,0 @@ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := smdk2410.o -obj-y += lowlevel_init.o diff --git a/board/samsung/smdk2410/lowlevel_init.S b/board/samsung/smdk2410/lowlevel_init.S deleted file mode 100644 index c3f4187..0000000 --- a/board/samsung/smdk2410/lowlevel_init.S +++ /dev/null @@ -1,146 +0,0 @@ -/* - * Memory Setup stuff - taken from blob memsetup.S - * - * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and - * Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl) - * - * Modified for the Samsung SMDK2410 by - * (C) Copyright 2002 - * David Mueller, ELSOFT AG, - * - * SPDX-License-Identifier: GPL-2.0+ - */ - - -#include - -/* some parameters for the board */ - -/* - * - * Taken from linux/arch/arm/boot/compressed/head-s3c2410.S - * - * Copyright (C) 2002 Samsung Electronics SW.LEE - * - */ - -#define BWSCON 0x48000000 - -/* BWSCON */ -#define DW8 (0x0) -#define DW16 (0x1) -#define DW32 (0x2) -#define WAIT (0x1<<2) -#define UBLB (0x1<<3) - -#define B1_BWSCON (DW32) -#define B2_BWSCON (DW16) -#define B3_BWSCON (DW16 + WAIT + UBLB) -#define B4_BWSCON (DW16) -#define B5_BWSCON (DW16) -#define B6_BWSCON (DW32) -#define B7_BWSCON (DW32) - -/* BANK0CON */ -#define B0_Tacs 0x0 /* 0clk */ -#define B0_Tcos 0x0 /* 0clk */ -#define B0_Tacc 0x7 /* 14clk */ -#define B0_Tcoh 0x0 /* 0clk */ -#define B0_Tah 0x0 /* 0clk */ -#define B0_Tacp 0x0 -#define B0_PMC 0x0 /* normal */ - -/* BANK1CON */ -#define B1_Tacs 0x0 /* 0clk */ -#define B1_Tcos 0x0 /* 0clk */ -#define B1_Tacc 0x7 /* 14clk */ -#define B1_Tcoh 0x0 /* 0clk */ -#define B1_Tah 0x0 /* 0clk */ -#define B1_Tacp 0x0 -#define B1_PMC 0x0 - -#define B2_Tacs 0x0 -#define B2_Tcos 0x0 -#define B2_Tacc 0x7 -#define B2_Tcoh 0x0 -#define B2_Tah 0x0 -#define B2_Tacp 0x0 -#define B2_PMC 0x0 - -#define B3_Tacs 0x0 /* 0clk */ -#define B3_Tcos 0x3 /* 4clk */ -#define B3_Tacc 0x7 /* 14clk */ -#define B3_Tcoh 0x1 /* 1clk */ -#define B3_Tah 0x0 /* 0clk */ -#define B3_Tacp 0x3 /* 6clk */ -#define B3_PMC 0x0 /* normal */ - -#define B4_Tacs 0x0 /* 0clk */ -#define B4_Tcos 0x0 /* 0clk */ -#define B4_Tacc 0x7 /* 14clk */ -#define B4_Tcoh 0x0 /* 0clk */ -#define B4_Tah 0x0 /* 0clk */ -#define B4_Tacp 0x0 -#define B4_PMC 0x0 /* normal */ - -#define B5_Tacs 0x0 /* 0clk */ -#define B5_Tcos 0x0 /* 0clk */ -#define B5_Tacc 0x7 /* 14clk */ -#define B5_Tcoh 0x0 /* 0clk */ -#define B5_Tah 0x0 /* 0clk */ -#define B5_Tacp 0x0 -#define B5_PMC 0x0 /* normal */ - -#define B6_MT 0x3 /* SDRAM */ -#define B6_Trcd 0x1 -#define B6_SCAN 0x1 /* 9bit */ - -#define B7_MT 0x3 /* SDRAM */ -#define B7_Trcd 0x1 /* 3clk */ -#define B7_SCAN 0x1 /* 9bit */ - -/* REFRESH parameter */ -#define REFEN 0x1 /* Refresh enable */ -#define TREFMD 0x0 /* CBR(CAS before RAS)/Auto refresh */ -#define Trp 0x0 /* 2clk */ -#define Trc 0x3 /* 7clk */ -#define Tchr 0x2 /* 3clk */ -#define REFCNT 1113 /* period=15.6us, HCLK=60Mhz, (2048+1-15.6*60) */ -/**************************************/ - -.globl lowlevel_init -lowlevel_init: - /* memory control configuration */ - /* make r0 relative the current location so that it */ - /* reads SMRDATA out of FLASH rather than memory ! */ - ldr r0, =SMRDATA - ldr r1, =CONFIG_SYS_TEXT_BASE - sub r0, r0, r1 - ldr r1, =BWSCON /* Bus Width Status Controller */ - add r2, r0, #13*4 -0: - ldr r3, [r0], #4 - str r3, [r1], #4 - cmp r2, r0 - bne 0b - - /* everything is fine now */ - mov pc, lr - - .ltorg -/* the literal pools origin */ - -SMRDATA: - .word (0+(B1_BWSCON<<4)+(B2_BWSCON<<8)+(B3_BWSCON<<12)+(B4_BWSCON<<16)+(B5_BWSCON<<20)+(B6_BWSCON<<24)+(B7_BWSCON<<28)) - .word ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC)) - .word ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC)) - .word ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC)) - .word ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC)) - .word ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC)) - .word ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC)) - .word ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN)) - .word ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN)) - .word ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT) - .word 0x32 - .word 0x30 - .word 0x30 diff --git a/board/samsung/smdk2410/smdk2410.c b/board/samsung/smdk2410/smdk2410.c deleted file mode 100644 index 6e678c7..0000000 --- a/board/samsung/smdk2410/smdk2410.c +++ /dev/null @@ -1,139 +0,0 @@ -/* - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH - * Marius Groeger - * - * (C) Copyright 2002, 2010 - * David Mueller, ELSOFT AG, - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -#define FCLK_SPEED 1 - -#if (FCLK_SPEED == 0) /* Fout = 203MHz, Fin = 12MHz for Audio */ -#define M_MDIV 0xC3 -#define M_PDIV 0x4 -#define M_SDIV 0x1 -#elif (FCLK_SPEED == 1) /* Fout = 202.8MHz */ -#define M_MDIV 0xA1 -#define M_PDIV 0x3 -#define M_SDIV 0x1 -#endif - -#define USB_CLOCK 1 - -#if (USB_CLOCK == 0) -#define U_M_MDIV 0xA1 -#define U_M_PDIV 0x3 -#define U_M_SDIV 0x1 -#elif (USB_CLOCK == 1) -#define U_M_MDIV 0x48 -#define U_M_PDIV 0x3 -#define U_M_SDIV 0x2 -#endif - -static inline void pll_delay(unsigned long loops) -{ - __asm__ volatile ("1:\n" - "subs %0, %1, #1\n" - "bne 1b" : "=r" (loops) : "0" (loops)); -} - -/* - * Miscellaneous platform dependent initialisations - */ - -int board_early_init_f(void) -{ - struct s3c24x0_clock_power * const clk_power = - s3c24x0_get_base_clock_power(); - struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio(); - - /* to reduce PLL lock time, adjust the LOCKTIME register */ - writel(0xFFFFFF, &clk_power->locktime); - - /* configure MPLL */ - writel((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV, - &clk_power->mpllcon); - - /* some delay between MPLL and UPLL */ - pll_delay(4000); - - /* configure UPLL */ - writel((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV, - &clk_power->upllcon); - - /* some delay between MPLL and UPLL */ - pll_delay(8000); - - /* set up the I/O ports */ - writel(0x007FFFFF, &gpio->gpacon); - writel(0x00044555, &gpio->gpbcon); - writel(0x000007FF, &gpio->gpbup); - writel(0xAAAAAAAA, &gpio->gpccon); - writel(0x0000FFFF, &gpio->gpcup); - writel(0xAAAAAAAA, &gpio->gpdcon); - writel(0x0000FFFF, &gpio->gpdup); - writel(0xAAAAAAAA, &gpio->gpecon); - writel(0x0000FFFF, &gpio->gpeup); - writel(0x000055AA, &gpio->gpfcon); - writel(0x000000FF, &gpio->gpfup); - writel(0xFF95FFBA, &gpio->gpgcon); - writel(0x0000FFFF, &gpio->gpgup); - writel(0x002AFAAA, &gpio->gphcon); - writel(0x000007FF, &gpio->gphup); - - return 0; -} - -int board_init(void) -{ - /* arch number of SMDK2410-Board */ - gd->bd->bi_arch_number = MACH_TYPE_SMDK2410; - - /* adress of boot parameters */ - gd->bd->bi_boot_params = 0x30000100; - - icache_enable(); - dcache_enable(); - - return 0; -} - -int dram_init(void) -{ - /* dram_init must store complete ramsize in gd->ram_size */ - gd->ram_size = PHYS_SDRAM_1_SIZE; - return 0; -} - -#ifdef CONFIG_CMD_NET -int board_eth_init(bd_t *bis) -{ - int rc = 0; -#ifdef CONFIG_CS8900 - rc = cs8900_initialize(0, CONFIG_CS8900_BASE); -#endif - return rc; -} -#endif - -/* - * Hardcoded flash setup: - * Flash 0 is a non-CFI AMD AM29LV800BB flash. - */ -ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info) -{ - info->portwidth = FLASH_CFI_16BIT; - info->chipwidth = FLASH_CFI_BY16; - info->interface = FLASH_CFI_X16; - return 1; -} -- cgit v1.1