From 47b37958f6f0f0fafba53480d1ef13143dd0244b Mon Sep 17 00:00:00 2001 From: Przemyslaw Marczak Date: Tue, 27 Jan 2015 13:36:38 +0100 Subject: odroid u3: enable dm i2c support This patch enables CONFIG_DM_I2C and also CONFIG_DM_I2C_COMPAT. The last one should be removed when the dm pmic framework will be finished. Signed-off-by: Przemyslaw Marczak Acked-by: Simon Glass Cc: Minkyu Kang --- board/samsung/odroid/odroid.c | 14 +------------- 1 file changed, 1 insertion(+), 13 deletions(-) (limited to 'board/samsung/odroid/odroid.c') diff --git a/board/samsung/odroid/odroid.c b/board/samsung/odroid/odroid.c index b7d2381..e3517f2 100644 --- a/board/samsung/odroid/odroid.c +++ b/board/samsung/odroid/odroid.c @@ -415,15 +415,6 @@ static int pmic_init_max77686(void) return 0; } -#ifdef CONFIG_SYS_I2C_INIT_BOARD -static void board_init_i2c(void) -{ - /* I2C_0 */ - if (exynos_pinmux_config(PERIPH_ID_I2C0, PINMUX_FLAG_NONE)) - debug("I2C%d not configured\n", (I2C_0)); -} -#endif - int exynos_early_init_f(void) { board_clock_init(); @@ -444,10 +435,7 @@ int exynos_init(void) int exynos_power_init(void) { -#ifdef CONFIG_SYS_I2C_INIT_BOARD - board_init_i2c(); -#endif - pmic_init(I2C_0); + pmic_init(0); pmic_init_max77686(); return 0; -- cgit v1.1 From aa8e00fab5e65a07c2cae52274946a908805ea60 Mon Sep 17 00:00:00 2001 From: Joonyoung Shim Date: Thu, 15 Jan 2015 11:45:56 +0900 Subject: samsung: board: support eMMC reset using DT Some exynos boards require special handling of nRESET_OUT line for eMMC memory to perform complete reboot e.g. Odroid X2/U3/XU3 boards. This will support eMMC reset using DT from reset_misc of samsung common board file. Signed-off-by: Joonyoung Shim Signed-off-by: Minkyu Kang --- board/samsung/odroid/odroid.c | 8 -------- 1 file changed, 8 deletions(-) (limited to 'board/samsung/odroid/odroid.c') diff --git a/board/samsung/odroid/odroid.c b/board/samsung/odroid/odroid.c index e3517f2..306cc0f 100644 --- a/board/samsung/odroid/odroid.c +++ b/board/samsung/odroid/odroid.c @@ -503,11 +503,3 @@ int board_usb_init(int index, enum usb_init_type init) return s3c_udc_probe(&s5pc210_otg_data); } #endif - -void reset_misc(void) -{ - /* Reset eMMC*/ - gpio_set_value(EXYNOS4X12_GPIO_K12, 0); - mdelay(10); - gpio_set_value(EXYNOS4X12_GPIO_K12, 1); -} -- cgit v1.1 From b00f8edb5a1a98636afa121c7c8eacc9045ae19f Mon Sep 17 00:00:00 2001 From: Joonyoung Shim Date: Fri, 23 Jan 2015 17:30:07 +0900 Subject: odroid: fix g2d sclk rate G2D core should be provided 200MHz clock rate. Signed-off-by: Joonyoung Shim Signed-off-by: Minkyu Kang --- board/samsung/odroid/odroid.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'board/samsung/odroid/odroid.c') diff --git a/board/samsung/odroid/odroid.c b/board/samsung/odroid/odroid.c index 306cc0f..bff6ac9 100644 --- a/board/samsung/odroid/odroid.c +++ b/board/samsung/odroid/odroid.c @@ -248,12 +248,12 @@ static void board_clock_init(void) * MOUTc2c = 800 Mhz * MOUTpwi = 108 MHz * - * sclk_g2d_acp = MOUTg2d / (ratio + 1) = 400 (1) + * sclk_g2d_acp = MOUTg2d / (ratio + 1) = 200 (3) * sclk_c2c = MOUTc2c / (ratio + 1) = 400 (1) * aclk_c2c = sclk_c2c / (ratio + 1) = 200 (1) * sclk_pwi = MOUTpwi / (ratio + 1) = 18 (5) */ - set = G2D_ACP_RATIO(1) | C2C_RATIO(1) | PWI_RATIO(5) | + set = G2D_ACP_RATIO(3) | C2C_RATIO(1) | PWI_RATIO(5) | C2C_ACLK_RATIO(1) | DVSEM_RATIO(1) | DPM_RATIO(1); clrsetbits_le32(&clk->div_dmc1, clr, set); -- cgit v1.1