From 6d0f6bcf337c5261c08fabe12982178c2c489d76 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Thu, 16 Oct 2008 15:01:15 +0200 Subject: rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- board/sacsng/clkinit.c | 28 ++++++++++++++-------------- board/sacsng/flash.c | 28 ++++++++++++++-------------- board/sacsng/sacsng.c | 24 ++++++++++++------------ 3 files changed, 40 insertions(+), 40 deletions(-) (limited to 'board/sacsng') diff --git a/board/sacsng/clkinit.c b/board/sacsng/clkinit.c index edb775d..4a7f362 100644 --- a/board/sacsng/clkinit.c +++ b/board/sacsng/clkinit.c @@ -37,7 +37,7 @@ int Daq64xSampling = 0; void Daq_BRG_Reset(uint brg) { - volatile immap_t *immr = (immap_t *)CFG_IMMR; + volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; volatile uint *brg_ptr; brg_ptr = (uint *)&immr->im_brgc1; @@ -53,7 +53,7 @@ void Daq_BRG_Reset(uint brg) void Daq_BRG_Disable(uint brg) { - volatile immap_t *immr = (immap_t *)CFG_IMMR; + volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; volatile uint *brg_ptr; brg_ptr = (uint *)&immr->im_brgc1; @@ -68,7 +68,7 @@ void Daq_BRG_Disable(uint brg) void Daq_BRG_Enable(uint brg) { - volatile immap_t *immr = (immap_t *)CFG_IMMR; + volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; volatile uint *brg_ptr; brg_ptr = (uint *)&immr->im_brgc1; @@ -82,7 +82,7 @@ void Daq_BRG_Enable(uint brg) uint Daq_BRG_Get_Div16(uint brg) { - volatile immap_t *immr = (immap_t *)CFG_IMMR; + volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; uint *brg_ptr; brg_ptr = (uint *)&immr->im_brgc1; @@ -104,7 +104,7 @@ uint Daq_BRG_Get_Div16(uint brg) void Daq_BRG_Set_Div16(uint brg, uint div16) { - volatile immap_t *immr = (immap_t *)CFG_IMMR; + volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; uint *brg_ptr; brg_ptr = (uint *)&immr->im_brgc1; @@ -126,7 +126,7 @@ void Daq_BRG_Set_Div16(uint brg, uint div16) uint Daq_BRG_Get_Count(uint brg) { - volatile immap_t *immr = (immap_t *)CFG_IMMR; + volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; uint *brg_ptr; uint brg_cnt; @@ -153,7 +153,7 @@ uint Daq_BRG_Get_Count(uint brg) void Daq_BRG_Set_Count(uint brg, uint brg_cnt) { - volatile immap_t *immr = (immap_t *)CFG_IMMR; + volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; uint *brg_ptr; brg_ptr = (uint *)&immr->im_brgc1; @@ -183,7 +183,7 @@ void Daq_BRG_Set_Count(uint brg, uint brg_cnt) uint Daq_BRG_Get_ExtClk(uint brg) { - volatile immap_t *immr = (immap_t *)CFG_IMMR; + volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; uint *brg_ptr; brg_ptr = (uint *)&immr->im_brgc1; @@ -243,7 +243,7 @@ char* Daq_BRG_Get_ExtClk_Description(uint brg) void Daq_BRG_Set_ExtClk(uint brg, uint extc) { - volatile immap_t *immr = (immap_t *)CFG_IMMR; + volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; uint *brg_ptr; brg_ptr = (uint *)&immr->im_brgc1; @@ -259,7 +259,7 @@ void Daq_BRG_Set_ExtClk(uint brg, uint extc) uint Daq_BRG_Rate(uint brg) { - volatile immap_t *immr = (immap_t *)CFG_IMMR; + volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; uint *brg_ptr; uint brg_cnt; uint brg_freq = 0; @@ -296,7 +296,7 @@ uint Daq_Get_SampleRate(void) void Daq_Init_Clocks(int sample_rate, int sample_64x) { - volatile ioport_t *iopa = ioport_addr((immap_t *)CFG_IMMR, 0 /* port A */); + volatile ioport_t *iopa = ioport_addr((immap_t *)CONFIG_SYS_IMMR, 0 /* port A */); uint mclk_divisor; /* MCLK divisor */ int flag; /* Interrupt state */ @@ -378,7 +378,7 @@ void Daq_Stop_Clocks(void) { #ifdef TIGHTEN_UP_BRG_TIMING - volatile immap_t *immr = (immap_t *)CFG_IMMR; + volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; register uint mclk_brg; /* MCLK BRG value */ register uint sclk_brg; /* SCLK BRG value */ register uint lrclk_brg; /* LRCLK BRG value */ @@ -663,7 +663,7 @@ void Daq_Start_Clocks(int sample_rate) { #ifdef TIGHTEN_UP_BRG_TIMING - volatile immap_t *immr = (immap_t *)CFG_IMMR; + volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; register uint mclk_brg; /* MCLK BRG value */ register uint sclk_brg; /* SCLK BRG value */ @@ -914,7 +914,7 @@ void Daq_Start_Clocks(int sample_rate) void Daq_Display_Clocks(void) { - volatile immap_t *immr = (immap_t *)CFG_IMMR; + volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; uint mclk_divisor; /* Detected MCLK divisor */ uint sclk_divisor; /* Detected SCLK divisor */ diff --git a/board/sacsng/flash.c b/board/sacsng/flash.c index 8fecf95..8b30f50 100644 --- a/board/sacsng/flash.c +++ b/board/sacsng/flash.c @@ -28,14 +28,14 @@ #undef DEBUG #ifndef CONFIG_ENV_ADDR -#define CONFIG_ENV_ADDR (CFG_FLASH_BASE + CONFIG_ENV_OFFSET) +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET) #endif #ifndef CONFIG_ENV_SIZE #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE #endif -flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ +flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ /*----------------------------------------------------------------------- * Functions @@ -52,24 +52,24 @@ unsigned long flash_init (void) int i; /* Init: no FLASHes known */ - for (i=0; i= CFG_FLASH_BASE +#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE /* monitor protection ON by default */ flash_protect(FLAG_PROTECT_SET, - CFG_MONITOR_BASE, - CFG_MONITOR_BASE+monitor_flash_len-1, + CONFIG_SYS_MONITOR_BASE, + CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1, &flash_info[0]); #endif @@ -82,11 +82,11 @@ unsigned long flash_init (void) #endif if (size_b1) { -#if CFG_MONITOR_BASE >= CFG_FLASH_BASE +#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE /* monitor protection ON by default */ flash_protect(FLAG_PROTECT_SET, - CFG_MONITOR_BASE, - CFG_MONITOR_BASE+monitor_flash_len-1, + CONFIG_SYS_MONITOR_BASE, + CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1, &flash_info[1]); #endif @@ -247,7 +247,7 @@ static ulong flash_get_size (vu_short *addr, flash_info_t *info) } else { #ifdef DEBUG printf("Unknown flash type 0x%04X\n", value); - info->size = CFG_FLASH_SIZE; + info->size = CONFIG_SYS_FLASH_SIZE; #else info->flash_id = FLASH_UNKNOWN; return (0); /* => no or unknown flash */ @@ -374,7 +374,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last) last = start; addr = (vu_short*)(info->start[l_sect]); while ((addr[0] & 0x0080) != 0x0080) { - if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { + if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) { printf ("Timeout\n"); addr[0] = 0xF0F0; /* reset bank */ __asm__ __volatile__(" sync\n "); @@ -509,7 +509,7 @@ static int write_word (flash_info_t *info, ulong dest, ulong data) /* data polling for D7 */ start = get_timer (0); while (*(vu_short *)dest != (ushort)data) { - if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { return (1); } } diff --git a/board/sacsng/sacsng.c b/board/sacsng/sacsng.c index c00f14e..2513937 100644 --- a/board/sacsng/sacsng.c +++ b/board/sacsng/sacsng.c @@ -161,16 +161,16 @@ int checkboard(void) phys_size_t initdram(int board_type) { - volatile immap_t *immap = (immap_t *)CFG_IMMR; + volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; volatile memctl8260_t *memctl = &immap->im_memctl; volatile uchar c = 0; - volatile uchar *ramaddr = (uchar *)(CFG_SDRAM_BASE + 0x8); - uint psdmr = CFG_PSDMR; + volatile uchar *ramaddr = (uchar *)(CONFIG_SYS_SDRAM_BASE + 0x8); + uint psdmr = CONFIG_SYS_PSDMR; int i; uint psrt = 14; /* for no SPD */ uint chipselects = 1; /* for no SPD */ - uint sdram_size = CFG_SDRAM0_SIZE * 1024 * 1024; /* for no SPD */ - uint or = CFG_OR2_PRELIM; /* for no SPD */ + uint sdram_size = CONFIG_SYS_SDRAM0_SIZE * 1024 * 1024; /* for no SPD */ + uint or = CONFIG_SYS_OR2_PRELIM; /* for no SPD */ #ifdef SDRAM_SPD_ADDR uint data_width; uint rows; @@ -383,10 +383,10 @@ phys_size_t initdram(int board_type) * accessing the SDRAM with a single-byte transaction." * * The appropriate BRx/ORx registers have already been set when we - * get here. The SDRAM can be accessed at the address CFG_SDRAM_BASE. + * get here. The SDRAM can be accessed at the address CONFIG_SYS_SDRAM_BASE. */ - memctl->memc_mptpr = CFG_MPTPR; + memctl->memc_mptpr = CONFIG_SYS_MPTPR; memctl->memc_psrt = psrt; memctl->memc_psdmr = psdmr | PSDMR_OP_PREA; @@ -409,7 +409,7 @@ phys_size_t initdram(int board_type) if(chipselects > 1) { ramaddr += sdram_size; - memctl->memc_br3 = CFG_BR3_PRELIM + sdram_size; + memctl->memc_br3 = CONFIG_SYS_BR3_PRELIM + sdram_size; memctl->memc_or3 = or; memctl->memc_psdmr = psdmr | PSDMR_OP_PREA; @@ -446,8 +446,8 @@ int misc_init_r(void) /* * Note: iop is used by the I2C macros, and iopa by the ADC/DAC initialization. */ - volatile ioport_t *iopa = ioport_addr((immap_t *)CFG_IMMR, 0 /* port A */); - volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT); + volatile ioport_t *iopa = ioport_addr((immap_t *)CONFIG_SYS_IMMR, 0 /* port A */); + volatile ioport_t *iop = ioport_addr((immap_t *)CONFIG_SYS_IMMR, I2C_PORT); int reg; /* I2C register value */ char *ep; /* Environment pointer */ @@ -854,14 +854,14 @@ int spi_cs_is_valid(unsigned int bus, unsigned int cs) void spi_cs_activate(struct spi_slave *slave) { - volatile ioport_t *iopd = ioport_addr((immap_t *)CFG_IMMR, 3 /* port D */); + volatile ioport_t *iopd = ioport_addr((immap_t *)CONFIG_SYS_IMMR, 3 /* port D */); iopd->pdat &= ~cs_mask[slave->cs]; } void spi_cs_deactivate(struct spi_slave *slave) { - volatile ioport_t *iopd = ioport_addr((immap_t *)CFG_IMMR, 3 /* port D */); + volatile ioport_t *iopd = ioport_addr((immap_t *)CONFIG_SYS_IMMR, 3 /* port D */); iopd->pdat |= cs_mask[slave->cs]; } -- cgit v1.1