From ace3be4f15875d74344336b9754c14274f940969 Mon Sep 17 00:00:00 2001 From: Paul Burton Date: Fri, 27 May 2016 14:28:04 +0100 Subject: MIPS: Move cache sizes to Kconfig Move details of the L1 cache line sizes & total sizes into Kconfig, defaulting to 0. A new CONFIG_SYS_CACHE_SIZE_AUTO Kconfig entry is introduced to allow platforms to select auto-detection of cache sizes, and it defaults to being enabled if none of the cache sizes are set by the configuration (ie. sizes are all the default 0), and code is adjusted to #ifdef on that rather than on the definition of the sizes (which will always be defined even if 0). Signed-off-by: Paul Burton --- board/qca/ap143/Kconfig | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'board/qca/ap143') diff --git a/board/qca/ap143/Kconfig b/board/qca/ap143/Kconfig index 5ea5d6f..ff02236 100644 --- a/board/qca/ap143/Kconfig +++ b/board/qca/ap143/Kconfig @@ -12,4 +12,13 @@ config SYS_CONFIG_NAME config SYS_TEXT_BASE default 0x9f000000 +config SYS_DCACHE_SIZE + default 32768 + +config SYS_ICACHE_SIZE + default 65536 + +config SYS_CACHELINE_SIZE + default 32 + endif -- cgit v1.1 From 372286217f050bfd57695001d59f618c52822f40 Mon Sep 17 00:00:00 2001 From: Paul Burton Date: Fri, 27 May 2016 14:28:05 +0100 Subject: MIPS: Split I & D cache line size config Allow L1 Icache & L1 Dcache line size to be specified separately, since there's no architectural mandate that they be the same. The [id]cache_line_size functions are tidied up to take advantage of the fact that the Kconfig entries are always present to simply check them for zero rather than needing to #ifdef on their presence. Signed-off-by: Paul Burton [removed CONFIG_SYS_CACHELINE_SIZE in include/configs/pic32mzdask.h] Signed-off-by: Daniel Schwierzeck --- board/qca/ap143/Kconfig | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'board/qca/ap143') diff --git a/board/qca/ap143/Kconfig b/board/qca/ap143/Kconfig index ff02236..74c632a 100644 --- a/board/qca/ap143/Kconfig +++ b/board/qca/ap143/Kconfig @@ -15,10 +15,13 @@ config SYS_TEXT_BASE config SYS_DCACHE_SIZE default 32768 +config SYS_DCACHE_LINE_SIZE + default 32 + config SYS_ICACHE_SIZE default 65536 -config SYS_CACHELINE_SIZE +config SYS_ICACHE_LINE_SIZE default 32 endif -- cgit v1.1 From f1b65c98b0a134ce92c38141b917fd3a210ee535 Mon Sep 17 00:00:00 2001 From: Wills Wang Date: Mon, 30 May 2016 22:54:55 +0800 Subject: mips: ath79: ap143: Reset ethernet on boot This patch reset the ethernet controller for ap143 board Signed-off-by: Wills Wang --- board/qca/ap143/ap143.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'board/qca/ap143') diff --git a/board/qca/ap143/ap143.c b/board/qca/ap143/ap143.c index 1572472..e921ea5 100644 --- a/board/qca/ap143/ap143.c +++ b/board/qca/ap143/ap143.c @@ -10,6 +10,7 @@ #include #include #include +#include #include DECLARE_GLOBAL_DATA_PTR; @@ -62,5 +63,6 @@ int board_early_init_f(void) debug_uart_init(); #endif ddr_init(); + ath79_eth_reset(); return 0; } -- cgit v1.1