From 00a2749d7be5b0e6cb6435187ec8fea600b44627 Mon Sep 17 00:00:00 2001 From: Allen Martin Date: Fri, 31 Aug 2012 08:30:00 +0000 Subject: tegra20: rename tegra2 -> tegra20 This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code. Signed-off-by: Allen Martin Acked-by: Stephen Warren Tested-by: Thierry Reding Signed-off-by: Tom Warren --- board/nvidia/common/board.c | 12 +-- board/nvidia/common/emc.c | 2 +- board/nvidia/common/uart-spi-switch.c | 2 +- board/nvidia/dts/tegra2-harmony.dts | 57 ------------- board/nvidia/dts/tegra2-seaboard.dts | 156 ---------------------------------- board/nvidia/dts/tegra2-ventana.dts | 57 ------------- board/nvidia/dts/tegra2-whistler.dts | 67 --------------- board/nvidia/dts/tegra20-harmony.dts | 57 +++++++++++++ board/nvidia/dts/tegra20-seaboard.dts | 156 ++++++++++++++++++++++++++++++++++ board/nvidia/dts/tegra20-ventana.dts | 57 +++++++++++++ board/nvidia/dts/tegra20-whistler.dts | 67 +++++++++++++++ board/nvidia/harmony/harmony.c | 6 +- board/nvidia/seaboard/seaboard.c | 6 +- board/nvidia/whistler/whistler.c | 6 +- 14 files changed, 354 insertions(+), 354 deletions(-) delete mode 100644 board/nvidia/dts/tegra2-harmony.dts delete mode 100644 board/nvidia/dts/tegra2-seaboard.dts delete mode 100644 board/nvidia/dts/tegra2-ventana.dts delete mode 100644 board/nvidia/dts/tegra2-whistler.dts create mode 100644 board/nvidia/dts/tegra20-harmony.dts create mode 100644 board/nvidia/dts/tegra20-seaboard.dts create mode 100644 board/nvidia/dts/tegra20-ventana.dts create mode 100644 board/nvidia/dts/tegra20-whistler.dts (limited to 'board/nvidia') diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c index e65fc9e..d1a7f3a 100644 --- a/board/nvidia/common/board.c +++ b/board/nvidia/common/board.c @@ -25,7 +25,7 @@ #include #include #include -#include +#include #include #include @@ -45,8 +45,8 @@ DECLARE_GLOBAL_DATA_PTR; -const struct tegra2_sysinfo sysinfo = { - CONFIG_TEGRA2_BOARD_STRING +const struct tegra20_sysinfo sysinfo = { + CONFIG_TEGRA20_BOARD_STRING }; /* @@ -76,8 +76,8 @@ void pin_mux_spi(void) __attribute__((weak, alias("__pin_mux_spi"))); */ static void power_det_init(void) { -#if defined(CONFIG_TEGRA2) - struct pmc_ctlr *const pmc = (struct pmc_ctlr *)TEGRA2_PMC_BASE; +#if defined(CONFIG_TEGRA20) + struct pmc_ctlr *const pmc = (struct pmc_ctlr *)TEGRA20_PMC_BASE; /* turn off power detects */ writel(0, &pmc->pmc_pwr_det_latch); @@ -130,7 +130,7 @@ int board_init(void) board_usb_init(gd->fdt_blob); #endif -#ifdef CONFIG_TEGRA2_LP0 +#ifdef CONFIG_TEGRA20_LP0 /* prepare the WB code to LP0 location */ warmboot_prepare_code(TEGRA_LP0_ADDR, TEGRA_LP0_SIZE); #endif diff --git a/board/nvidia/common/emc.c b/board/nvidia/common/emc.c index 8e4290c..739d4bd 100644 --- a/board/nvidia/common/emc.c +++ b/board/nvidia/common/emc.c @@ -28,7 +28,7 @@ #include #include #include -#include +#include DECLARE_GLOBAL_DATA_PTR; diff --git a/board/nvidia/common/uart-spi-switch.c b/board/nvidia/common/uart-spi-switch.c index 307937a..6b21758 100644 --- a/board/nvidia/common/uart-spi-switch.c +++ b/board/nvidia/common/uart-spi-switch.c @@ -24,7 +24,7 @@ #include #include #include -#include +#include #include diff --git a/board/nvidia/dts/tegra2-harmony.dts b/board/nvidia/dts/tegra2-harmony.dts deleted file mode 100644 index 4f60a05..0000000 --- a/board/nvidia/dts/tegra2-harmony.dts +++ /dev/null @@ -1,57 +0,0 @@ -/dts-v1/; - -/include/ ARCH_CPU_DTS - -/ { - model = "NVIDIA Tegra2 Harmony evaluation board"; - compatible = "nvidia,harmony", "nvidia,tegra20"; - - aliases { - usb0 = "/usb@c5008000"; - }; - - memory { - reg = <0x00000000 0x40000000>; - }; - - clocks { - clk_32k: clk_32k { - clock-frequency = <32000>; - }; - osc { - clock-frequency = <12000000>; - }; - }; - - clock@60006000 { - clocks = <&clk_32k &osc>; - }; - - serial@70006300 { - clock-frequency = < 216000000 >; - }; - - i2c@7000c000 { - status = "disabled"; - }; - - i2c@7000c400 { - status = "disabled"; - }; - - i2c@7000c500 { - status = "disabled"; - }; - - i2c@7000d000 { - status = "disabled"; - }; - - usb@c5000000 { - status = "disabled"; - }; - - usb@c5004000 { - status = "disabled"; - }; -}; diff --git a/board/nvidia/dts/tegra2-seaboard.dts b/board/nvidia/dts/tegra2-seaboard.dts deleted file mode 100644 index 3352539..0000000 --- a/board/nvidia/dts/tegra2-seaboard.dts +++ /dev/null @@ -1,156 +0,0 @@ -/dts-v1/; - -/memreserve/ 0x1c000000 0x04000000; -/include/ ARCH_CPU_DTS - -/ { - model = "NVIDIA Seaboard"; - compatible = "nvidia,seaboard", "nvidia,tegra20"; - - chosen { - bootargs = "vmalloc=192M video=tegrafb console=ttyS0,115200n8 root=/dev/mmcblk1p3 rw rootwait"; - }; - - aliases { - /* This defines the order of our USB ports */ - usb0 = "/usb@c5008000"; - usb1 = "/usb@c5000000"; - - i2c0 = "/i2c@7000d000"; - i2c1 = "/i2c@7000c000"; - i2c2 = "/i2c@7000c400"; - i2c3 = "/i2c@7000c500"; - }; - - memory { - device_type = "memory"; - reg = < 0x00000000 0x40000000 >; - }; - - /* This is not used in U-Boot, but is expected to be in kernel .dts */ - i2c@7000d000 { - clock-frequency = <100000>; - pmic@34 { - compatible = "ti,tps6586x"; - reg = <0x34>; - - clk_32k: clock { - compatible = "fixed-clock"; - /* - * leave out for now due to CPP: - * #clock-cells = <0>; - */ - clock-frequency = <32768>; - }; - }; - }; - - clocks { - osc { - clock-frequency = <12000000>; - }; - }; - - clock@60006000 { - clocks = <&clk_32k &osc>; - }; - - serial@70006300 { - clock-frequency = < 216000000 >; - }; - - sdhci@c8000400 { - cd-gpios = <&gpio 69 0>; /* gpio PI5 */ - wp-gpios = <&gpio 57 0>; /* gpio PH1 */ - power-gpios = <&gpio 70 0>; /* gpio PI6 */ - }; - - sdhci@c8000600 { - support-8bit; - }; - - usb@c5000000 { - nvidia,vbus-gpio = <&gpio 24 0>; /* PD0 */ - dr_mode = "otg"; - }; - - usb@c5004000 { - status = "disabled"; - }; - - i2c@7000c000 { - clock-frequency = <100000>; - }; - - i2c@7000c400 { - status = "disabled"; - }; - - i2c@7000c500 { - clock-frequency = <100000>; - }; - - emc@7000f400 { - emc-table@190000 { - reg = < 190000 >; - compatible = "nvidia,tegra20-emc-table"; - clock-frequency = < 190000 >; - nvidia,emc-registers = < 0x0000000c 0x00000026 - 0x00000009 0x00000003 0x00000004 0x00000004 - 0x00000002 0x0000000c 0x00000003 0x00000003 - 0x00000002 0x00000001 0x00000004 0x00000005 - 0x00000004 0x00000009 0x0000000d 0x0000059f - 0x00000000 0x00000003 0x00000003 0x00000003 - 0x00000003 0x00000001 0x0000000b 0x000000c8 - 0x00000003 0x00000007 0x00000004 0x0000000f - 0x00000002 0x00000000 0x00000000 0x00000002 - 0x00000000 0x00000000 0x00000083 0xa06204ae - 0x007dc010 0x00000000 0x00000000 0x00000000 - 0x00000000 0x00000000 0x00000000 0x00000000 >; - }; - emc-table@380000 { - reg = < 380000 >; - compatible = "nvidia,tegra20-emc-table"; - clock-frequency = < 380000 >; - nvidia,emc-registers = < 0x00000017 0x0000004b - 0x00000012 0x00000006 0x00000004 0x00000005 - 0x00000003 0x0000000c 0x00000006 0x00000006 - 0x00000003 0x00000001 0x00000004 0x00000005 - 0x00000004 0x00000009 0x0000000d 0x00000b5f - 0x00000000 0x00000003 0x00000003 0x00000006 - 0x00000006 0x00000001 0x00000011 0x000000c8 - 0x00000003 0x0000000e 0x00000007 0x0000000f - 0x00000002 0x00000000 0x00000000 0x00000002 - 0x00000000 0x00000000 0x00000083 0xe044048b - 0x007d8010 0x00000000 0x00000000 0x00000000 - 0x00000000 0x00000000 0x00000000 0x00000000 >; - }; - }; - - kbc@7000e200 { - linux,keymap = <0x00020011 0x0003001f 0x0004001e 0x0005002c - 0x000701d0 0x0107007d 0x02060064 0x02070038 0x03000006 - 0x03010005 0x03020013 0x03030012 0x03040021 0x03050020 - 0x0306002d 0x04000008 0x04010007 0x04020014 0x04030023 - 0x04040022 0x0405002f 0x0406002e 0x04070039 0x0500000a - 0x05010009 0x05020016 0x05030015 0x05040024 0x05050031 - 0x05060030 0x0507002b 0x0600000c 0x0601000b 0x06020018 - 0x06030017 0x06040026 0x06050025 0x06060033 0x06070032 - 0x0701000d 0x0702001b 0x0703001c 0x0707008b 0x08040036 - 0x0805002a 0x09050061 0x0907001d 0x0b00001a 0x0b010019 - 0x0b020028 0x0b030027 0x0b040035 0x0b050034 0x0c000044 - 0x0c010043 0x0c02000e 0x0c030004 0x0c040003 0x0c050067 - 0x0c0600d2 0x0c070077 0x0d00006e 0x0d01006f 0x0d030068 - 0x0d04006d 0x0d05006a 0x0d06006c 0x0d070069 0x0e000057 - 0x0e010058 0x0e020042 0x0e030010 0x0e04003e 0x0e05003d - 0x0e060002 0x0e070041 0x0f000001 0x0f010029 0x0f02003f - 0x0f03000f 0x0f04003b 0x0f05003c 0x0f06003a 0x0f070040 - 0x14000047 0x15000049 0x15010048 0x1502004b 0x1504004f - 0x16010062 0x1602004d 0x1603004c 0x16040051 0x16050050 - 0x16070052 0x1b010037 0x1b03004a 0x1b04004e 0x1b050053 - 0x1c050073 0x1d030066 0x1d04006b 0x1d0500e0 0x1d060072 - 0x1d0700e1 0x1e000045 0x1e010046 0x1e020071 - 0x1f04008a>; - linux,fn-keymap = <0x05040002>; - }; -}; diff --git a/board/nvidia/dts/tegra2-ventana.dts b/board/nvidia/dts/tegra2-ventana.dts deleted file mode 100644 index 900e871..0000000 --- a/board/nvidia/dts/tegra2-ventana.dts +++ /dev/null @@ -1,57 +0,0 @@ -/dts-v1/; - -/include/ ARCH_CPU_DTS - -/ { - model = "NVIDIA Tegra2 Ventana evaluation board"; - compatible = "nvidia,ventana", "nvidia,tegra20"; - - aliases { - usb0 = "/usb@c5008000"; - }; - - memory { - reg = <0x00000000 0x40000000>; - }; - - clocks { - clk_32k: clk_32k { - clock-frequency = <32000>; - }; - osc { - clock-frequency = <12000000>; - }; - }; - - clock@60006000 { - clocks = <&clk_32k &osc>; - }; - - serial@70006300 { - clock-frequency = < 216000000 >; - }; - - i2c@7000c000 { - status = "disabled"; - }; - - i2c@7000c400 { - status = "disabled"; - }; - - i2c@7000c500 { - status = "disabled"; - }; - - i2c@7000d000 { - status = "disabled"; - }; - - usb@c5000000 { - status = "disabled"; - }; - - usb@c5004000 { - status = "disabled"; - }; -}; diff --git a/board/nvidia/dts/tegra2-whistler.dts b/board/nvidia/dts/tegra2-whistler.dts deleted file mode 100644 index b22d407..0000000 --- a/board/nvidia/dts/tegra2-whistler.dts +++ /dev/null @@ -1,67 +0,0 @@ -/dts-v1/; - -/include/ ARCH_CPU_DTS - -/ { - model = "NVIDIA Tegra2 Whistler evaluation board"; - compatible = "nvidia,whistler", "nvidia,tegra20"; - - aliases { - i2c0 = "/i2c@7000d000"; - usb0 = "/usb@c5008000"; - usb1 = "/usb@c5000000"; - }; - - memory { - device_type = "memory"; - reg = < 0x00000000 0x20000000 >; - }; - - clocks { - osc { - clock-frequency = <12000000>; - }; - }; - - clock@60006000 { - clocks = <&clk_32k &osc>; - }; - - serial@70006000 { - clock-frequency = < 216000000 >; - }; - - i2c@7000c000 { - status = "disabled"; - }; - - i2c@7000c400 { - status = "disabled"; - }; - - i2c@7000c500 { - status = "disabled"; - }; - - i2c@7000d000 { - clock-frequency = <100000>; - - pmic@3c { - compatible = "maxim,max8907b"; - reg = <0x3c>; - - clk_32k: clock { - compatible = "fixed-clock"; - /* - * leave out for now due to CPP: - * #clock-cells = <0>; - */ - clock-frequency = <32768>; - }; - }; - }; - - usb@c5004000 { - status = "disabled"; - }; -}; diff --git a/board/nvidia/dts/tegra20-harmony.dts b/board/nvidia/dts/tegra20-harmony.dts new file mode 100644 index 0000000..c351954 --- /dev/null +++ b/board/nvidia/dts/tegra20-harmony.dts @@ -0,0 +1,57 @@ +/dts-v1/; + +/include/ ARCH_CPU_DTS + +/ { + model = "NVIDIA Tegra20 Harmony evaluation board"; + compatible = "nvidia,harmony", "nvidia,tegra20"; + + aliases { + usb0 = "/usb@c5008000"; + }; + + memory { + reg = <0x00000000 0x40000000>; + }; + + clocks { + clk_32k: clk_32k { + clock-frequency = <32000>; + }; + osc { + clock-frequency = <12000000>; + }; + }; + + clock@60006000 { + clocks = <&clk_32k &osc>; + }; + + serial@70006300 { + clock-frequency = < 216000000 >; + }; + + i2c@7000c000 { + status = "disabled"; + }; + + i2c@7000c400 { + status = "disabled"; + }; + + i2c@7000c500 { + status = "disabled"; + }; + + i2c@7000d000 { + status = "disabled"; + }; + + usb@c5000000 { + status = "disabled"; + }; + + usb@c5004000 { + status = "disabled"; + }; +}; diff --git a/board/nvidia/dts/tegra20-seaboard.dts b/board/nvidia/dts/tegra20-seaboard.dts new file mode 100644 index 0000000..3352539 --- /dev/null +++ b/board/nvidia/dts/tegra20-seaboard.dts @@ -0,0 +1,156 @@ +/dts-v1/; + +/memreserve/ 0x1c000000 0x04000000; +/include/ ARCH_CPU_DTS + +/ { + model = "NVIDIA Seaboard"; + compatible = "nvidia,seaboard", "nvidia,tegra20"; + + chosen { + bootargs = "vmalloc=192M video=tegrafb console=ttyS0,115200n8 root=/dev/mmcblk1p3 rw rootwait"; + }; + + aliases { + /* This defines the order of our USB ports */ + usb0 = "/usb@c5008000"; + usb1 = "/usb@c5000000"; + + i2c0 = "/i2c@7000d000"; + i2c1 = "/i2c@7000c000"; + i2c2 = "/i2c@7000c400"; + i2c3 = "/i2c@7000c500"; + }; + + memory { + device_type = "memory"; + reg = < 0x00000000 0x40000000 >; + }; + + /* This is not used in U-Boot, but is expected to be in kernel .dts */ + i2c@7000d000 { + clock-frequency = <100000>; + pmic@34 { + compatible = "ti,tps6586x"; + reg = <0x34>; + + clk_32k: clock { + compatible = "fixed-clock"; + /* + * leave out for now due to CPP: + * #clock-cells = <0>; + */ + clock-frequency = <32768>; + }; + }; + }; + + clocks { + osc { + clock-frequency = <12000000>; + }; + }; + + clock@60006000 { + clocks = <&clk_32k &osc>; + }; + + serial@70006300 { + clock-frequency = < 216000000 >; + }; + + sdhci@c8000400 { + cd-gpios = <&gpio 69 0>; /* gpio PI5 */ + wp-gpios = <&gpio 57 0>; /* gpio PH1 */ + power-gpios = <&gpio 70 0>; /* gpio PI6 */ + }; + + sdhci@c8000600 { + support-8bit; + }; + + usb@c5000000 { + nvidia,vbus-gpio = <&gpio 24 0>; /* PD0 */ + dr_mode = "otg"; + }; + + usb@c5004000 { + status = "disabled"; + }; + + i2c@7000c000 { + clock-frequency = <100000>; + }; + + i2c@7000c400 { + status = "disabled"; + }; + + i2c@7000c500 { + clock-frequency = <100000>; + }; + + emc@7000f400 { + emc-table@190000 { + reg = < 190000 >; + compatible = "nvidia,tegra20-emc-table"; + clock-frequency = < 190000 >; + nvidia,emc-registers = < 0x0000000c 0x00000026 + 0x00000009 0x00000003 0x00000004 0x00000004 + 0x00000002 0x0000000c 0x00000003 0x00000003 + 0x00000002 0x00000001 0x00000004 0x00000005 + 0x00000004 0x00000009 0x0000000d 0x0000059f + 0x00000000 0x00000003 0x00000003 0x00000003 + 0x00000003 0x00000001 0x0000000b 0x000000c8 + 0x00000003 0x00000007 0x00000004 0x0000000f + 0x00000002 0x00000000 0x00000000 0x00000002 + 0x00000000 0x00000000 0x00000083 0xa06204ae + 0x007dc010 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 >; + }; + emc-table@380000 { + reg = < 380000 >; + compatible = "nvidia,tegra20-emc-table"; + clock-frequency = < 380000 >; + nvidia,emc-registers = < 0x00000017 0x0000004b + 0x00000012 0x00000006 0x00000004 0x00000005 + 0x00000003 0x0000000c 0x00000006 0x00000006 + 0x00000003 0x00000001 0x00000004 0x00000005 + 0x00000004 0x00000009 0x0000000d 0x00000b5f + 0x00000000 0x00000003 0x00000003 0x00000006 + 0x00000006 0x00000001 0x00000011 0x000000c8 + 0x00000003 0x0000000e 0x00000007 0x0000000f + 0x00000002 0x00000000 0x00000000 0x00000002 + 0x00000000 0x00000000 0x00000083 0xe044048b + 0x007d8010 0x00000000 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000 >; + }; + }; + + kbc@7000e200 { + linux,keymap = <0x00020011 0x0003001f 0x0004001e 0x0005002c + 0x000701d0 0x0107007d 0x02060064 0x02070038 0x03000006 + 0x03010005 0x03020013 0x03030012 0x03040021 0x03050020 + 0x0306002d 0x04000008 0x04010007 0x04020014 0x04030023 + 0x04040022 0x0405002f 0x0406002e 0x04070039 0x0500000a + 0x05010009 0x05020016 0x05030015 0x05040024 0x05050031 + 0x05060030 0x0507002b 0x0600000c 0x0601000b 0x06020018 + 0x06030017 0x06040026 0x06050025 0x06060033 0x06070032 + 0x0701000d 0x0702001b 0x0703001c 0x0707008b 0x08040036 + 0x0805002a 0x09050061 0x0907001d 0x0b00001a 0x0b010019 + 0x0b020028 0x0b030027 0x0b040035 0x0b050034 0x0c000044 + 0x0c010043 0x0c02000e 0x0c030004 0x0c040003 0x0c050067 + 0x0c0600d2 0x0c070077 0x0d00006e 0x0d01006f 0x0d030068 + 0x0d04006d 0x0d05006a 0x0d06006c 0x0d070069 0x0e000057 + 0x0e010058 0x0e020042 0x0e030010 0x0e04003e 0x0e05003d + 0x0e060002 0x0e070041 0x0f000001 0x0f010029 0x0f02003f + 0x0f03000f 0x0f04003b 0x0f05003c 0x0f06003a 0x0f070040 + 0x14000047 0x15000049 0x15010048 0x1502004b 0x1504004f + 0x16010062 0x1602004d 0x1603004c 0x16040051 0x16050050 + 0x16070052 0x1b010037 0x1b03004a 0x1b04004e 0x1b050053 + 0x1c050073 0x1d030066 0x1d04006b 0x1d0500e0 0x1d060072 + 0x1d0700e1 0x1e000045 0x1e010046 0x1e020071 + 0x1f04008a>; + linux,fn-keymap = <0x05040002>; + }; +}; diff --git a/board/nvidia/dts/tegra20-ventana.dts b/board/nvidia/dts/tegra20-ventana.dts new file mode 100644 index 0000000..38b7b13 --- /dev/null +++ b/board/nvidia/dts/tegra20-ventana.dts @@ -0,0 +1,57 @@ +/dts-v1/; + +/include/ ARCH_CPU_DTS + +/ { + model = "NVIDIA Tegra20 Ventana evaluation board"; + compatible = "nvidia,ventana", "nvidia,tegra20"; + + aliases { + usb0 = "/usb@c5008000"; + }; + + memory { + reg = <0x00000000 0x40000000>; + }; + + clocks { + clk_32k: clk_32k { + clock-frequency = <32000>; + }; + osc { + clock-frequency = <12000000>; + }; + }; + + clock@60006000 { + clocks = <&clk_32k &osc>; + }; + + serial@70006300 { + clock-frequency = < 216000000 >; + }; + + i2c@7000c000 { + status = "disabled"; + }; + + i2c@7000c400 { + status = "disabled"; + }; + + i2c@7000c500 { + status = "disabled"; + }; + + i2c@7000d000 { + status = "disabled"; + }; + + usb@c5000000 { + status = "disabled"; + }; + + usb@c5004000 { + status = "disabled"; + }; +}; diff --git a/board/nvidia/dts/tegra20-whistler.dts b/board/nvidia/dts/tegra20-whistler.dts new file mode 100644 index 0000000..38599bd --- /dev/null +++ b/board/nvidia/dts/tegra20-whistler.dts @@ -0,0 +1,67 @@ +/dts-v1/; + +/include/ ARCH_CPU_DTS + +/ { + model = "NVIDIA Tegra20 Whistler evaluation board"; + compatible = "nvidia,whistler", "nvidia,tegra20"; + + aliases { + i2c0 = "/i2c@7000d000"; + usb0 = "/usb@c5008000"; + usb1 = "/usb@c5000000"; + }; + + memory { + device_type = "memory"; + reg = < 0x00000000 0x20000000 >; + }; + + clocks { + osc { + clock-frequency = <12000000>; + }; + }; + + clock@60006000 { + clocks = <&clk_32k &osc>; + }; + + serial@70006000 { + clock-frequency = < 216000000 >; + }; + + i2c@7000c000 { + status = "disabled"; + }; + + i2c@7000c400 { + status = "disabled"; + }; + + i2c@7000c500 { + status = "disabled"; + }; + + i2c@7000d000 { + clock-frequency = <100000>; + + pmic@3c { + compatible = "maxim,max8907b"; + reg = <0x3c>; + + clk_32k: clock { + compatible = "fixed-clock"; + /* + * leave out for now due to CPP: + * #clock-cells = <0>; + */ + clock-frequency = <32768>; + }; + }; + }; + + usb@c5004000 { + status = "disabled"; + }; +}; diff --git a/board/nvidia/harmony/harmony.c b/board/nvidia/harmony/harmony.c index f27ad37..44977c7 100644 --- a/board/nvidia/harmony/harmony.c +++ b/board/nvidia/harmony/harmony.c @@ -23,7 +23,7 @@ #include #include -#include +#include #include #include #include @@ -73,11 +73,11 @@ int board_mmc_init(bd_t *bd) debug("board_mmc_init: init SD slot J26\n"); /* init dev 0, SD slot J26, with 4-bit bus */ /* The board has an 8-bit bus, but 8-bit doesn't work yet */ - tegra2_mmc_init(0, 4, GPIO_PI6, GPIO_PH2); + tegra20_mmc_init(0, 4, GPIO_PI6, GPIO_PH2); debug("board_mmc_init: init SD slot J5\n"); /* init dev 2, SD slot J5, with 4-bit bus */ - tegra2_mmc_init(2, 4, GPIO_PT3, GPIO_PI5); + tegra20_mmc_init(2, 4, GPIO_PT3, GPIO_PI5); return 0; } diff --git a/board/nvidia/seaboard/seaboard.c b/board/nvidia/seaboard/seaboard.c index 36039c4..3298a6b 100644 --- a/board/nvidia/seaboard/seaboard.c +++ b/board/nvidia/seaboard/seaboard.c @@ -23,7 +23,7 @@ #include #include -#include +#include #include #include #include @@ -81,11 +81,11 @@ int board_mmc_init(bd_t *bd) debug("board_mmc_init: init eMMC\n"); /* init dev 0, eMMC chip, with 4-bit bus */ /* The board has an 8-bit bus, but 8-bit doesn't work yet */ - tegra2_mmc_init(0, 4, -1, -1); + tegra20_mmc_init(0, 4, -1, -1); debug("board_mmc_init: init SD slot\n"); /* init dev 1, SD slot, with 4-bit bus */ - tegra2_mmc_init(1, 4, GPIO_PI6, GPIO_PI5); + tegra20_mmc_init(1, 4, GPIO_PI6, GPIO_PI5); return 0; } diff --git a/board/nvidia/whistler/whistler.c b/board/nvidia/whistler/whistler.c index 3ec24df..c0a114d 100644 --- a/board/nvidia/whistler/whistler.c +++ b/board/nvidia/whistler/whistler.c @@ -24,7 +24,7 @@ #include #include #include -#include +#include #include #include #include @@ -81,10 +81,10 @@ int board_mmc_init(bd_t *bd) pin_mux_mmc(); /* init dev 0 (SDMMC4), (J29 "HSMMC") with 8-bit bus */ - tegra2_mmc_init(0, 8, -1, -1); + tegra20_mmc_init(0, 8, -1, -1); /* init dev 1 (SDMMC3), (J40 "SDIO3") with 8-bit bus */ - tegra2_mmc_init(1, 8, -1, -1); + tegra20_mmc_init(1, 8, -1, -1); return 0; } -- cgit v1.1