From 6d0f6bcf337c5261c08fabe12982178c2c489d76 Mon Sep 17 00:00:00 2001 From: Jean-Christophe PLAGNIOL-VILLARD Date: Thu, 16 Oct 2008 15:01:15 +0200 Subject: rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD --- board/netta2/flash.c | 20 ++++++++++---------- board/netta2/netta2.c | 22 +++++++++++----------- 2 files changed, 21 insertions(+), 21 deletions(-) (limited to 'board/netta2') diff --git a/board/netta2/flash.c b/board/netta2/flash.c index cefff71..b63f459 100644 --- a/board/netta2/flash.c +++ b/board/netta2/flash.c @@ -24,7 +24,7 @@ #include #include -flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ +flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ /*----------------------------------------------------------------------- * Functions @@ -38,13 +38,13 @@ static void flash_get_offsets(ulong base, flash_info_t * info); unsigned long flash_init(void) { - volatile immap_t *immap = (immap_t *) CFG_IMMR; + volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; unsigned long size; int i; /* Init: no FLASHes known */ - for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) + for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) flash_info[i].flash_id = FLASH_UNKNOWN; size = flash_get_size((vu_long *) FLASH_BASE0_PRELIM, &flash_info[0]); @@ -55,17 +55,17 @@ unsigned long flash_init(void) } /* Remap FLASH according to real size */ - memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-size & 0xFFFF8000); - memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | (memctl->memc_br0 & ~(BR_BA_MSK)); + memctl->memc_or0 = CONFIG_SYS_OR_TIMING_FLASH | (-size & 0xFFFF8000); + memctl->memc_br0 = (CONFIG_SYS_FLASH_BASE & BR_BA_MSK) | (memctl->memc_br0 & ~(BR_BA_MSK)); /* Re-do sizing to get full correct info */ - size = flash_get_size((vu_long *) CFG_FLASH_BASE, &flash_info[0]); + size = flash_get_size((vu_long *) CONFIG_SYS_FLASH_BASE, &flash_info[0]); - flash_get_offsets(CFG_FLASH_BASE, &flash_info[0]); + flash_get_offsets(CONFIG_SYS_FLASH_BASE, &flash_info[0]); /* monitor protection ON by default */ flash_protect(FLAG_PROTECT_SET, - CFG_FLASH_BASE, CFG_FLASH_BASE + monitor_flash_len - 1, + CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1, &flash_info[0]); flash_protect ( FLAG_PROTECT_SET, @@ -425,7 +425,7 @@ int flash_erase(flash_info_t * info, int s_first, int s_last) last = start; addr = (vu_char *) (info->start[l_sect]); while ((addr[0] & 0x80) != 0x80) { - if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { + if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) { printf("Timeout\n"); return 1; } @@ -498,7 +498,7 @@ static int write_byte(flash_info_t * info, ulong dest, uchar data) /* data polling for D7 */ start = get_timer(0); while ((*((vu_char *) dest) & 0x80) != (data & 0x80)) { - if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { + if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { return (1); } } diff --git a/board/netta2/netta2.c b/board/netta2/netta2.c index 1dbdde1..2ce33cf 100644 --- a/board/netta2/netta2.c +++ b/board/netta2/netta2.c @@ -354,7 +354,7 @@ static const uint nandcs_table[0x40] = { #define MAR_SDRAM_INIT ((CAS_LATENCY << 6) | 0x00000008LU) /* 8 */ -#define CFG_MAMR ((CFG_MAMR_PTA << MAMR_PTA_SHIFT) | MAMR_PTAE | \ +#define CONFIG_SYS_MAMR ((CONFIG_SYS_MAMR_PTA << MAMR_PTA_SHIFT) | MAMR_PTAE | \ MAMR_AMA_TYPE_0 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A11 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X) @@ -404,7 +404,7 @@ void check_ram(unsigned int addr, unsigned int size) phys_size_t initdram(int board_type) { - volatile immap_t *immap = (immap_t *) CFG_IMMR; + volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; long int size; @@ -420,10 +420,10 @@ phys_size_t initdram(int board_type) /* * Map controller bank 3 to the SDRAM bank at preliminary address. */ - memctl->memc_or3 = CFG_OR3_PRELIM; - memctl->memc_br3 = CFG_BR3_PRELIM; + memctl->memc_or3 = CONFIG_SYS_OR3_PRELIM; + memctl->memc_br3 = CONFIG_SYS_BR3_PRELIM; - memctl->memc_mbmr = CFG_MAMR & ~MAMR_PTAE; /* no refresh yet */ + memctl->memc_mbmr = CONFIG_SYS_MAMR & ~MAMR_PTAE; /* no refresh yet */ udelay(200); @@ -544,7 +544,7 @@ void reset_phys(void) int board_early_init_f(void) { - volatile immap_t *immap = (immap_t *) CFG_IMMR; + volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; volatile iop8xx_t *ioport = &immap->im_ioport; volatile cpm8xx_t *cpm = &immap->im_cpm; volatile memctl8xx_t *memctl = &immap->im_memctl; @@ -600,13 +600,13 @@ int board_early_init_f(void) #include extern ulong nand_probe(ulong physadr); -extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE]; +extern struct nand_chip nand_dev_desc[CONFIG_SYS_MAX_NAND_DEVICE]; void nand_init(void) { unsigned long totlen; - totlen = nand_probe(CFG_NAND_BASE); + totlen = nand_probe(CONFIG_SYS_NAND_BASE); printf ("%4lu MB\n", totlen >> 20); } #endif @@ -620,7 +620,7 @@ void hw_watchdog_reset(void) #endif -#if defined(CFG_CONSOLE_IS_IN_ENV) && defined(CFG_CONSOLE_OVERWRITE_ROUTINE) +#if defined(CONFIG_SYS_CONSOLE_IS_IN_ENV) && defined(CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE) int overwrite_console(void) { /* printf("overwrite_console called\n"); */ @@ -645,10 +645,10 @@ int last_stage_init(void) #if CONFIG_NETTA2_VERSION == 2 /* assert peripheral reset */ - ((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pcdat &= ~_BW(12); + ((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pcdat &= ~_BW(12); for (i = 0; i < 10; i++) udelay(1000); - ((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pcdat |= _BW(12); + ((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pcdat |= _BW(12); #endif reset_phys(); -- cgit v1.1