From 9cec2fc209a000655af77256a39ede7c7d441e56 Mon Sep 17 00:00:00 2001 From: Haavard Skinnemoen Date: Thu, 12 Aug 2010 13:52:53 +0700 Subject: avr32: Use uncached() macro to get an address for SDRAM init The paging system which is required to set up caching properties has not yet been initialized when the SDRAM is initialized. So when the map_physmem() function is converted to return the physical address unchanged, the SDRAM initialization will break on some boards. The avr32-specific uncached() macro will return an address which will always cause uncached accessed to be made. Since this happens in the board code, using avr32-specific features should be ok, and will allow the SDRAM initialization to keep working. Signed-off-by: Haavard Skinnemoen --- board/mimc/mimc200/mimc200.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'board/mimc') diff --git a/board/mimc/mimc200/mimc200.c b/board/mimc/mimc200/mimc200.c index cc0f137..9940669 100644 --- a/board/mimc/mimc200/mimc200.c +++ b/board/mimc/mimc200/mimc200.c @@ -153,13 +153,11 @@ phys_size_t initdram(int board_type) unsigned long actual_size; void *sdram_base; - sdram_base = map_physmem(EBI_SDRAM_BASE, EBI_SDRAM_SIZE, MAP_NOCACHE); + sdram_base = uncached(EBI_SDRAM_BASE); expected_size = sdram_init(sdram_base, &sdram_config); actual_size = get_ram_size(sdram_base, expected_size); - unmap_physmem(sdram_base, EBI_SDRAM_SIZE); - if (expected_size != actual_size) printf("Warning: Only %lu of %lu MiB SDRAM is working\n", actual_size >> 20, expected_size >> 20); -- cgit v1.1 From 1f36f73fe70560a2bd286a7abc8530fdc93af9ae Mon Sep 17 00:00:00 2001 From: Haavard Skinnemoen Date: Thu, 12 Aug 2010 13:52:54 +0700 Subject: avr32: Add simple paging support Use the MMU hardware to set up 1:1 mappings between physical and virtual addresses. This allows us to bypass the cache when accessing the flash without having to do any physical-to-virtual address mapping in the CFI driver. The virtual memory mappings are defined at compile time through a sorted array of virtual memory range objects. When a TLB miss exception happens, the exception handler does a binary search through the array until it finds a matching entry and loads it into the TLB. The u-boot image itself is covered by a fixed TLB entry which is never replaced. This makes the 'saveenv' command work again on ATNGW100 and other boards using the CFI driver, hopefully without breaking any rules. Signed-off-by: Haavard Skinnemoen --- board/mimc/mimc200/mimc200.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) (limited to 'board/mimc') diff --git a/board/mimc/mimc200/mimc200.c b/board/mimc/mimc200/mimc200.c index 9940669..470adba 100644 --- a/board/mimc/mimc200/mimc200.c +++ b/board/mimc/mimc200/mimc200.c @@ -27,12 +27,32 @@ #include #include #include +#include #include #include #include #include "../../../arch/avr32/cpu/hsmc3.h" +struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = { + { + .virt_pgno = CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT, + .nr_pages = CONFIG_SYS_FLASH_SIZE >> PAGE_SHIFT, + .phys = (CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT) + | MMU_VMR_CACHE_NONE, + }, { + .virt_pgno = EBI_SRAM_CS2_BASE >> PAGE_SHIFT, + .nr_pages = EBI_SRAM_CS2_SIZE >> PAGE_SHIFT, + .phys = (EBI_SRAM_CS2_BASE >> PAGE_SHIFT) + | MMU_VMR_CACHE_NONE, + }, { + .virt_pgno = CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT, + .nr_pages = EBI_SDRAM_SIZE >> PAGE_SHIFT, + .phys = (CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT) + | MMU_VMR_CACHE_WRBACK, + }, +}; + #if defined(CONFIG_LCD) /* 480x272x16 @ 72 Hz */ vidinfo_t panel_info = { -- cgit v1.1