From 807d93d6de5f54cfdcc98bb6c392b2b1f4237dc8 Mon Sep 17 00:00:00 2001 From: "Boschung, Rainer" Date: Tue, 3 Jun 2014 09:05:17 +0200 Subject: kmp204x/qrio: prepare support for the CPU watchdog reset reason To achieve this, the qrio_cpuwd_flag() function that sets the CPU watchdog flag in the REASON1 reg is added. Signed-off-by: Rainer Boschung Signed-off-by: Valentin Longchamp Reviewed-by: York Sun --- board/keymile/kmp204x/kmp204x.h | 2 ++ board/keymile/kmp204x/qrio.c | 15 +++++++++++++++ 2 files changed, 17 insertions(+) (limited to 'board/keymile') diff --git a/board/keymile/kmp204x/kmp204x.h b/board/keymile/kmp204x/kmp204x.h index afede99..64c0afb 100644 --- a/board/keymile/kmp204x/kmp204x.h +++ b/board/keymile/kmp204x/kmp204x.h @@ -24,5 +24,7 @@ void qrio_wdmask(u8 bit, bool wden); void qrio_prstcfg(u8 bit, u8 mode); void qrio_set_leds(void); void qrio_enable_app_buffer(void); +void qrio_cpuwd_flag(bool flag); +int qrio_reset_reason(void); void pci_of_setup(void *blob, bd_t *bd); diff --git a/board/keymile/kmp204x/qrio.c b/board/keymile/kmp204x/qrio.c index b6ba93a..92e8022 100644 --- a/board/keymile/kmp204x/qrio.c +++ b/board/keymile/kmp204x/qrio.c @@ -173,3 +173,18 @@ void qrio_enable_app_buffer(void) ctrll |= (CTRLL_WRB_BUFENA); out_8(qrio_base + CTRLL_OFF, ctrll); } + +#define REASON1_OFF 0x12 +#define REASON1_CPUWD 0x01 + +void qrio_cpuwd_flag(bool flag) +{ + u8 reason1; + void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE; + reason1 = in_8(qrio_base + REASON1_OFF); + if (flag) + reason1 |= REASON1_CPUWD; + else + reason1 &= ~REASON1_CPUWD; + out_8(qrio_base + REASON1_OFF, reason1); +} -- cgit v1.1 From a09f470d49c4a6355f16fee6455d964211021e3d Mon Sep 17 00:00:00 2001 From: "Boschung, Rainer" Date: Tue, 3 Jun 2014 09:05:18 +0200 Subject: kmp204x: set CPU watchdog reset reason flag Check the core timer status register (TSR) for watchdog reset, and and set the QRIO's reset reason flag REASON1[0] accordingly. This allows the appliction SW to identify the cpu watchdog as a reset reason, by setting the REASON1[0] flag in the QRIO. Signed-off-by: Rainer Boschung Signed-off-by: Valentin Longchamp Reviewed-by: York Sun --- board/keymile/kmp204x/kmp204x.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'board/keymile') diff --git a/board/keymile/kmp204x/kmp204x.c b/board/keymile/kmp204x/kmp204x.c index 6bc8eb8..225262e 100644 --- a/board/keymile/kmp204x/kmp204x.c +++ b/board/keymile/kmp204x/kmp204x.c @@ -80,14 +80,26 @@ int get_scl(void) #define ZL30158_RST 8 #define BFTIC4_RST 0 +#define RSTRQSR1_WDT_RR 0x00200000 +#define RSTRQSR1_SW_RR 0x00100000 int board_early_init_f(void) { ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); + bool cpuwd_flag = false; /* board only uses the DDR_MCK0, so disable the DDR_MCK1/2/3 */ setbits_be32(&gur->ddrclkdr, 0x001f000f); + /* set reset reason according CPU register */ + if ((gur->rstrqsr1 & (RSTRQSR1_WDT_RR | RSTRQSR1_SW_RR)) == + RSTRQSR1_WDT_RR) + cpuwd_flag = true; + + qrio_cpuwd_flag(cpuwd_flag); + /* clear CPU bits by writing 1 */ + setbits_be32(&gur->rstrqsr1, RSTRQSR1_WDT_RR | RSTRQSR1_SW_RR); + /* set the BFTIC's prstcfg to reset at power-up and unit reset only */ qrio_prstcfg(BFTIC4_RST, PRSTCFG_POWUP_UNIT_RST); /* and enable WD on it */ -- cgit v1.1 From 6caa185abd8bc42362c576a571792d5c63fa349d Mon Sep 17 00:00:00 2001 From: "Boschung, Rainer" Date: Tue, 3 Jun 2014 09:05:19 +0200 Subject: kmp204x/qrio: support for setting the CPU reset request mode To acheive this, the qrio_uprstreq() function that sets the UPRSTREQN flag in the qrio RESCNF reg is added. Signed-off-by: Rainer Boschung Signed-off-by: Valentin Longchamp Reviewed-by: York Sun --- board/keymile/kmp204x/kmp204x.h | 5 +++++ board/keymile/kmp204x/qrio.c | 17 +++++++++++++++++ 2 files changed, 22 insertions(+) (limited to 'board/keymile') diff --git a/board/keymile/kmp204x/kmp204x.h b/board/keymile/kmp204x/kmp204x.h index 64c0afb..e90e8ab 100644 --- a/board/keymile/kmp204x/kmp204x.h +++ b/board/keymile/kmp204x/kmp204x.h @@ -27,4 +27,9 @@ void qrio_enable_app_buffer(void); void qrio_cpuwd_flag(bool flag); int qrio_reset_reason(void); +#define UPREQ_UNIT_RST 0x0 +#define UPREQ_CORE_RST 0x1 + +void qrio_uprstreq(u8 mode); + void pci_of_setup(void *blob, bd_t *bd); diff --git a/board/keymile/kmp204x/qrio.c b/board/keymile/kmp204x/qrio.c index 92e8022..edf3bf1 100644 --- a/board/keymile/kmp204x/qrio.c +++ b/board/keymile/kmp204x/qrio.c @@ -188,3 +188,20 @@ void qrio_cpuwd_flag(bool flag) reason1 &= ~REASON1_CPUWD; out_8(qrio_base + REASON1_OFF, reason1); } + +#define RSTCFG_OFF 0x11 + +void qrio_uprstreq(u8 mode) +{ + u32 rstcfg; + void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE; + + rstcfg = in_8(qrio_base + RSTCFG_OFF); + + if (mode & UPREQ_CORE_RST) + rstcfg |= UPREQ_CORE_RST; + else + rstcfg &= ~UPREQ_CORE_RST; + + out_8(qrio_base + RSTCFG_OFF, rstcfg); +} -- cgit v1.1 From e3917b21c05776b41663bdfcc7666aca11a381a0 Mon Sep 17 00:00:00 2001 From: "Boschung, Rainer" Date: Tue, 3 Jun 2014 09:05:20 +0200 Subject: kmp204x: prepare to use CPU watchdog This patch configures the qrio to trigger a core reset on a CPU reset request. Signed-off-by: Rainer Boschung Signed-off-by: Valentin Longchamp Reviewed-by: York Sun --- board/keymile/kmp204x/kmp204x.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'board/keymile') diff --git a/board/keymile/kmp204x/kmp204x.c b/board/keymile/kmp204x/kmp204x.c index 225262e..cd08379 100644 --- a/board/keymile/kmp204x/kmp204x.c +++ b/board/keymile/kmp204x/kmp204x.c @@ -88,6 +88,9 @@ int board_early_init_f(void) ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); bool cpuwd_flag = false; + /* configure mode for uP reset request */ + qrio_uprstreq(UPREQ_CORE_RST); + /* board only uses the DDR_MCK0, so disable the DDR_MCK1/2/3 */ setbits_be32(&gur->ddrclkdr, 0x001f000f); -- cgit v1.1